cb_pcidas.c revision 70265d24e3404fe798b6edd55a02016b1edb49d7
1/* 2 comedi/drivers/cb_pcidas.c 3 4 Developed by Ivan Martinez and Frank Mori Hess, with valuable help from 5 David Schleef and the rest of the Comedi developers comunity. 6 7 Copyright (C) 2001-2003 Ivan Martinez <imr@oersted.dtu.dk> 8 Copyright (C) 2001,2002 Frank Mori Hess <fmhess@users.sourceforge.net> 9 10 COMEDI - Linux Control and Measurement Device Interface 11 Copyright (C) 1997-8 David A. Schleef <ds@schleef.org> 12 13 This program is free software; you can redistribute it and/or modify 14 it under the terms of the GNU General Public License as published by 15 the Free Software Foundation; either version 2 of the License, or 16 (at your option) any later version. 17 18 This program is distributed in the hope that it will be useful, 19 but WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 GNU General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with this program; if not, write to the Free Software 25 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 26 27************************************************************************ 28*/ 29/* 30Driver: cb_pcidas 31Description: MeasurementComputing PCI-DAS series with the AMCC S5933 PCI controller 32Author: Ivan Martinez <imr@oersted.dtu.dk>, 33 Frank Mori Hess <fmhess@users.sourceforge.net> 34Updated: 2003-3-11 35Devices: [Measurement Computing] PCI-DAS1602/16 (cb_pcidas), 36 PCI-DAS1602/16jr, PCI-DAS1602/12, PCI-DAS1200, PCI-DAS1200jr, 37 PCI-DAS1000, PCI-DAS1001, PCI_DAS1002 38 39Status: 40 There are many reports of the driver being used with most of the 41 supported cards. Despite no detailed log is maintained, it can 42 be said that the driver is quite tested and stable. 43 44 The boards may be autocalibrated using the comedi_calibrate 45 utility. 46 47Configuration options: 48 [0] - PCI bus of device (optional) 49 [1] - PCI slot of device (optional) 50 If bus/slot is not specified, the first supported 51 PCI device found will be used. 52 53For commands, the scanned channels must be consecutive 54(i.e. 4-5-6-7, 2-3-4,...), and must all have the same 55range and aref. 56*/ 57/* 58 59TODO: 60 61analog triggering on 1602 series 62*/ 63 64#include "../comedidev.h" 65#include <linux/delay.h> 66#include <linux/interrupt.h> 67 68#include "8253.h" 69#include "8255.h" 70#include "amcc_s5933.h" 71#include "comedi_pci.h" 72#include "comedi_fc.h" 73 74#undef CB_PCIDAS_DEBUG /* disable debugging code */ 75/* #define CB_PCIDAS_DEBUG enable debugging code */ 76 77/* PCI vendor number of ComputerBoards/MeasurementComputing */ 78#define PCI_VENDOR_ID_CB 0x1307 79#define TIMER_BASE 100 /* 10MHz master clock */ 80#define AI_BUFFER_SIZE 1024 /* maximum fifo size of any supported board */ 81#define AO_BUFFER_SIZE 1024 /* maximum fifo size of any supported board */ 82#define NUM_CHANNELS_8800 8 83#define NUM_CHANNELS_7376 1 84#define NUM_CHANNELS_8402 2 85#define NUM_CHANNELS_DAC08 1 86 87/* PCI-DAS base addresses */ 88 89/* indices of base address regions */ 90#define S5933_BADRINDEX 0 91#define CONT_STAT_BADRINDEX 1 92#define ADC_FIFO_BADRINDEX 2 93#define PACER_BADRINDEX 3 94#define AO_BADRINDEX 4 95/* sizes of io regions */ 96#define CONT_STAT_SIZE 10 97#define ADC_FIFO_SIZE 4 98#define PACER_SIZE 12 99#define AO_SIZE 4 100 101/* Control/Status registers */ 102#define INT_ADCFIFO 0 /* INTERRUPT / ADC FIFO register */ 103#define INT_EOS 0x1 /* interrupt end of scan */ 104#define INT_FHF 0x2 /* interrupt fifo half full */ 105#define INT_FNE 0x3 /* interrupt fifo not empty */ 106#define INT_MASK 0x3 /* mask of interrupt select bits */ 107#define INTE 0x4 /* interrupt enable */ 108#define DAHFIE 0x8 /* dac half full interrupt enable */ 109#define EOAIE 0x10 /* end of aquisition interrupt enable */ 110#define DAHFI 0x20 /* dac half full read status / write interrupt clear */ 111#define EOAI 0x40 /* read end of acq. interrupt status / write clear */ 112#define INT 0x80 /* read interrupt status / write clear */ 113#define EOBI 0x200 /* read end of burst interrupt status */ 114#define ADHFI 0x400 /* read half-full interrupt status */ 115#define ADNEI 0x800 /* read fifo not empty interrupt latch status */ 116#define ADNE 0x1000 /* read, fifo not empty (realtime, not latched) status */ 117#define DAEMIE 0x1000 /* write, dac empty interrupt enable */ 118#define LADFUL 0x2000 /* read fifo overflow / write clear */ 119#define DAEMI 0x4000 /* dac fifo empty interrupt status / write clear */ 120 121#define ADCMUX_CONT 2 /* ADC CHANNEL MUX AND CONTROL register */ 122#define BEGIN_SCAN(x) ((x) & 0xf) 123#define END_SCAN(x) (((x) & 0xf) << 4) 124#define GAIN_BITS(x) (((x) & 0x3) << 8) 125#define UNIP 0x800 /* Analog front-end unipolar for range */ 126#define SE 0x400 /* Inputs in single-ended mode */ 127#define PACER_MASK 0x3000 /* pacer source bits */ 128#define PACER_INT 0x1000 /* internal pacer */ 129#define PACER_EXT_FALL 0x2000 /* external falling edge */ 130#define PACER_EXT_RISE 0x3000 /* external rising edge */ 131#define EOC 0x4000 /* adc not busy */ 132 133#define TRIG_CONTSTAT 4 /* TRIGGER CONTROL/STATUS register */ 134#define SW_TRIGGER 0x1 /* software start trigger */ 135#define EXT_TRIGGER 0x2 /* external start trigger */ 136#define ANALOG_TRIGGER 0x3 /* external analog trigger */ 137#define TRIGGER_MASK 0x3 /* mask of bits that determine start trigger */ 138#define TGEN 0x10 /* enable external start trigger */ 139#define BURSTE 0x20 /* burst mode enable */ 140#define XTRCL 0x80 /* clear external trigger */ 141 142#define CALIBRATION_REG 6 /* CALIBRATION register */ 143#define SELECT_8800_BIT 0x100 /* select 8800 caldac */ 144#define SELECT_TRIMPOT_BIT 0x200 /* select ad7376 trim pot */ 145#define SELECT_DAC08_BIT 0x400 /* select dac08 caldac */ 146#define CAL_SRC_BITS(x) (((x) & 0x7) << 11) 147#define CAL_EN_BIT 0x4000 /* read calibration source instead of analog input channel 0 */ 148#define SERIAL_DATA_IN_BIT 0x8000 /* serial data stream going to 8800 and 7376 */ 149 150#define DAC_CSR 0x8 /* dac control and status register */ 151enum dac_csr_bits { 152 DACEN = 0x2, /* dac enable */ 153 DAC_MODE_UPDATE_BOTH = 0x80, /* update both dacs when dac0 is written */ 154}; 155static inline unsigned int DAC_RANGE(unsigned int channel, unsigned int range) 156{ 157 return (range & 0x3) << (8 + 2 * (channel & 0x1)); 158} 159static inline unsigned int DAC_RANGE_MASK(unsigned int channel) 160{ 161 return 0x3 << (8 + 2 * (channel & 0x1)); 162}; 163 164/* bits for 1602 series only */ 165enum dac_csr_bits_1602 { 166 DAC_EMPTY = 0x1, /* dac fifo empty, read, write clear */ 167 DAC_START = 0x4, /* start/arm dac fifo operations */ 168 DAC_PACER_MASK = 0x18, /* bits that set dac pacer source */ 169 DAC_PACER_INT = 0x8, /* dac internal pacing */ 170 DAC_PACER_EXT_FALL = 0x10, /* dac external pacing, falling edge */ 171 DAC_PACER_EXT_RISE = 0x18, /* dac external pacing, rising edge */ 172}; 173static inline unsigned int DAC_CHAN_EN(unsigned int channel) 174{ 175 return 1 << (5 + (channel & 0x1)); /* enable channel 0 or 1 */ 176}; 177 178/* analog input fifo */ 179#define ADCDATA 0 /* ADC DATA register */ 180#define ADCFIFOCLR 2 /* ADC FIFO CLEAR */ 181 182/* pacer, counter, dio registers */ 183#define ADC8254 0 184#define DIO_8255 4 185#define DAC8254 8 186 187/* analog output registers for 100x, 1200 series */ 188static inline unsigned int DAC_DATA_REG(unsigned int channel) 189{ 190 return 2 * (channel & 0x1); 191} 192 193/* analog output registers for 1602 series*/ 194#define DACDATA 0 /* DAC DATA register */ 195#define DACFIFOCLR 2 /* DAC FIFO CLEAR */ 196 197/* bit in hexadecimal representation of range index that indicates unipolar input range */ 198#define IS_UNIPOLAR 0x4 199/* analog input ranges for most boards */ 200static const struct comedi_lrange cb_pcidas_ranges = { 201 8, 202 { 203 BIP_RANGE(10), 204 BIP_RANGE(5), 205 BIP_RANGE(2.5), 206 BIP_RANGE(1.25), 207 UNI_RANGE(10), 208 UNI_RANGE(5), 209 UNI_RANGE(2.5), 210 UNI_RANGE(1.25) 211 } 212}; 213 214/* pci-das1001 input ranges */ 215static const struct comedi_lrange cb_pcidas_alt_ranges = { 216 8, 217 { 218 BIP_RANGE(10), 219 BIP_RANGE(1), 220 BIP_RANGE(0.1), 221 BIP_RANGE(0.01), 222 UNI_RANGE(10), 223 UNI_RANGE(1), 224 UNI_RANGE(0.1), 225 UNI_RANGE(0.01) 226 } 227}; 228 229/* analog output ranges */ 230static const struct comedi_lrange cb_pcidas_ao_ranges = { 231 4, 232 { 233 BIP_RANGE(5), 234 BIP_RANGE(10), 235 UNI_RANGE(5), 236 UNI_RANGE(10), 237 } 238}; 239 240enum trimpot_model { 241 AD7376, 242 AD8402, 243}; 244 245struct cb_pcidas_board { 246 const char *name; 247 unsigned short device_id; 248 int ai_se_chans; /* Inputs in single-ended mode */ 249 int ai_diff_chans; /* Inputs in differential mode */ 250 int ai_bits; /* analog input resolution */ 251 int ai_speed; /* fastest conversion period in ns */ 252 int ao_nchan; /* number of analog out channels */ 253 int has_ao_fifo; /* analog output has fifo */ 254 int ao_scan_speed; /* analog output speed for 1602 series (for a scan, not conversion) */ 255 int fifo_size; /* number of samples fifo can hold */ 256 const struct comedi_lrange *ranges; 257 enum trimpot_model trimpot; 258 unsigned has_dac08:1; 259}; 260 261static const struct cb_pcidas_board cb_pcidas_boards[] = { 262 { 263 name: "pci-das1602/16", 264 device_id:0x1, 265 ai_se_chans:16, 266 ai_diff_chans:8, 267 ai_bits: 16, 268 ai_speed:5000, 269 ao_nchan:2, 270 has_ao_fifo:1, 271 ao_scan_speed:10000, 272 fifo_size:512, 273 ranges: &cb_pcidas_ranges, 274 trimpot: AD8402, 275 has_dac08:1, 276 }, 277 { 278 name: "pci-das1200", 279 device_id:0xF, 280 ai_se_chans:16, 281 ai_diff_chans:8, 282 ai_bits: 12, 283 ai_speed:3200, 284 ao_nchan:2, 285 has_ao_fifo:0, 286 fifo_size:1024, 287 ranges: &cb_pcidas_ranges, 288 trimpot: AD7376, 289 has_dac08:0, 290 }, 291 { 292 name: "pci-das1602/12", 293 device_id:0x10, 294 ai_se_chans:16, 295 ai_diff_chans:8, 296 ai_bits: 12, 297 ai_speed:3200, 298 ao_nchan:2, 299 has_ao_fifo:1, 300 ao_scan_speed:4000, 301 fifo_size:1024, 302 ranges: &cb_pcidas_ranges, 303 trimpot: AD7376, 304 has_dac08:0, 305 }, 306 { 307 name: "pci-das1200/jr", 308 device_id:0x19, 309 ai_se_chans:16, 310 ai_diff_chans:8, 311 ai_bits: 12, 312 ai_speed:3200, 313 ao_nchan:0, 314 has_ao_fifo:0, 315 fifo_size:1024, 316 ranges: &cb_pcidas_ranges, 317 trimpot: AD7376, 318 has_dac08:0, 319 }, 320 { 321 name: "pci-das1602/16/jr", 322 device_id:0x1C, 323 ai_se_chans:16, 324 ai_diff_chans:8, 325 ai_bits: 16, 326 ai_speed:5000, 327 ao_nchan:0, 328 has_ao_fifo:0, 329 fifo_size:512, 330 ranges: &cb_pcidas_ranges, 331 trimpot: AD8402, 332 has_dac08:1, 333 }, 334 { 335 name: "pci-das1000", 336 device_id:0x4C, 337 ai_se_chans:16, 338 ai_diff_chans:8, 339 ai_bits: 12, 340 ai_speed:4000, 341 ao_nchan:0, 342 has_ao_fifo:0, 343 fifo_size:1024, 344 ranges: &cb_pcidas_ranges, 345 trimpot: AD7376, 346 has_dac08:0, 347 }, 348 { 349 name: "pci-das1001", 350 device_id:0x1a, 351 ai_se_chans:16, 352 ai_diff_chans:8, 353 ai_bits: 12, 354 ai_speed:6800, 355 ao_nchan:2, 356 has_ao_fifo:0, 357 fifo_size:1024, 358 ranges: &cb_pcidas_alt_ranges, 359 trimpot: AD7376, 360 has_dac08:0, 361 }, 362 { 363 name: "pci-das1002", 364 device_id:0x1b, 365 ai_se_chans:16, 366 ai_diff_chans:8, 367 ai_bits: 12, 368 ai_speed:6800, 369 ao_nchan:2, 370 has_ao_fifo:0, 371 fifo_size:1024, 372 ranges: &cb_pcidas_ranges, 373 trimpot: AD7376, 374 has_dac08:0, 375 }, 376}; 377 378/* Number of boards in cb_pcidas_boards */ 379#define N_BOARDS (sizeof(cb_pcidas_boards) / sizeof(struct cb_pcidas_board)) 380 381static DEFINE_PCI_DEVICE_TABLE(cb_pcidas_pci_table) = { 382 {PCI_VENDOR_ID_CB, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 383 {PCI_VENDOR_ID_CB, 0x000f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 384 {PCI_VENDOR_ID_CB, 0x0010, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 385 {PCI_VENDOR_ID_CB, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 386 {PCI_VENDOR_ID_CB, 0x001c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 387 {PCI_VENDOR_ID_CB, 0x004c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 388 {PCI_VENDOR_ID_CB, 0x001a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 389 {PCI_VENDOR_ID_CB, 0x001b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 390 {0} 391}; 392 393MODULE_DEVICE_TABLE(pci, cb_pcidas_pci_table); 394 395/* 396 * Useful for shorthand access to the particular board structure 397 */ 398#define thisboard ((const struct cb_pcidas_board *)dev->board_ptr) 399 400/* this structure is for data unique to this hardware driver. If 401 several hardware drivers keep similar information in this structure, 402 feel free to suggest moving the variable to the struct comedi_device struct. */ 403struct cb_pcidas_private { 404 /* would be useful for a PCI device */ 405 struct pci_dev *pci_dev; 406 /* base addresses */ 407 unsigned long s5933_config; 408 unsigned long control_status; 409 unsigned long adc_fifo; 410 unsigned long pacer_counter_dio; 411 unsigned long ao_registers; 412 /* divisors of master clock for analog input pacing */ 413 unsigned int divisor1; 414 unsigned int divisor2; 415 volatile unsigned int count; /* number of analog input samples remaining */ 416 volatile unsigned int adc_fifo_bits; /* bits to write to interupt/adcfifo register */ 417 volatile unsigned int s5933_intcsr_bits; /* bits to write to amcc s5933 interrupt control/status register */ 418 volatile unsigned int ao_control_bits; /* bits to write to ao control and status register */ 419 short ai_buffer[AI_BUFFER_SIZE]; 420 short ao_buffer[AO_BUFFER_SIZE]; 421 /* divisors of master clock for analog output pacing */ 422 unsigned int ao_divisor1; 423 unsigned int ao_divisor2; 424 volatile unsigned int ao_count; /* number of analog output samples remaining */ 425 int ao_value[2]; /* remember what the analog outputs are set to, to allow readback */ 426 unsigned int caldac_value[NUM_CHANNELS_8800]; /* for readback of caldac */ 427 unsigned int trimpot_value[NUM_CHANNELS_8402]; /* for readback of trimpot */ 428 unsigned int dac08_value; 429 unsigned int calibration_source; 430}; 431 432/* 433 * most drivers define the following macro to make it easy to 434 * access the private structure. 435 */ 436#define devpriv ((struct cb_pcidas_private *)dev->private) 437 438/* 439 * The struct comedi_driver structure tells the Comedi core module 440 * which functions to call to configure/deconfigure (attach/detach) 441 * the board, and also about the kernel module that contains 442 * the device code. 443 */ 444static int cb_pcidas_attach(struct comedi_device * dev, struct comedi_devconfig * it); 445static int cb_pcidas_detach(struct comedi_device * dev); 446static struct comedi_driver driver_cb_pcidas = { 447 driver_name:"cb_pcidas", 448 module:THIS_MODULE, 449 attach:cb_pcidas_attach, 450 detach:cb_pcidas_detach, 451}; 452 453static int cb_pcidas_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice * s, 454 struct comedi_insn * insn, unsigned int * data); 455static int ai_config_insn(struct comedi_device * dev, struct comedi_subdevice * s, 456 struct comedi_insn * insn, unsigned int * data); 457static int cb_pcidas_ao_nofifo_winsn(struct comedi_device * dev, struct comedi_subdevice * s, 458 struct comedi_insn * insn, unsigned int * data); 459static int cb_pcidas_ao_fifo_winsn(struct comedi_device * dev, struct comedi_subdevice * s, 460 struct comedi_insn * insn, unsigned int * data); 461static int cb_pcidas_ao_readback_insn(struct comedi_device * dev, struct comedi_subdevice * s, 462 struct comedi_insn * insn, unsigned int * data); 463static int cb_pcidas_ai_cmd(struct comedi_device * dev, struct comedi_subdevice * s); 464static int cb_pcidas_ai_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s, 465 struct comedi_cmd * cmd); 466static int cb_pcidas_ao_cmd(struct comedi_device * dev, struct comedi_subdevice * s); 467static int cb_pcidas_ao_inttrig(struct comedi_device *dev, 468 struct comedi_subdevice *subdev, 469 unsigned int trig_num); 470static int cb_pcidas_ao_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s, 471 struct comedi_cmd * cmd); 472static irqreturn_t cb_pcidas_interrupt(int irq, void *d); 473static void handle_ao_interrupt(struct comedi_device * dev, unsigned int status); 474static int cb_pcidas_cancel(struct comedi_device * dev, struct comedi_subdevice * s); 475static int cb_pcidas_ao_cancel(struct comedi_device * dev, struct comedi_subdevice * s); 476static void cb_pcidas_load_counters(struct comedi_device * dev, unsigned int *ns, 477 int round_flags); 478static int eeprom_read_insn(struct comedi_device * dev, struct comedi_subdevice * s, 479 struct comedi_insn * insn, unsigned int * data); 480static int caldac_read_insn(struct comedi_device * dev, struct comedi_subdevice * s, 481 struct comedi_insn * insn, unsigned int * data); 482static int caldac_write_insn(struct comedi_device * dev, struct comedi_subdevice * s, 483 struct comedi_insn * insn, unsigned int * data); 484static int trimpot_read_insn(struct comedi_device * dev, struct comedi_subdevice * s, 485 struct comedi_insn * insn, unsigned int * data); 486static int cb_pcidas_trimpot_write(struct comedi_device * dev, unsigned int channel, 487 unsigned int value); 488static int trimpot_write_insn(struct comedi_device * dev, struct comedi_subdevice * s, 489 struct comedi_insn * insn, unsigned int * data); 490static int dac08_read_insn(struct comedi_device * dev, struct comedi_subdevice * s, 491 struct comedi_insn * insn, unsigned int * data); 492static int dac08_write(struct comedi_device * dev, unsigned int value); 493static int dac08_write_insn(struct comedi_device * dev, struct comedi_subdevice * s, 494 struct comedi_insn * insn, unsigned int * data); 495static int caldac_8800_write(struct comedi_device * dev, unsigned int address, 496 uint8_t value); 497static int trimpot_7376_write(struct comedi_device * dev, uint8_t value); 498static int trimpot_8402_write(struct comedi_device * dev, unsigned int channel, 499 uint8_t value); 500static int nvram_read(struct comedi_device * dev, unsigned int address, 501 uint8_t * data); 502 503static inline unsigned int cal_enable_bits(struct comedi_device * dev) 504{ 505 return CAL_EN_BIT | CAL_SRC_BITS(devpriv->calibration_source); 506} 507 508/* 509 * Attach is called by the Comedi core to configure the driver 510 * for a particular board. 511 */ 512static int cb_pcidas_attach(struct comedi_device * dev, struct comedi_devconfig * it) 513{ 514 struct comedi_subdevice *s; 515 struct pci_dev *pcidev; 516 int index; 517 int i; 518 519 printk("comedi%d: cb_pcidas: ", dev->minor); 520 521/* 522 * Allocate the private structure area. 523 */ 524 if (alloc_private(dev, sizeof(struct cb_pcidas_private)) < 0) 525 return -ENOMEM; 526 527/* 528 * Probe the device to determine what device in the series it is. 529 */ 530 printk("\n"); 531 532 for (pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL); 533 pcidev != NULL; 534 pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) { 535 /* is it not a computer boards card? */ 536 if (pcidev->vendor != PCI_VENDOR_ID_CB) 537 continue; 538 /* loop through cards supported by this driver */ 539 for (index = 0; index < N_BOARDS; index++) { 540 if (cb_pcidas_boards[index].device_id != pcidev->device) 541 continue; 542 /* was a particular bus/slot requested? */ 543 if (it->options[0] || it->options[1]) { 544 /* are we on the wrong bus/slot? */ 545 if (pcidev->bus->number != it->options[0] || 546 PCI_SLOT(pcidev->devfn) != 547 it->options[1]) { 548 continue; 549 } 550 } 551 devpriv->pci_dev = pcidev; 552 dev->board_ptr = cb_pcidas_boards + index; 553 goto found; 554 } 555 } 556 557 printk("No supported ComputerBoards/MeasurementComputing card found on " 558 "requested position\n"); 559 return -EIO; 560 561 found: 562 563 printk("Found %s on bus %i, slot %i\n", cb_pcidas_boards[index].name, 564 pcidev->bus->number, PCI_SLOT(pcidev->devfn)); 565 566 /* 567 * Enable PCI device and reserve I/O ports. 568 */ 569 if (comedi_pci_enable(pcidev, "cb_pcidas")) { 570 printk(" Failed to enable PCI device and request regions\n"); 571 return -EIO; 572 } 573 /* 574 * Initialize devpriv->control_status and devpriv->adc_fifo to point to 575 * their base address. 576 */ 577 devpriv->s5933_config = 578 pci_resource_start(devpriv->pci_dev, S5933_BADRINDEX); 579 devpriv->control_status = 580 pci_resource_start(devpriv->pci_dev, CONT_STAT_BADRINDEX); 581 devpriv->adc_fifo = 582 pci_resource_start(devpriv->pci_dev, ADC_FIFO_BADRINDEX); 583 devpriv->pacer_counter_dio = 584 pci_resource_start(devpriv->pci_dev, PACER_BADRINDEX); 585 if (thisboard->ao_nchan) { 586 devpriv->ao_registers = 587 pci_resource_start(devpriv->pci_dev, AO_BADRINDEX); 588 } 589 /* disable and clear interrupts on amcc s5933 */ 590 outl(INTCSR_INBOX_INTR_STATUS, 591 devpriv->s5933_config + AMCC_OP_REG_INTCSR); 592 593 /* get irq */ 594 if (comedi_request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt, 595 IRQF_SHARED, "cb_pcidas", dev)) { 596 printk(" unable to allocate irq %d\n", devpriv->pci_dev->irq); 597 return -EINVAL; 598 } 599 dev->irq = devpriv->pci_dev->irq; 600 601 /* Initialize dev->board_name */ 602 dev->board_name = thisboard->name; 603 604/* 605 * Allocate the subdevice structures. 606 */ 607 if (alloc_subdevices(dev, 7) < 0) 608 return -ENOMEM; 609 610 s = dev->subdevices + 0; 611 /* analog input subdevice */ 612 dev->read_subdev = s; 613 s->type = COMEDI_SUBD_AI; 614 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ; 615 /* WARNING: Number of inputs in differential mode is ignored */ 616 s->n_chan = thisboard->ai_se_chans; 617 s->len_chanlist = thisboard->ai_se_chans; 618 s->maxdata = (1 << thisboard->ai_bits) - 1; 619 s->range_table = thisboard->ranges; 620 s->insn_read = cb_pcidas_ai_rinsn; 621 s->insn_config = ai_config_insn; 622 s->do_cmd = cb_pcidas_ai_cmd; 623 s->do_cmdtest = cb_pcidas_ai_cmdtest; 624 s->cancel = cb_pcidas_cancel; 625 626 /* analog output subdevice */ 627 s = dev->subdevices + 1; 628 if (thisboard->ao_nchan) { 629 s->type = COMEDI_SUBD_AO; 630 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND; 631 s->n_chan = thisboard->ao_nchan; 632 /* analog out resolution is the same as analog input resolution, so use ai_bits */ 633 s->maxdata = (1 << thisboard->ai_bits) - 1; 634 s->range_table = &cb_pcidas_ao_ranges; 635 s->insn_read = cb_pcidas_ao_readback_insn; 636 if (thisboard->has_ao_fifo) { 637 dev->write_subdev = s; 638 s->subdev_flags |= SDF_CMD_WRITE; 639 s->insn_write = cb_pcidas_ao_fifo_winsn; 640 s->do_cmdtest = cb_pcidas_ao_cmdtest; 641 s->do_cmd = cb_pcidas_ao_cmd; 642 s->cancel = cb_pcidas_ao_cancel; 643 } else { 644 s->insn_write = cb_pcidas_ao_nofifo_winsn; 645 } 646 } else { 647 s->type = COMEDI_SUBD_UNUSED; 648 } 649 650 /* 8255 */ 651 s = dev->subdevices + 2; 652 subdev_8255_init(dev, s, NULL, devpriv->pacer_counter_dio + DIO_8255); 653 654 /* serial EEPROM, */ 655 s = dev->subdevices + 3; 656 s->type = COMEDI_SUBD_MEMORY; 657 s->subdev_flags = SDF_READABLE | SDF_INTERNAL; 658 s->n_chan = 256; 659 s->maxdata = 0xff; 660 s->insn_read = eeprom_read_insn; 661 662 /* 8800 caldac */ 663 s = dev->subdevices + 4; 664 s->type = COMEDI_SUBD_CALIB; 665 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL; 666 s->n_chan = NUM_CHANNELS_8800; 667 s->maxdata = 0xff; 668 s->insn_read = caldac_read_insn; 669 s->insn_write = caldac_write_insn; 670 for (i = 0; i < s->n_chan; i++) 671 caldac_8800_write(dev, i, s->maxdata / 2); 672 673 /* trim potentiometer */ 674 s = dev->subdevices + 5; 675 s->type = COMEDI_SUBD_CALIB; 676 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL; 677 if (thisboard->trimpot == AD7376) { 678 s->n_chan = NUM_CHANNELS_7376; 679 s->maxdata = 0x7f; 680 } else { 681 s->n_chan = NUM_CHANNELS_8402; 682 s->maxdata = 0xff; 683 } 684 s->insn_read = trimpot_read_insn; 685 s->insn_write = trimpot_write_insn; 686 for (i = 0; i < s->n_chan; i++) 687 cb_pcidas_trimpot_write(dev, i, s->maxdata / 2); 688 689 /* dac08 caldac */ 690 s = dev->subdevices + 6; 691 if (thisboard->has_dac08) { 692 s->type = COMEDI_SUBD_CALIB; 693 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL; 694 s->n_chan = NUM_CHANNELS_DAC08; 695 s->insn_read = dac08_read_insn; 696 s->insn_write = dac08_write_insn; 697 s->maxdata = 0xff; 698 dac08_write(dev, s->maxdata / 2); 699 } else 700 s->type = COMEDI_SUBD_UNUSED; 701 702 /* make sure mailbox 4 is empty */ 703 inl(devpriv->s5933_config + AMCC_OP_REG_IMB4); 704 /* Set bits to enable incoming mailbox interrupts on amcc s5933. */ 705 devpriv->s5933_intcsr_bits = 706 INTCSR_INBOX_BYTE(3) | INTCSR_INBOX_SELECT(3) | 707 INTCSR_INBOX_FULL_INT; 708 /* clear and enable interrupt on amcc s5933 */ 709 outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS, 710 devpriv->s5933_config + AMCC_OP_REG_INTCSR); 711 712 return 1; 713} 714 715/* 716 * cb_pcidas_detach is called to deconfigure a device. It should deallocate 717 * resources. 718 * This function is also called when _attach() fails, so it should be 719 * careful not to release resources that were not necessarily 720 * allocated by _attach(). dev->private and dev->subdevices are 721 * deallocated automatically by the core. 722 */ 723static int cb_pcidas_detach(struct comedi_device * dev) 724{ 725 printk("comedi%d: cb_pcidas: remove\n", dev->minor); 726 727 if (devpriv) { 728 if (devpriv->s5933_config) { 729 /* disable and clear interrupts on amcc s5933 */ 730 outl(INTCSR_INBOX_INTR_STATUS, 731 devpriv->s5933_config + AMCC_OP_REG_INTCSR); 732#ifdef CB_PCIDAS_DEBUG 733 rt_printk("detaching, incsr is 0x%x\n", 734 inl(devpriv->s5933_config + 735 AMCC_OP_REG_INTCSR)); 736#endif 737 } 738 } 739 if (dev->irq) 740 comedi_free_irq(dev->irq, dev); 741 if (dev->subdevices) 742 subdev_8255_cleanup(dev, dev->subdevices + 2); 743 if (devpriv && devpriv->pci_dev) { 744 if (devpriv->s5933_config) { 745 comedi_pci_disable(devpriv->pci_dev); 746 } 747 pci_dev_put(devpriv->pci_dev); 748 } 749 750 return 0; 751} 752 753/* 754 * "instructions" read/write data in "one-shot" or "software-triggered" 755 * mode. 756 */ 757static int cb_pcidas_ai_rinsn(struct comedi_device * dev, struct comedi_subdevice * s, 758 struct comedi_insn * insn, unsigned int * data) 759{ 760 int n, i; 761 unsigned int bits; 762 static const int timeout = 10000; 763 int channel; 764 /* enable calibration input if appropriate */ 765 if (insn->chanspec & CR_ALT_SOURCE) { 766 outw(cal_enable_bits(dev), 767 devpriv->control_status + CALIBRATION_REG); 768 channel = 0; 769 } else { 770 outw(0, devpriv->control_status + CALIBRATION_REG); 771 channel = CR_CHAN(insn->chanspec); 772 } 773 /* set mux limits and gain */ 774 bits = BEGIN_SCAN(channel) | 775 END_SCAN(channel) | GAIN_BITS(CR_RANGE(insn->chanspec)); 776 /* set unipolar/bipolar */ 777 if (CR_RANGE(insn->chanspec) & IS_UNIPOLAR) 778 bits |= UNIP; 779 /* set singleended/differential */ 780 if (CR_AREF(insn->chanspec) != AREF_DIFF) 781 bits |= SE; 782 outw(bits, devpriv->control_status + ADCMUX_CONT); 783 784 /* clear fifo */ 785 outw(0, devpriv->adc_fifo + ADCFIFOCLR); 786 787 /* convert n samples */ 788 for (n = 0; n < insn->n; n++) { 789 /* trigger conversion */ 790 outw(0, devpriv->adc_fifo + ADCDATA); 791 792 /* wait for conversion to end */ 793 /* return -ETIMEDOUT if there is a timeout */ 794 for (i = 0; i < timeout; i++) { 795 if (inw(devpriv->control_status + ADCMUX_CONT) & EOC) 796 break; 797 } 798 if (i == timeout) 799 return -ETIMEDOUT; 800 801 /* read data */ 802 data[n] = inw(devpriv->adc_fifo + ADCDATA); 803 } 804 805 /* return the number of samples read/written */ 806 return n; 807} 808 809static int ai_config_calibration_source(struct comedi_device * dev, unsigned int * data) 810{ 811 static const int num_calibration_sources = 8; 812 unsigned int source = data[1]; 813 814 if (source >= num_calibration_sources) { 815 printk("invalid calibration source: %i\n", source); 816 return -EINVAL; 817 } 818 819 devpriv->calibration_source = source; 820 821 return 2; 822} 823 824static int ai_config_insn(struct comedi_device * dev, struct comedi_subdevice * s, 825 struct comedi_insn * insn, unsigned int * data) 826{ 827 int id = data[0]; 828 829 switch (id) { 830 case INSN_CONFIG_ALT_SOURCE: 831 return ai_config_calibration_source(dev, data); 832 break; 833 default: 834 return -EINVAL; 835 break; 836 } 837 return -EINVAL; 838} 839 840/* analog output insn for pcidas-1000 and 1200 series */ 841static int cb_pcidas_ao_nofifo_winsn(struct comedi_device * dev, struct comedi_subdevice * s, 842 struct comedi_insn * insn, unsigned int * data) 843{ 844 int channel; 845 unsigned long flags; 846 847 /* set channel and range */ 848 channel = CR_CHAN(insn->chanspec); 849 comedi_spin_lock_irqsave(&dev->spinlock, flags); 850 devpriv->ao_control_bits &= 851 ~DAC_MODE_UPDATE_BOTH & ~DAC_RANGE_MASK(channel); 852 devpriv->ao_control_bits |= 853 DACEN | DAC_RANGE(channel, CR_RANGE(insn->chanspec)); 854 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 855 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 856 857 /* remember value for readback */ 858 devpriv->ao_value[channel] = data[0]; 859 /* send data */ 860 outw(data[0], devpriv->ao_registers + DAC_DATA_REG(channel)); 861 862 return 1; 863} 864 865/* analog output insn for pcidas-1602 series */ 866static int cb_pcidas_ao_fifo_winsn(struct comedi_device * dev, struct comedi_subdevice * s, 867 struct comedi_insn * insn, unsigned int * data) 868{ 869 int channel; 870 unsigned long flags; 871 872 /* clear dac fifo */ 873 outw(0, devpriv->ao_registers + DACFIFOCLR); 874 875 /* set channel and range */ 876 channel = CR_CHAN(insn->chanspec); 877 comedi_spin_lock_irqsave(&dev->spinlock, flags); 878 devpriv->ao_control_bits &= 879 ~DAC_CHAN_EN(0) & ~DAC_CHAN_EN(1) & ~DAC_RANGE_MASK(channel) & 880 ~DAC_PACER_MASK; 881 devpriv->ao_control_bits |= 882 DACEN | DAC_RANGE(channel, 883 CR_RANGE(insn->chanspec)) | DAC_CHAN_EN(channel) | DAC_START; 884 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 885 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 886 887 /* remember value for readback */ 888 devpriv->ao_value[channel] = data[0]; 889 /* send data */ 890 outw(data[0], devpriv->ao_registers + DACDATA); 891 892 return 1; 893} 894 895/* analog output readback insn */ 896/* XXX loses track of analog output value back after an analog ouput command is executed */ 897static int cb_pcidas_ao_readback_insn(struct comedi_device * dev, struct comedi_subdevice * s, 898 struct comedi_insn * insn, unsigned int * data) 899{ 900 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)]; 901 902 return 1; 903} 904 905static int eeprom_read_insn(struct comedi_device * dev, struct comedi_subdevice * s, 906 struct comedi_insn * insn, unsigned int * data) 907{ 908 uint8_t nvram_data; 909 int retval; 910 911 retval = nvram_read(dev, CR_CHAN(insn->chanspec), &nvram_data); 912 if (retval < 0) 913 return retval; 914 915 data[0] = nvram_data; 916 917 return 1; 918} 919 920static int caldac_write_insn(struct comedi_device * dev, struct comedi_subdevice * s, 921 struct comedi_insn * insn, unsigned int * data) 922{ 923 const unsigned int channel = CR_CHAN(insn->chanspec); 924 925 return caldac_8800_write(dev, channel, data[0]); 926} 927 928static int caldac_read_insn(struct comedi_device * dev, struct comedi_subdevice * s, 929 struct comedi_insn * insn, unsigned int * data) 930{ 931 data[0] = devpriv->caldac_value[CR_CHAN(insn->chanspec)]; 932 933 return 1; 934} 935 936/* 1602/16 pregain offset */ 937static int dac08_write(struct comedi_device * dev, unsigned int value) 938{ 939 if (devpriv->dac08_value == value) 940 return 1; 941 942 devpriv->dac08_value = value; 943 944 outw(cal_enable_bits(dev) | (value & 0xff), 945 devpriv->control_status + CALIBRATION_REG); 946 comedi_udelay(1); 947 outw(cal_enable_bits(dev) | SELECT_DAC08_BIT | (value & 0xff), 948 devpriv->control_status + CALIBRATION_REG); 949 comedi_udelay(1); 950 outw(cal_enable_bits(dev) | (value & 0xff), 951 devpriv->control_status + CALIBRATION_REG); 952 comedi_udelay(1); 953 954 return 1; 955} 956 957static int dac08_write_insn(struct comedi_device * dev, struct comedi_subdevice * s, 958 struct comedi_insn * insn, unsigned int * data) 959{ 960 return dac08_write(dev, data[0]); 961} 962 963static int dac08_read_insn(struct comedi_device * dev, struct comedi_subdevice * s, 964 struct comedi_insn * insn, unsigned int * data) 965{ 966 data[0] = devpriv->dac08_value; 967 968 return 1; 969} 970 971static int cb_pcidas_trimpot_write(struct comedi_device * dev, 972 unsigned int channel, unsigned int value) 973{ 974 if (devpriv->trimpot_value[channel] == value) 975 return 1; 976 977 devpriv->trimpot_value[channel] = value; 978 switch (thisboard->trimpot) { 979 case AD7376: 980 trimpot_7376_write(dev, value); 981 break; 982 case AD8402: 983 trimpot_8402_write(dev, channel, value); 984 break; 985 default: 986 comedi_error(dev, "driver bug?"); 987 return -1; 988 break; 989 } 990 991 return 1; 992} 993 994static int trimpot_write_insn(struct comedi_device * dev, struct comedi_subdevice * s, 995 struct comedi_insn * insn, unsigned int * data) 996{ 997 unsigned int channel = CR_CHAN(insn->chanspec); 998 999 return cb_pcidas_trimpot_write(dev, channel, data[0]); 1000} 1001 1002static int trimpot_read_insn(struct comedi_device * dev, struct comedi_subdevice * s, 1003 struct comedi_insn * insn, unsigned int * data) 1004{ 1005 unsigned int channel = CR_CHAN(insn->chanspec); 1006 1007 data[0] = devpriv->trimpot_value[channel]; 1008 1009 return 1; 1010} 1011 1012static int cb_pcidas_ai_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s, 1013 struct comedi_cmd * cmd) 1014{ 1015 int err = 0; 1016 int tmp; 1017 int i, gain, start_chan; 1018 1019 /* cmdtest tests a particular command to see if it is valid. 1020 * Using the cmdtest ioctl, a user can create a valid cmd 1021 * and then have it executes by the cmd ioctl. 1022 * 1023 * cmdtest returns 1,2,3,4 or 0, depending on which tests 1024 * the command passes. */ 1025 1026 /* step 1: make sure trigger sources are trivially valid */ 1027 1028 tmp = cmd->start_src; 1029 cmd->start_src &= TRIG_NOW | TRIG_EXT; 1030 if (!cmd->start_src || tmp != cmd->start_src) 1031 err++; 1032 1033 tmp = cmd->scan_begin_src; 1034 cmd->scan_begin_src &= TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT; 1035 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) 1036 err++; 1037 1038 tmp = cmd->convert_src; 1039 cmd->convert_src &= TRIG_TIMER | TRIG_NOW | TRIG_EXT; 1040 if (!cmd->convert_src || tmp != cmd->convert_src) 1041 err++; 1042 1043 tmp = cmd->scan_end_src; 1044 cmd->scan_end_src &= TRIG_COUNT; 1045 if (!cmd->scan_end_src || tmp != cmd->scan_end_src) 1046 err++; 1047 1048 tmp = cmd->stop_src; 1049 cmd->stop_src &= TRIG_COUNT | TRIG_NONE; 1050 if (!cmd->stop_src || tmp != cmd->stop_src) 1051 err++; 1052 1053 if (err) 1054 return 1; 1055 1056 /* step 2: make sure trigger sources are unique and mutually compatible */ 1057 1058 if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT) 1059 err++; 1060 if (cmd->scan_begin_src != TRIG_FOLLOW && 1061 cmd->scan_begin_src != TRIG_TIMER && 1062 cmd->scan_begin_src != TRIG_EXT) 1063 err++; 1064 if (cmd->convert_src != TRIG_TIMER && 1065 cmd->convert_src != TRIG_EXT && cmd->convert_src != TRIG_NOW) 1066 err++; 1067 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE) 1068 err++; 1069 1070 /* make sure trigger sources are compatible with each other */ 1071 if (cmd->scan_begin_src == TRIG_FOLLOW && cmd->convert_src == TRIG_NOW) 1072 err++; 1073 if (cmd->scan_begin_src != TRIG_FOLLOW && cmd->convert_src != TRIG_NOW) 1074 err++; 1075 if (cmd->start_src == TRIG_EXT && 1076 (cmd->convert_src == TRIG_EXT 1077 || cmd->scan_begin_src == TRIG_EXT)) 1078 err++; 1079 1080 if (err) 1081 return 2; 1082 1083 /* step 3: make sure arguments are trivially compatible */ 1084 1085 if (cmd->start_arg != 0) { 1086 cmd->start_arg = 0; 1087 err++; 1088 } 1089 1090 if (cmd->scan_begin_src == TRIG_TIMER) { 1091 if (cmd->scan_begin_arg < 1092 thisboard->ai_speed * cmd->chanlist_len) { 1093 cmd->scan_begin_arg = 1094 thisboard->ai_speed * cmd->chanlist_len; 1095 err++; 1096 } 1097 } 1098 if (cmd->convert_src == TRIG_TIMER) { 1099 if (cmd->convert_arg < thisboard->ai_speed) { 1100 cmd->convert_arg = thisboard->ai_speed; 1101 err++; 1102 } 1103 } 1104 1105 if (cmd->scan_end_arg != cmd->chanlist_len) { 1106 cmd->scan_end_arg = cmd->chanlist_len; 1107 err++; 1108 } 1109 if (cmd->stop_src == TRIG_NONE) { 1110 /* TRIG_NONE */ 1111 if (cmd->stop_arg != 0) { 1112 cmd->stop_arg = 0; 1113 err++; 1114 } 1115 } 1116 1117 if (err) 1118 return 3; 1119 1120 /* step 4: fix up any arguments */ 1121 1122 if (cmd->scan_begin_src == TRIG_TIMER) { 1123 tmp = cmd->scan_begin_arg; 1124 i8253_cascade_ns_to_timer_2div(TIMER_BASE, 1125 &(devpriv->divisor1), &(devpriv->divisor2), 1126 &(cmd->scan_begin_arg), cmd->flags & TRIG_ROUND_MASK); 1127 if (tmp != cmd->scan_begin_arg) 1128 err++; 1129 } 1130 if (cmd->convert_src == TRIG_TIMER) { 1131 tmp = cmd->convert_arg; 1132 i8253_cascade_ns_to_timer_2div(TIMER_BASE, 1133 &(devpriv->divisor1), &(devpriv->divisor2), 1134 &(cmd->convert_arg), cmd->flags & TRIG_ROUND_MASK); 1135 if (tmp != cmd->convert_arg) 1136 err++; 1137 } 1138 1139 if (err) 1140 return 4; 1141 1142 /* check channel/gain list against card's limitations */ 1143 if (cmd->chanlist) { 1144 gain = CR_RANGE(cmd->chanlist[0]); 1145 start_chan = CR_CHAN(cmd->chanlist[0]); 1146 for (i = 1; i < cmd->chanlist_len; i++) { 1147 if (CR_CHAN(cmd->chanlist[i]) != 1148 (start_chan + i) % s->n_chan) { 1149 comedi_error(dev, 1150 "entries in chanlist must be consecutive channels, counting upwards\n"); 1151 err++; 1152 } 1153 if (CR_RANGE(cmd->chanlist[i]) != gain) { 1154 comedi_error(dev, 1155 "entries in chanlist must all have the same gain\n"); 1156 err++; 1157 } 1158 } 1159 } 1160 1161 if (err) 1162 return 5; 1163 1164 return 0; 1165} 1166 1167static int cb_pcidas_ai_cmd(struct comedi_device * dev, struct comedi_subdevice * s) 1168{ 1169 struct comedi_async *async = s->async; 1170 struct comedi_cmd *cmd = &async->cmd; 1171 unsigned int bits; 1172 unsigned long flags; 1173 1174 /* make sure CAL_EN_BIT is disabled */ 1175 outw(0, devpriv->control_status + CALIBRATION_REG); 1176 /* initialize before settings pacer source and count values */ 1177 outw(0, devpriv->control_status + TRIG_CONTSTAT); 1178 /* clear fifo */ 1179 outw(0, devpriv->adc_fifo + ADCFIFOCLR); 1180 1181 /* set mux limits, gain and pacer source */ 1182 bits = BEGIN_SCAN(CR_CHAN(cmd->chanlist[0])) | 1183 END_SCAN(CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1])) | 1184 GAIN_BITS(CR_RANGE(cmd->chanlist[0])); 1185 /* set unipolar/bipolar */ 1186 if (CR_RANGE(cmd->chanlist[0]) & IS_UNIPOLAR) 1187 bits |= UNIP; 1188 /* set singleended/differential */ 1189 if (CR_AREF(cmd->chanlist[0]) != AREF_DIFF) 1190 bits |= SE; 1191 /* set pacer source */ 1192 if (cmd->convert_src == TRIG_EXT || cmd->scan_begin_src == TRIG_EXT) 1193 bits |= PACER_EXT_RISE; 1194 else 1195 bits |= PACER_INT; 1196 outw(bits, devpriv->control_status + ADCMUX_CONT); 1197 1198#ifdef CB_PCIDAS_DEBUG 1199 rt_printk("comedi: sent 0x%x to adcmux control\n", bits); 1200#endif 1201 1202 /* load counters */ 1203 if (cmd->convert_src == TRIG_TIMER) 1204 cb_pcidas_load_counters(dev, &cmd->convert_arg, 1205 cmd->flags & TRIG_ROUND_MASK); 1206 else if (cmd->scan_begin_src == TRIG_TIMER) 1207 cb_pcidas_load_counters(dev, &cmd->scan_begin_arg, 1208 cmd->flags & TRIG_ROUND_MASK); 1209 1210 /* set number of conversions */ 1211 if (cmd->stop_src == TRIG_COUNT) { 1212 devpriv->count = cmd->chanlist_len * cmd->stop_arg; 1213 } 1214 /* enable interrupts */ 1215 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1216 devpriv->adc_fifo_bits |= INTE; 1217 devpriv->adc_fifo_bits &= ~INT_MASK; 1218 if (cmd->flags & TRIG_WAKE_EOS) { 1219 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1) 1220 devpriv->adc_fifo_bits |= INT_EOS; /* interrupt end of burst */ 1221 else 1222 devpriv->adc_fifo_bits |= INT_FNE; /* interrupt fifo not empty */ 1223 } else { 1224 devpriv->adc_fifo_bits |= INT_FHF; /* interrupt fifo half full */ 1225 } 1226#ifdef CB_PCIDAS_DEBUG 1227 rt_printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits); 1228#endif 1229 /* enable (and clear) interrupts */ 1230 outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL, 1231 devpriv->control_status + INT_ADCFIFO); 1232 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1233 1234 /* set start trigger and burst mode */ 1235 bits = 0; 1236 if (cmd->start_src == TRIG_NOW) 1237 bits |= SW_TRIGGER; 1238 else if (cmd->start_src == TRIG_EXT) 1239 bits |= EXT_TRIGGER | TGEN | XTRCL; 1240 else { 1241 comedi_error(dev, "bug!"); 1242 return -1; 1243 } 1244 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1) 1245 bits |= BURSTE; 1246 outw(bits, devpriv->control_status + TRIG_CONTSTAT); 1247#ifdef CB_PCIDAS_DEBUG 1248 rt_printk("comedi: sent 0x%x to trig control\n", bits); 1249#endif 1250 1251 return 0; 1252} 1253 1254static int cb_pcidas_ao_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s, 1255 struct comedi_cmd * cmd) 1256{ 1257 int err = 0; 1258 int tmp; 1259 1260 /* cmdtest tests a particular command to see if it is valid. 1261 * Using the cmdtest ioctl, a user can create a valid cmd 1262 * and then have it executes by the cmd ioctl. 1263 * 1264 * cmdtest returns 1,2,3,4 or 0, depending on which tests 1265 * the command passes. */ 1266 1267 /* step 1: make sure trigger sources are trivially valid */ 1268 1269 tmp = cmd->start_src; 1270 cmd->start_src &= TRIG_INT; 1271 if (!cmd->start_src || tmp != cmd->start_src) 1272 err++; 1273 1274 tmp = cmd->scan_begin_src; 1275 cmd->scan_begin_src &= TRIG_TIMER | TRIG_EXT; 1276 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) 1277 err++; 1278 1279 tmp = cmd->convert_src; 1280 cmd->convert_src &= TRIG_NOW; 1281 if (!cmd->convert_src || tmp != cmd->convert_src) 1282 err++; 1283 1284 tmp = cmd->scan_end_src; 1285 cmd->scan_end_src &= TRIG_COUNT; 1286 if (!cmd->scan_end_src || tmp != cmd->scan_end_src) 1287 err++; 1288 1289 tmp = cmd->stop_src; 1290 cmd->stop_src &= TRIG_COUNT | TRIG_NONE; 1291 if (!cmd->stop_src || tmp != cmd->stop_src) 1292 err++; 1293 1294 if (err) 1295 return 1; 1296 1297 /* step 2: make sure trigger sources are unique and mutually compatible */ 1298 1299 if (cmd->scan_begin_src != TRIG_TIMER && 1300 cmd->scan_begin_src != TRIG_EXT) 1301 err++; 1302 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE) 1303 err++; 1304 1305 if (err) 1306 return 2; 1307 1308 /* step 3: make sure arguments are trivially compatible */ 1309 1310 if (cmd->start_arg != 0) { 1311 cmd->start_arg = 0; 1312 err++; 1313 } 1314 1315 if (cmd->scan_begin_src == TRIG_TIMER) { 1316 if (cmd->scan_begin_arg < thisboard->ao_scan_speed) { 1317 cmd->scan_begin_arg = thisboard->ao_scan_speed; 1318 err++; 1319 } 1320 } 1321 1322 if (cmd->scan_end_arg != cmd->chanlist_len) { 1323 cmd->scan_end_arg = cmd->chanlist_len; 1324 err++; 1325 } 1326 if (cmd->stop_src == TRIG_NONE) { 1327 /* TRIG_NONE */ 1328 if (cmd->stop_arg != 0) { 1329 cmd->stop_arg = 0; 1330 err++; 1331 } 1332 } 1333 1334 if (err) 1335 return 3; 1336 1337 /* step 4: fix up any arguments */ 1338 1339 if (cmd->scan_begin_src == TRIG_TIMER) { 1340 tmp = cmd->scan_begin_arg; 1341 i8253_cascade_ns_to_timer_2div(TIMER_BASE, 1342 &(devpriv->ao_divisor1), &(devpriv->ao_divisor2), 1343 &(cmd->scan_begin_arg), cmd->flags & TRIG_ROUND_MASK); 1344 if (tmp != cmd->scan_begin_arg) 1345 err++; 1346 } 1347 1348 if (err) 1349 return 4; 1350 1351 /* check channel/gain list against card's limitations */ 1352 if (cmd->chanlist && cmd->chanlist_len > 1) { 1353 if (CR_CHAN(cmd->chanlist[0]) != 0 || 1354 CR_CHAN(cmd->chanlist[1]) != 1) { 1355 comedi_error(dev, 1356 "channels must be ordered channel 0, channel 1 in chanlist\n"); 1357 err++; 1358 } 1359 } 1360 1361 if (err) 1362 return 5; 1363 1364 return 0; 1365} 1366 1367static int cb_pcidas_ao_cmd(struct comedi_device * dev, struct comedi_subdevice * s) 1368{ 1369 struct comedi_async *async = s->async; 1370 struct comedi_cmd *cmd = &async->cmd; 1371 unsigned int i; 1372 unsigned long flags; 1373 1374 /* set channel limits, gain */ 1375 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1376 for (i = 0; i < cmd->chanlist_len; i++) { 1377 /* enable channel */ 1378 devpriv->ao_control_bits |= 1379 DAC_CHAN_EN(CR_CHAN(cmd->chanlist[i])); 1380 /* set range */ 1381 devpriv->ao_control_bits |= DAC_RANGE(CR_CHAN(cmd->chanlist[i]), 1382 CR_RANGE(cmd->chanlist[i])); 1383 } 1384 1385 /* disable analog out before settings pacer source and count values */ 1386 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 1387 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1388 1389 /* clear fifo */ 1390 outw(0, devpriv->ao_registers + DACFIFOCLR); 1391 1392 /* load counters */ 1393 if (cmd->scan_begin_src == TRIG_TIMER) { 1394 i8253_cascade_ns_to_timer_2div(TIMER_BASE, 1395 &(devpriv->ao_divisor1), &(devpriv->ao_divisor2), 1396 &(cmd->scan_begin_arg), cmd->flags); 1397 1398 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */ 1399 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 1, 1400 devpriv->ao_divisor1, 2); 1401 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 2, 1402 devpriv->ao_divisor2, 2); 1403 } 1404 /* set number of conversions */ 1405 if (cmd->stop_src == TRIG_COUNT) { 1406 devpriv->ao_count = cmd->chanlist_len * cmd->stop_arg; 1407 } 1408 /* set pacer source */ 1409 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1410 switch (cmd->scan_begin_src) { 1411 case TRIG_TIMER: 1412 devpriv->ao_control_bits |= DAC_PACER_INT; 1413 break; 1414 case TRIG_EXT: 1415 devpriv->ao_control_bits |= DAC_PACER_EXT_RISE; 1416 break; 1417 default: 1418 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1419 comedi_error(dev, "error setting dac pacer source"); 1420 return -1; 1421 break; 1422 } 1423 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1424 1425 async->inttrig = cb_pcidas_ao_inttrig; 1426 1427 return 0; 1428} 1429 1430static int cb_pcidas_ao_inttrig(struct comedi_device *dev, 1431 struct comedi_subdevice *s, 1432 unsigned int trig_num) 1433{ 1434 unsigned int num_bytes, num_points = thisboard->fifo_size; 1435 struct comedi_async *async = s->async; 1436 struct comedi_cmd *cmd = &s->async->cmd; 1437 unsigned long flags; 1438 1439 if (trig_num != 0) 1440 return -EINVAL; 1441 1442 /* load up fifo */ 1443 if (cmd->stop_src == TRIG_COUNT && devpriv->ao_count < num_points) 1444 num_points = devpriv->ao_count; 1445 1446 num_bytes = cfc_read_array_from_buffer(s, devpriv->ao_buffer, 1447 num_points * sizeof(short)); 1448 num_points = num_bytes / sizeof(short); 1449 1450 if (cmd->stop_src == TRIG_COUNT) { 1451 devpriv->ao_count -= num_points; 1452 } 1453 /* write data to board's fifo */ 1454 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, num_bytes); 1455 1456 /* enable dac half-full and empty interrupts */ 1457 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1458 devpriv->adc_fifo_bits |= DAEMIE | DAHFIE; 1459#ifdef CB_PCIDAS_DEBUG 1460 rt_printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits); 1461#endif 1462 /* enable and clear interrupts */ 1463 outw(devpriv->adc_fifo_bits | DAEMI | DAHFI, 1464 devpriv->control_status + INT_ADCFIFO); 1465 1466 /* start dac */ 1467 devpriv->ao_control_bits |= DAC_START | DACEN | DAC_EMPTY; 1468 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 1469#ifdef CB_PCIDAS_DEBUG 1470 rt_printk("comedi: sent 0x%x to dac control\n", 1471 devpriv->ao_control_bits); 1472#endif 1473 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1474 1475 async->inttrig = NULL; 1476 1477 return 0; 1478} 1479 1480static irqreturn_t cb_pcidas_interrupt(int irq, void *d) 1481{ 1482 struct comedi_device *dev = (struct comedi_device *) d; 1483 struct comedi_subdevice *s = dev->read_subdev; 1484 struct comedi_async *async; 1485 int status, s5933_status; 1486 int half_fifo = thisboard->fifo_size / 2; 1487 unsigned int num_samples, i; 1488 static const int timeout = 10000; 1489 unsigned long flags; 1490 1491 if (dev->attached == 0) { 1492 return IRQ_NONE; 1493 } 1494 1495 async = s->async; 1496 async->events = 0; 1497 1498 s5933_status = inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR); 1499#ifdef CB_PCIDAS_DEBUG 1500 rt_printk("intcsr 0x%x\n", s5933_status); 1501 rt_printk("mbef 0x%x\n", inl(devpriv->s5933_config + AMCC_OP_REG_MBEF)); 1502#endif 1503 1504 if ((INTCSR_INTR_ASSERTED & s5933_status) == 0) 1505 return IRQ_NONE; 1506 1507 /* make sure mailbox 4 is empty */ 1508 inl_p(devpriv->s5933_config + AMCC_OP_REG_IMB4); 1509 /* clear interrupt on amcc s5933 */ 1510 outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS, 1511 devpriv->s5933_config + AMCC_OP_REG_INTCSR); 1512 1513 status = inw(devpriv->control_status + INT_ADCFIFO); 1514#ifdef CB_PCIDAS_DEBUG 1515 if ((status & (INT | EOAI | LADFUL | DAHFI | DAEMI)) == 0) { 1516 comedi_error(dev, "spurious interrupt"); 1517 } 1518#endif 1519 1520 /* check for analog output interrupt */ 1521 if (status & (DAHFI | DAEMI)) { 1522 handle_ao_interrupt(dev, status); 1523 } 1524 /* check for analog input interrupts */ 1525 /* if fifo half-full */ 1526 if (status & ADHFI) { 1527 /* read data */ 1528 num_samples = half_fifo; 1529 if (async->cmd.stop_src == TRIG_COUNT && 1530 num_samples > devpriv->count) { 1531 num_samples = devpriv->count; 1532 } 1533 insw(devpriv->adc_fifo + ADCDATA, devpriv->ai_buffer, 1534 num_samples); 1535 cfc_write_array_to_buffer(s, devpriv->ai_buffer, 1536 num_samples * sizeof(short)); 1537 devpriv->count -= num_samples; 1538 if (async->cmd.stop_src == TRIG_COUNT && devpriv->count == 0) { 1539 async->events |= COMEDI_CB_EOA; 1540 cb_pcidas_cancel(dev, s); 1541 } 1542 /* clear half-full interrupt latch */ 1543 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1544 outw(devpriv->adc_fifo_bits | INT, 1545 devpriv->control_status + INT_ADCFIFO); 1546 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1547 /* else if fifo not empty */ 1548 } else if (status & (ADNEI | EOBI)) { 1549 for (i = 0; i < timeout; i++) { 1550 /* break if fifo is empty */ 1551 if ((ADNE & inw(devpriv->control_status + 1552 INT_ADCFIFO)) == 0) 1553 break; 1554 cfc_write_to_buffer(s, inw(devpriv->adc_fifo)); 1555 if (async->cmd.stop_src == TRIG_COUNT && --devpriv->count == 0) { /* end of acquisition */ 1556 cb_pcidas_cancel(dev, s); 1557 async->events |= COMEDI_CB_EOA; 1558 break; 1559 } 1560 } 1561 /* clear not-empty interrupt latch */ 1562 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1563 outw(devpriv->adc_fifo_bits | INT, 1564 devpriv->control_status + INT_ADCFIFO); 1565 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1566 } else if (status & EOAI) { 1567 comedi_error(dev, 1568 "bug! encountered end of aquisition interrupt?"); 1569 /* clear EOA interrupt latch */ 1570 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1571 outw(devpriv->adc_fifo_bits | EOAI, 1572 devpriv->control_status + INT_ADCFIFO); 1573 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1574 } 1575 /* check for fifo overflow */ 1576 if (status & LADFUL) { 1577 comedi_error(dev, "fifo overflow"); 1578 /* clear overflow interrupt latch */ 1579 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1580 outw(devpriv->adc_fifo_bits | LADFUL, 1581 devpriv->control_status + INT_ADCFIFO); 1582 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1583 cb_pcidas_cancel(dev, s); 1584 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; 1585 } 1586 1587 comedi_event(dev, s); 1588 1589 return IRQ_HANDLED; 1590} 1591 1592static void handle_ao_interrupt(struct comedi_device * dev, unsigned int status) 1593{ 1594 struct comedi_subdevice *s = dev->write_subdev; 1595 struct comedi_async *async = s->async; 1596 struct comedi_cmd *cmd = &async->cmd; 1597 unsigned int half_fifo = thisboard->fifo_size / 2; 1598 unsigned int num_points; 1599 unsigned int flags; 1600 1601 async->events = 0; 1602 1603 if (status & DAEMI) { 1604 /* clear dac empty interrupt latch */ 1605 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1606 outw(devpriv->adc_fifo_bits | DAEMI, 1607 devpriv->control_status + INT_ADCFIFO); 1608 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1609 if (inw(devpriv->ao_registers + DAC_CSR) & DAC_EMPTY) { 1610 if (cmd->stop_src == TRIG_NONE || 1611 (cmd->stop_src == TRIG_COUNT 1612 && devpriv->ao_count)) { 1613 comedi_error(dev, "dac fifo underflow"); 1614 cb_pcidas_ao_cancel(dev, s); 1615 async->events |= COMEDI_CB_ERROR; 1616 } 1617 async->events |= COMEDI_CB_EOA; 1618 } 1619 } else if (status & DAHFI) { 1620 unsigned int num_bytes; 1621 1622 /* figure out how many points we are writing to fifo */ 1623 num_points = half_fifo; 1624 if (cmd->stop_src == TRIG_COUNT && 1625 devpriv->ao_count < num_points) 1626 num_points = devpriv->ao_count; 1627 num_bytes = 1628 cfc_read_array_from_buffer(s, devpriv->ao_buffer, 1629 num_points * sizeof(short)); 1630 num_points = num_bytes / sizeof(short); 1631 1632 if (async->cmd.stop_src == TRIG_COUNT) { 1633 devpriv->ao_count -= num_points; 1634 } 1635 /* write data to board's fifo */ 1636 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, 1637 num_points); 1638 /* clear half-full interrupt latch */ 1639 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1640 outw(devpriv->adc_fifo_bits | DAHFI, 1641 devpriv->control_status + INT_ADCFIFO); 1642 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1643 } 1644 1645 comedi_event(dev, s); 1646} 1647 1648/* cancel analog input command */ 1649static int cb_pcidas_cancel(struct comedi_device * dev, struct comedi_subdevice * s) 1650{ 1651 unsigned long flags; 1652 1653 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1654 /* disable interrupts */ 1655 devpriv->adc_fifo_bits &= ~INTE & ~EOAIE; 1656 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO); 1657 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1658 1659 /* disable start trigger source and burst mode */ 1660 outw(0, devpriv->control_status + TRIG_CONTSTAT); 1661 /* software pacer source */ 1662 outw(0, devpriv->control_status + ADCMUX_CONT); 1663 1664 return 0; 1665} 1666 1667/* cancel analog output command */ 1668static int cb_pcidas_ao_cancel(struct comedi_device *dev, 1669 struct comedi_subdevice *s) 1670{ 1671 unsigned long flags; 1672 1673 comedi_spin_lock_irqsave(&dev->spinlock, flags); 1674 /* disable interrupts */ 1675 devpriv->adc_fifo_bits &= ~DAHFIE & ~DAEMIE; 1676 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO); 1677 1678 /* disable output */ 1679 devpriv->ao_control_bits &= ~DACEN & ~DAC_PACER_MASK; 1680 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 1681 comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1682 1683 return 0; 1684} 1685 1686static void cb_pcidas_load_counters(struct comedi_device * dev, unsigned int *ns, 1687 int rounding_flags) 1688{ 1689 i8253_cascade_ns_to_timer_2div(TIMER_BASE, &(devpriv->divisor1), 1690 &(devpriv->divisor2), ns, rounding_flags & TRIG_ROUND_MASK); 1691 1692 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */ 1693 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 1, 1694 devpriv->divisor1, 2); 1695 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 2, 1696 devpriv->divisor2, 2); 1697} 1698 1699static void write_calibration_bitstream(struct comedi_device * dev, 1700 unsigned int register_bits, unsigned int bitstream, 1701 unsigned int bitstream_length) 1702{ 1703 static const int write_delay = 1; 1704 unsigned int bit; 1705 1706 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) { 1707 if (bitstream & bit) 1708 register_bits |= SERIAL_DATA_IN_BIT; 1709 else 1710 register_bits &= ~SERIAL_DATA_IN_BIT; 1711 comedi_udelay(write_delay); 1712 outw(register_bits, devpriv->control_status + CALIBRATION_REG); 1713 } 1714} 1715 1716static int caldac_8800_write(struct comedi_device * dev, unsigned int address, 1717 uint8_t value) 1718{ 1719 static const int num_caldac_channels = 8; 1720 static const int bitstream_length = 11; 1721 unsigned int bitstream = ((address & 0x7) << 8) | value; 1722 static const int caldac_8800_comedi_udelay = 1; 1723 1724 if (address >= num_caldac_channels) { 1725 comedi_error(dev, "illegal caldac channel"); 1726 return -1; 1727 } 1728 1729 if (value == devpriv->caldac_value[address]) 1730 return 1; 1731 1732 devpriv->caldac_value[address] = value; 1733 1734 write_calibration_bitstream(dev, cal_enable_bits(dev), bitstream, 1735 bitstream_length); 1736 1737 comedi_udelay(caldac_8800_comedi_udelay); 1738 outw(cal_enable_bits(dev) | SELECT_8800_BIT, 1739 devpriv->control_status + CALIBRATION_REG); 1740 comedi_udelay(caldac_8800_comedi_udelay); 1741 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG); 1742 1743 return 1; 1744} 1745 1746static int trimpot_7376_write(struct comedi_device * dev, uint8_t value) 1747{ 1748 static const int bitstream_length = 7; 1749 unsigned int bitstream = value & 0x7f; 1750 unsigned int register_bits; 1751 static const int ad7376_comedi_udelay = 1; 1752 1753 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT; 1754 comedi_udelay(ad7376_comedi_udelay); 1755 outw(register_bits, devpriv->control_status + CALIBRATION_REG); 1756 1757 write_calibration_bitstream(dev, register_bits, bitstream, 1758 bitstream_length); 1759 1760 comedi_udelay(ad7376_comedi_udelay); 1761 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG); 1762 1763 return 0; 1764} 1765 1766/* For 1602/16 only 1767 * ch 0 : adc gain 1768 * ch 1 : adc postgain offset */ 1769static int trimpot_8402_write(struct comedi_device * dev, unsigned int channel, 1770 uint8_t value) 1771{ 1772 static const int bitstream_length = 10; 1773 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff); 1774 unsigned int register_bits; 1775 static const int ad8402_comedi_udelay = 1; 1776 1777 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT; 1778 comedi_udelay(ad8402_comedi_udelay); 1779 outw(register_bits, devpriv->control_status + CALIBRATION_REG); 1780 1781 write_calibration_bitstream(dev, register_bits, bitstream, 1782 bitstream_length); 1783 1784 comedi_udelay(ad8402_comedi_udelay); 1785 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG); 1786 1787 return 0; 1788} 1789 1790static int wait_for_nvram_ready(unsigned long s5933_base_addr) 1791{ 1792 static const int timeout = 1000; 1793 unsigned int i; 1794 1795 for (i = 0; i < timeout; i++) { 1796 if ((inb(s5933_base_addr + 1797 AMCC_OP_REG_MCSR_NVCMD) & MCSR_NV_BUSY) 1798 == 0) 1799 return 0; 1800 comedi_udelay(1); 1801 } 1802 return -1; 1803} 1804 1805static int nvram_read(struct comedi_device * dev, unsigned int address, uint8_t * data) 1806{ 1807 unsigned long iobase = devpriv->s5933_config; 1808 1809 if (wait_for_nvram_ready(iobase) < 0) 1810 return -ETIMEDOUT; 1811 1812 outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_LOW_ADDR, 1813 iobase + AMCC_OP_REG_MCSR_NVCMD); 1814 outb(address & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA); 1815 outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_HIGH_ADDR, 1816 iobase + AMCC_OP_REG_MCSR_NVCMD); 1817 outb((address >> 8) & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA); 1818 outb(MCSR_NV_ENABLE | MCSR_NV_READ, iobase + AMCC_OP_REG_MCSR_NVCMD); 1819 1820 if (wait_for_nvram_ready(iobase) < 0) 1821 return -ETIMEDOUT; 1822 1823 *data = inb(iobase + AMCC_OP_REG_MCSR_NVDATA); 1824 1825 return 0; 1826} 1827 1828/* 1829 * A convenient macro that defines init_module() and cleanup_module(), 1830 * as necessary. 1831 */ 1832COMEDI_PCI_INITCLEANUP(driver_cb_pcidas, cb_pcidas_pci_table); 1833