multiq3.c revision 0a85b6f0ab0d2edb0d41b32697111ce0e4f43496
1/* 2 comedi/drivers/multiq3.c 3 Hardware driver for Quanser Consulting MultiQ-3 board 4 5 COMEDI - Linux Control and Measurement Device Interface 6 Copyright (C) 1999 Anders Blomdell <anders.blomdell@control.lth.se> 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 22 */ 23/* 24Driver: multiq3 25Description: Quanser Consulting MultiQ-3 26Author: Anders Blomdell <anders.blomdell@control.lth.se> 27Status: works 28Devices: [Quanser Consulting] MultiQ-3 (multiq3) 29 30*/ 31 32#include <linux/interrupt.h> 33#include "../comedidev.h" 34 35#include <linux/ioport.h> 36 37#define MULTIQ3_SIZE 16 38 39/* 40 * MULTIQ-3 port offsets 41 */ 42#define MULTIQ3_DIGIN_PORT 0 43#define MULTIQ3_DIGOUT_PORT 0 44#define MULTIQ3_DAC_DATA 2 45#define MULTIQ3_AD_DATA 4 46#define MULTIQ3_AD_CS 4 47#define MULTIQ3_STATUS 6 48#define MULTIQ3_CONTROL 6 49#define MULTIQ3_CLK_DATA 8 50#define MULTIQ3_ENC_DATA 12 51#define MULTIQ3_ENC_CONTROL 14 52 53/* 54 * flags for CONTROL register 55 */ 56#define MULTIQ3_AD_MUX_EN 0x0040 57#define MULTIQ3_AD_AUTOZ 0x0080 58#define MULTIQ3_AD_AUTOCAL 0x0100 59#define MULTIQ3_AD_SH 0x0200 60#define MULTIQ3_AD_CLOCK_4M 0x0400 61#define MULTIQ3_DA_LOAD 0x1800 62 63#define MULTIQ3_CONTROL_MUST 0x0600 64 65/* 66 * flags for STATUS register 67 */ 68#define MULTIQ3_STATUS_EOC 0x008 69#define MULTIQ3_STATUS_EOC_I 0x010 70 71/* 72 * flags for encoder control 73 */ 74#define MULTIQ3_CLOCK_DATA 0x00 75#define MULTIQ3_CLOCK_SETUP 0x18 76#define MULTIQ3_INPUT_SETUP 0x41 77#define MULTIQ3_QUAD_X4 0x38 78#define MULTIQ3_BP_RESET 0x01 79#define MULTIQ3_CNTR_RESET 0x02 80#define MULTIQ3_TRSFRPR_CTR 0x08 81#define MULTIQ3_TRSFRCNTR_OL 0x10 82#define MULTIQ3_EFLAG_RESET 0x06 83 84#define MULTIQ3_TIMEOUT 30 85 86static int multiq3_attach(struct comedi_device *dev, 87 struct comedi_devconfig *it); 88static int multiq3_detach(struct comedi_device *dev); 89static struct comedi_driver driver_multiq3 = { 90 .driver_name = "multiq3", 91 .module = THIS_MODULE, 92 .attach = multiq3_attach, 93 .detach = multiq3_detach, 94}; 95 96COMEDI_INITCLEANUP(driver_multiq3); 97 98struct multiq3_private { 99 unsigned int ao_readback[2]; 100}; 101#define devpriv ((struct multiq3_private *)dev->private) 102 103static int multiq3_ai_insn_read(struct comedi_device *dev, 104 struct comedi_subdevice *s, 105 struct comedi_insn *insn, unsigned int *data) 106{ 107 int i, n; 108 int chan; 109 unsigned int hi, lo; 110 111 chan = CR_CHAN(insn->chanspec); 112 outw(MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3), 113 dev->iobase + MULTIQ3_CONTROL); 114 115 for (i = 0; i < MULTIQ3_TIMEOUT; i++) { 116 if (inw(dev->iobase + MULTIQ3_STATUS) & MULTIQ3_STATUS_EOC) 117 break; 118 } 119 if (i == MULTIQ3_TIMEOUT) 120 return -ETIMEDOUT; 121 122 for (n = 0; n < insn->n; n++) { 123 outw(0, dev->iobase + MULTIQ3_AD_CS); 124 for (i = 0; i < MULTIQ3_TIMEOUT; i++) { 125 if (inw(dev->iobase + 126 MULTIQ3_STATUS) & MULTIQ3_STATUS_EOC_I) 127 break; 128 } 129 if (i == MULTIQ3_TIMEOUT) 130 return -ETIMEDOUT; 131 132 hi = inb(dev->iobase + MULTIQ3_AD_CS); 133 lo = inb(dev->iobase + MULTIQ3_AD_CS); 134 data[n] = (((hi << 8) | lo) + 0x1000) & 0x1fff; 135 } 136 137 return n; 138} 139 140static int multiq3_ao_insn_read(struct comedi_device *dev, 141 struct comedi_subdevice *s, 142 struct comedi_insn *insn, unsigned int *data) 143{ 144 int i; 145 int chan = CR_CHAN(insn->chanspec); 146 147 for (i = 0; i < insn->n; i++) { 148 data[i] = devpriv->ao_readback[chan]; 149 } 150 151 return i; 152} 153 154static int multiq3_ao_insn_write(struct comedi_device *dev, 155 struct comedi_subdevice *s, 156 struct comedi_insn *insn, unsigned int *data) 157{ 158 int i; 159 int chan = CR_CHAN(insn->chanspec); 160 161 for (i = 0; i < insn->n; i++) { 162 outw(MULTIQ3_CONTROL_MUST | MULTIQ3_DA_LOAD | chan, 163 dev->iobase + MULTIQ3_CONTROL); 164 outw(data[i], dev->iobase + MULTIQ3_DAC_DATA); 165 outw(MULTIQ3_CONTROL_MUST, dev->iobase + MULTIQ3_CONTROL); 166 167 devpriv->ao_readback[chan] = data[i]; 168 } 169 170 return i; 171} 172 173static int multiq3_di_insn_bits(struct comedi_device *dev, 174 struct comedi_subdevice *s, 175 struct comedi_insn *insn, unsigned int *data) 176{ 177 if (insn->n != 2) 178 return -EINVAL; 179 180 data[1] = inw(dev->iobase + MULTIQ3_DIGIN_PORT); 181 182 return 2; 183} 184 185static int multiq3_do_insn_bits(struct comedi_device *dev, 186 struct comedi_subdevice *s, 187 struct comedi_insn *insn, unsigned int *data) 188{ 189 if (insn->n != 2) 190 return -EINVAL; 191 192 s->state &= ~data[0]; 193 s->state |= (data[0] & data[1]); 194 outw(s->state, dev->iobase + MULTIQ3_DIGOUT_PORT); 195 196 data[1] = s->state; 197 198 return 2; 199} 200 201static int multiq3_encoder_insn_read(struct comedi_device *dev, 202 struct comedi_subdevice *s, 203 struct comedi_insn *insn, 204 unsigned int *data) 205{ 206 int n; 207 int chan = CR_CHAN(insn->chanspec); 208 int control = MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3); 209 210 for (n = 0; n < insn->n; n++) { 211 int value; 212 outw(control, dev->iobase + MULTIQ3_CONTROL); 213 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CONTROL); 214 outb(MULTIQ3_TRSFRCNTR_OL, dev->iobase + MULTIQ3_ENC_CONTROL); 215 value = inb(dev->iobase + MULTIQ3_ENC_DATA); 216 value |= (inb(dev->iobase + MULTIQ3_ENC_DATA) << 8); 217 value |= (inb(dev->iobase + MULTIQ3_ENC_DATA) << 16); 218 data[n] = (value + 0x800000) & 0xffffff; 219 } 220 221 return n; 222} 223 224static void encoder_reset(struct comedi_device *dev) 225{ 226 int chan; 227 for (chan = 0; chan < dev->subdevices[4].n_chan; chan++) { 228 int control = 229 MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3); 230 outw(control, dev->iobase + MULTIQ3_CONTROL); 231 outb(MULTIQ3_EFLAG_RESET, dev->iobase + MULTIQ3_ENC_CONTROL); 232 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CONTROL); 233 outb(MULTIQ3_CLOCK_DATA, dev->iobase + MULTIQ3_ENC_DATA); 234 outb(MULTIQ3_CLOCK_SETUP, dev->iobase + MULTIQ3_ENC_CONTROL); 235 outb(MULTIQ3_INPUT_SETUP, dev->iobase + MULTIQ3_ENC_CONTROL); 236 outb(MULTIQ3_QUAD_X4, dev->iobase + MULTIQ3_ENC_CONTROL); 237 outb(MULTIQ3_CNTR_RESET, dev->iobase + MULTIQ3_ENC_CONTROL); 238 } 239} 240 241/* 242 options[0] - I/O port 243 options[1] - irq 244 options[2] - number of encoder chips installed 245 */ 246 247static int multiq3_attach(struct comedi_device *dev, 248 struct comedi_devconfig *it) 249{ 250 int result = 0; 251 unsigned long iobase; 252 unsigned int irq; 253 struct comedi_subdevice *s; 254 255 iobase = it->options[0]; 256 printk("comedi%d: multiq3: 0x%04lx ", dev->minor, iobase); 257 if (!request_region(iobase, MULTIQ3_SIZE, "multiq3")) { 258 printk("comedi%d: I/O port conflict\n", dev->minor); 259 return -EIO; 260 } 261 262 dev->iobase = iobase; 263 264 irq = it->options[1]; 265 if (irq) { 266 printk("comedi%d: irq = %u ignored\n", dev->minor, irq); 267 } else { 268 printk("comedi%d: no irq\n", dev->minor); 269 } 270 dev->board_name = "multiq3"; 271 result = alloc_subdevices(dev, 5); 272 if (result < 0) 273 return result; 274 275 result = alloc_private(dev, sizeof(struct multiq3_private)); 276 if (result < 0) 277 return result; 278 279 s = dev->subdevices + 0; 280 /* ai subdevice */ 281 s->type = COMEDI_SUBD_AI; 282 s->subdev_flags = SDF_READABLE | SDF_GROUND; 283 s->n_chan = 8; 284 s->insn_read = multiq3_ai_insn_read; 285 s->maxdata = 0x1fff; 286 s->range_table = &range_bipolar5; 287 288 s = dev->subdevices + 1; 289 /* ao subdevice */ 290 s->type = COMEDI_SUBD_AO; 291 s->subdev_flags = SDF_WRITABLE; 292 s->n_chan = 8; 293 s->insn_read = multiq3_ao_insn_read; 294 s->insn_write = multiq3_ao_insn_write; 295 s->maxdata = 0xfff; 296 s->range_table = &range_bipolar5; 297 298 s = dev->subdevices + 2; 299 /* di subdevice */ 300 s->type = COMEDI_SUBD_DI; 301 s->subdev_flags = SDF_READABLE; 302 s->n_chan = 16; 303 s->insn_bits = multiq3_di_insn_bits; 304 s->maxdata = 1; 305 s->range_table = &range_digital; 306 307 s = dev->subdevices + 3; 308 /* do subdevice */ 309 s->type = COMEDI_SUBD_DO; 310 s->subdev_flags = SDF_WRITABLE; 311 s->n_chan = 16; 312 s->insn_bits = multiq3_do_insn_bits; 313 s->maxdata = 1; 314 s->range_table = &range_digital; 315 s->state = 0; 316 317 s = dev->subdevices + 4; 318 /* encoder (counter) subdevice */ 319 s->type = COMEDI_SUBD_COUNTER; 320 s->subdev_flags = SDF_READABLE | SDF_LSAMPL; 321 s->n_chan = it->options[2] * 2; 322 s->insn_read = multiq3_encoder_insn_read; 323 s->maxdata = 0xffffff; 324 s->range_table = &range_unknown; 325 326 encoder_reset(dev); 327 328 return 0; 329} 330 331static int multiq3_detach(struct comedi_device *dev) 332{ 333 printk("comedi%d: multiq3: remove\n", dev->minor); 334 335 if (dev->iobase) { 336 release_region(dev->iobase, MULTIQ3_SIZE); 337 } 338 if (dev->irq) { 339 free_irq(dev->irq, dev); 340 } 341 342 return 0; 343} 344