ni_6527.c revision 4e40cee9c8a46d4231d28ae7ae6d9938cf0526d5
1/* 2 comedi/drivers/ni_6527.c 3 driver for National Instruments PCI-6527 4 5 COMEDI - Linux Control and Measurement Device Interface 6 Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org> 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 22*/ 23/* 24Driver: ni_6527 25Description: National Instruments 6527 26Author: ds 27Status: works 28Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527 29Updated: Sat, 25 Jan 2003 13:24:40 -0800 30 31 32*/ 33 34/* 35 Manuals (available from ftp://ftp.natinst.com/support/manuals) 36 37 370106b.pdf 6527 Register Level Programmer Manual 38 39 */ 40 41#define DEBUG 1 42#define DEBUG_FLAGS 43 44#include <linux/interrupt.h> 45#include "../comedidev.h" 46 47#include "mite.h" 48 49#define NI6527_DIO_SIZE 4096 50#define NI6527_MITE_SIZE 4096 51 52#define Port_Register(x) (0x00+(x)) 53#define ID_Register 0x06 54 55#define Clear_Register 0x07 56#define ClrEdge 0x08 57#define ClrOverflow 0x04 58#define ClrFilter 0x02 59#define ClrInterval 0x01 60 61#define Filter_Interval(x) (0x08+(x)) 62#define Filter_Enable(x) (0x0c+(x)) 63 64#define Change_Status 0x14 65#define MasterInterruptStatus 0x04 66#define Overflow 0x02 67#define EdgeStatus 0x01 68 69#define Master_Interrupt_Control 0x15 70#define FallingEdgeIntEnable 0x10 71#define RisingEdgeIntEnable 0x08 72#define MasterInterruptEnable 0x04 73#define OverflowIntEnable 0x02 74#define EdgeIntEnable 0x01 75 76#define Rising_Edge_Detection_Enable(x) (0x018+(x)) 77#define Falling_Edge_Detection_Enable(x) (0x020+(x)) 78 79static int ni6527_attach(struct comedi_device *dev, 80 struct comedi_devconfig *it); 81static int ni6527_detach(struct comedi_device *dev); 82static struct comedi_driver driver_ni6527 = { 83 .driver_name = "ni6527", 84 .module = THIS_MODULE, 85 .attach = ni6527_attach, 86 .detach = ni6527_detach, 87}; 88 89struct ni6527_board { 90 91 int dev_id; 92 const char *name; 93}; 94 95static const struct ni6527_board ni6527_boards[] = { 96 { 97 .dev_id = 0x2b20, 98 .name = "pci-6527", 99 }, 100 { 101 .dev_id = 0x2b10, 102 .name = "pxi-6527", 103 }, 104}; 105 106#define n_ni6527_boards ARRAY_SIZE(ni6527_boards) 107#define this_board ((const struct ni6527_board *)dev->board_ptr) 108 109static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = { 110 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2b10)}, 111 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2b20)}, 112 {0} 113}; 114 115MODULE_DEVICE_TABLE(pci, ni6527_pci_table); 116 117struct ni6527_private { 118 struct mite_struct *mite; 119 unsigned int filter_interval; 120 unsigned int filter_enable; 121}; 122 123#define devpriv ((struct ni6527_private *)dev->private) 124 125static int ni6527_find_device(struct comedi_device *dev, int bus, int slot); 126 127static int ni6527_di_insn_config(struct comedi_device *dev, 128 struct comedi_subdevice *s, 129 struct comedi_insn *insn, unsigned int *data) 130{ 131 int chan = CR_CHAN(insn->chanspec); 132 unsigned int interval; 133 134 if (insn->n != 2) 135 return -EINVAL; 136 137 if (data[0] != INSN_CONFIG_FILTER) 138 return -EINVAL; 139 140 if (data[1]) { 141 interval = (data[1] + 100) / 200; 142 data[1] = interval * 200; 143 144 if (interval != devpriv->filter_interval) { 145 writeb(interval & 0xff, 146 devpriv->mite->daq_io_addr + Filter_Interval(0)); 147 writeb((interval >> 8) & 0xff, 148 devpriv->mite->daq_io_addr + Filter_Interval(1)); 149 writeb((interval >> 16) & 0x0f, 150 devpriv->mite->daq_io_addr + Filter_Interval(2)); 151 152 writeb(ClrInterval, 153 devpriv->mite->daq_io_addr + Clear_Register); 154 155 devpriv->filter_interval = interval; 156 } 157 158 devpriv->filter_enable |= 1 << chan; 159 } else { 160 devpriv->filter_enable &= ~(1 << chan); 161 } 162 163 writeb(devpriv->filter_enable, 164 devpriv->mite->daq_io_addr + Filter_Enable(0)); 165 writeb(devpriv->filter_enable >> 8, 166 devpriv->mite->daq_io_addr + Filter_Enable(1)); 167 writeb(devpriv->filter_enable >> 16, 168 devpriv->mite->daq_io_addr + Filter_Enable(2)); 169 170 return 2; 171} 172 173static int ni6527_di_insn_bits(struct comedi_device *dev, 174 struct comedi_subdevice *s, 175 struct comedi_insn *insn, unsigned int *data) 176{ 177 if (insn->n != 2) 178 return -EINVAL; 179 180 data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0)); 181 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8; 182 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16; 183 184 return 2; 185} 186 187static int ni6527_do_insn_bits(struct comedi_device *dev, 188 struct comedi_subdevice *s, 189 struct comedi_insn *insn, unsigned int *data) 190{ 191 if (insn->n != 2) 192 return -EINVAL; 193 if (data[0]) { 194 s->state &= ~data[0]; 195 s->state |= (data[0] & data[1]); 196 197 /* The open relay state on the board cooresponds to 1, 198 * but in Comedi, it is represented by 0. */ 199 if (data[0] & 0x0000ff) { 200 writeb((s->state ^ 0xff), 201 devpriv->mite->daq_io_addr + Port_Register(3)); 202 } 203 if (data[0] & 0x00ff00) { 204 writeb((s->state >> 8) ^ 0xff, 205 devpriv->mite->daq_io_addr + Port_Register(4)); 206 } 207 if (data[0] & 0xff0000) { 208 writeb((s->state >> 16) ^ 0xff, 209 devpriv->mite->daq_io_addr + Port_Register(5)); 210 } 211 } 212 data[1] = s->state; 213 214 return 2; 215} 216 217static irqreturn_t ni6527_interrupt(int irq, void *d) 218{ 219 struct comedi_device *dev = d; 220 struct comedi_subdevice *s = dev->subdevices + 2; 221 unsigned int status; 222 223 status = readb(devpriv->mite->daq_io_addr + Change_Status); 224 if ((status & MasterInterruptStatus) == 0) 225 return IRQ_NONE; 226 if ((status & EdgeStatus) == 0) 227 return IRQ_NONE; 228 229 writeb(ClrEdge | ClrOverflow, 230 devpriv->mite->daq_io_addr + Clear_Register); 231 232 comedi_buf_put(s->async, 0); 233 s->async->events |= COMEDI_CB_EOS; 234 comedi_event(dev, s); 235 return IRQ_HANDLED; 236} 237 238static int ni6527_intr_cmdtest(struct comedi_device *dev, 239 struct comedi_subdevice *s, 240 struct comedi_cmd *cmd) 241{ 242 int err = 0; 243 int tmp; 244 245 /* step 1: make sure trigger sources are trivially valid */ 246 247 tmp = cmd->start_src; 248 cmd->start_src &= TRIG_NOW; 249 if (!cmd->start_src || tmp != cmd->start_src) 250 err++; 251 252 tmp = cmd->scan_begin_src; 253 cmd->scan_begin_src &= TRIG_OTHER; 254 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) 255 err++; 256 257 tmp = cmd->convert_src; 258 cmd->convert_src &= TRIG_FOLLOW; 259 if (!cmd->convert_src || tmp != cmd->convert_src) 260 err++; 261 262 tmp = cmd->scan_end_src; 263 cmd->scan_end_src &= TRIG_COUNT; 264 if (!cmd->scan_end_src || tmp != cmd->scan_end_src) 265 err++; 266 267 tmp = cmd->stop_src; 268 cmd->stop_src &= TRIG_COUNT; 269 if (!cmd->stop_src || tmp != cmd->stop_src) 270 err++; 271 272 if (err) 273 return 1; 274 275 /* step 2: make sure trigger sources are unique and */ 276 /* are mutually compatible */ 277 278 if (err) 279 return 2; 280 281 /* step 3: make sure arguments are trivially compatible */ 282 283 if (cmd->start_arg != 0) { 284 cmd->start_arg = 0; 285 err++; 286 } 287 if (cmd->scan_begin_arg != 0) { 288 cmd->scan_begin_arg = 0; 289 err++; 290 } 291 if (cmd->convert_arg != 0) { 292 cmd->convert_arg = 0; 293 err++; 294 } 295 296 if (cmd->scan_end_arg != 1) { 297 cmd->scan_end_arg = 1; 298 err++; 299 } 300 if (cmd->stop_arg != 0) { 301 cmd->stop_arg = 0; 302 err++; 303 } 304 305 if (err) 306 return 3; 307 308 /* step 4: fix up any arguments */ 309 310 if (err) 311 return 4; 312 313 return 0; 314} 315 316static int ni6527_intr_cmd(struct comedi_device *dev, 317 struct comedi_subdevice *s) 318{ 319 /* struct comedi_cmd *cmd = &s->async->cmd; */ 320 321 writeb(ClrEdge | ClrOverflow, 322 devpriv->mite->daq_io_addr + Clear_Register); 323 writeb(FallingEdgeIntEnable | RisingEdgeIntEnable | 324 MasterInterruptEnable | EdgeIntEnable, 325 devpriv->mite->daq_io_addr + Master_Interrupt_Control); 326 327 return 0; 328} 329 330static int ni6527_intr_cancel(struct comedi_device *dev, 331 struct comedi_subdevice *s) 332{ 333 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control); 334 335 return 0; 336} 337 338static int ni6527_intr_insn_bits(struct comedi_device *dev, 339 struct comedi_subdevice *s, 340 struct comedi_insn *insn, unsigned int *data) 341{ 342 if (insn->n < 1) 343 return -EINVAL; 344 345 data[1] = 0; 346 return 2; 347} 348 349static int ni6527_intr_insn_config(struct comedi_device *dev, 350 struct comedi_subdevice *s, 351 struct comedi_insn *insn, unsigned int *data) 352{ 353 if (insn->n < 1) 354 return -EINVAL; 355 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY) 356 return -EINVAL; 357 358 writeb(data[1], 359 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(0)); 360 writeb(data[1] >> 8, 361 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(1)); 362 writeb(data[1] >> 16, 363 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(2)); 364 365 writeb(data[2], 366 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(0)); 367 writeb(data[2] >> 8, 368 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(1)); 369 writeb(data[2] >> 16, 370 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(2)); 371 372 return 2; 373} 374 375static int ni6527_attach(struct comedi_device *dev, struct comedi_devconfig *it) 376{ 377 struct comedi_subdevice *s; 378 int ret; 379 380 printk(KERN_INFO "comedi%d: ni6527\n", dev->minor); 381 382 ret = alloc_private(dev, sizeof(struct ni6527_private)); 383 if (ret < 0) 384 return ret; 385 386 ret = ni6527_find_device(dev, it->options[0], it->options[1]); 387 if (ret < 0) 388 return ret; 389 390 ret = mite_setup(devpriv->mite); 391 if (ret < 0) { 392 printk(KERN_ERR "comedi: error setting up mite\n"); 393 return ret; 394 } 395 396 dev->board_name = this_board->name; 397 printk(KERN_INFO "comedi board: %s, ID=0x%02x\n", dev->board_name, 398 readb(devpriv->mite->daq_io_addr + ID_Register)); 399 400 ret = alloc_subdevices(dev, 3); 401 if (ret < 0) 402 return ret; 403 404 s = dev->subdevices + 0; 405 s->type = COMEDI_SUBD_DI; 406 s->subdev_flags = SDF_READABLE; 407 s->n_chan = 24; 408 s->range_table = &range_digital; 409 s->maxdata = 1; 410 s->insn_config = ni6527_di_insn_config; 411 s->insn_bits = ni6527_di_insn_bits; 412 413 s = dev->subdevices + 1; 414 s->type = COMEDI_SUBD_DO; 415 s->subdev_flags = SDF_READABLE | SDF_WRITABLE; 416 s->n_chan = 24; 417 s->range_table = &range_unknown; /* FIXME: actually conductance */ 418 s->maxdata = 1; 419 s->insn_bits = ni6527_do_insn_bits; 420 421 s = dev->subdevices + 2; 422 dev->read_subdev = s; 423 s->type = COMEDI_SUBD_DI; 424 s->subdev_flags = SDF_READABLE | SDF_CMD_READ; 425 s->n_chan = 1; 426 s->range_table = &range_unknown; 427 s->maxdata = 1; 428 s->do_cmdtest = ni6527_intr_cmdtest; 429 s->do_cmd = ni6527_intr_cmd; 430 s->cancel = ni6527_intr_cancel; 431 s->insn_bits = ni6527_intr_insn_bits; 432 s->insn_config = ni6527_intr_insn_config; 433 434 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(0)); 435 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(1)); 436 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(2)); 437 438 writeb(ClrEdge | ClrOverflow | ClrFilter | ClrInterval, 439 devpriv->mite->daq_io_addr + Clear_Register); 440 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control); 441 442 ret = request_irq(mite_irq(devpriv->mite), ni6527_interrupt, 443 IRQF_SHARED, "ni6527", dev); 444 if (ret < 0) 445 printk(KERN_WARNING "comedi i6527 irq not available\n"); 446 else 447 dev->irq = mite_irq(devpriv->mite); 448 449 return 0; 450} 451 452static int ni6527_detach(struct comedi_device *dev) 453{ 454 if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) 455 writeb(0x00, 456 devpriv->mite->daq_io_addr + Master_Interrupt_Control); 457 458 if (dev->irq) 459 free_irq(dev->irq, dev); 460 461 if (devpriv && devpriv->mite) 462 mite_unsetup(devpriv->mite); 463 464 return 0; 465} 466 467static int ni6527_find_device(struct comedi_device *dev, int bus, int slot) 468{ 469 struct mite_struct *mite; 470 int i; 471 472 for (mite = mite_devices; mite; mite = mite->next) { 473 if (mite->used) 474 continue; 475 if (bus || slot) { 476 if (bus != mite->pcidev->bus->number || 477 slot != PCI_SLOT(mite->pcidev->devfn)) 478 continue; 479 } 480 for (i = 0; i < n_ni6527_boards; i++) { 481 if (mite_device_id(mite) == ni6527_boards[i].dev_id) { 482 dev->board_ptr = ni6527_boards + i; 483 devpriv->mite = mite; 484 return 0; 485 } 486 } 487 } 488 printk(KERN_ERR "comedi 6527: no device found\n"); 489 mite_list_devices(); 490 return -EIO; 491} 492 493COMEDI_PCI_INITCLEANUP(driver_ni6527, ni6527_pci_table); 494