ni_6527.c revision f4c6b31958afecc08c8e83f3bc25161ce4442542
1/* 2 comedi/drivers/ni_6527.c 3 driver for National Instruments PCI-6527 4 5 COMEDI - Linux Control and Measurement Device Interface 6 Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org> 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 22*/ 23/* 24Driver: ni_6527 25Description: National Instruments 6527 26Author: ds 27Status: works 28Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527 29Updated: Sat, 25 Jan 2003 13:24:40 -0800 30 31 32*/ 33 34/* 35 Manuals (available from ftp://ftp.natinst.com/support/manuals) 36 37 370106b.pdf 6527 Register Level Programmer Manual 38 39 */ 40 41#define DEBUG 1 42#define DEBUG_FLAGS 43 44#include "../comedidev.h" 45 46#include "mite.h" 47 48#define NI6527_DIO_SIZE 4096 49#define NI6527_MITE_SIZE 4096 50 51#define Port_Register(x) (0x00+(x)) 52#define ID_Register 0x06 53 54#define Clear_Register 0x07 55#define ClrEdge 0x08 56#define ClrOverflow 0x04 57#define ClrFilter 0x02 58#define ClrInterval 0x01 59 60#define Filter_Interval(x) (0x08+(x)) 61#define Filter_Enable(x) (0x0c+(x)) 62 63#define Change_Status 0x14 64#define MasterInterruptStatus 0x04 65#define Overflow 0x02 66#define EdgeStatus 0x01 67 68#define Master_Interrupt_Control 0x15 69#define FallingEdgeIntEnable 0x10 70#define RisingEdgeIntEnable 0x08 71#define MasterInterruptEnable 0x04 72#define OverflowIntEnable 0x02 73#define EdgeIntEnable 0x01 74 75#define Rising_Edge_Detection_Enable(x) (0x018+(x)) 76#define Falling_Edge_Detection_Enable(x) (0x020+(x)) 77 78static int ni6527_attach(struct comedi_device * dev, struct comedi_devconfig * it); 79static int ni6527_detach(struct comedi_device * dev); 80static struct comedi_driver driver_ni6527 = { 81 driver_name:"ni6527", 82 module:THIS_MODULE, 83 attach:ni6527_attach, 84 detach:ni6527_detach, 85}; 86 87struct ni6527_board { 88 89 int dev_id; 90 const char *name; 91}; 92 93static const struct ni6527_board ni6527_boards[] = { 94 { 95 dev_id: 0x2b20, 96 name: "pci-6527", 97 }, 98 { 99 dev_id: 0x2b10, 100 name: "pxi-6527", 101 }, 102}; 103 104#define n_ni6527_boards (sizeof(ni6527_boards)/sizeof(ni6527_boards[0])) 105#define this_board ((const struct ni6527_board *)dev->board_ptr) 106 107static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = { 108 {PCI_VENDOR_ID_NATINST, 0x2b10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 109 {PCI_VENDOR_ID_NATINST, 0x2b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 110 {0} 111}; 112 113MODULE_DEVICE_TABLE(pci, ni6527_pci_table); 114 115struct ni6527_private { 116 struct mite_struct *mite; 117 unsigned int filter_interval; 118 unsigned int filter_enable; 119}; 120 121#define devpriv ((struct ni6527_private *)dev->private) 122 123static int ni6527_find_device(struct comedi_device * dev, int bus, int slot); 124 125static int ni6527_di_insn_config(struct comedi_device * dev, struct comedi_subdevice * s, 126 struct comedi_insn * insn, unsigned int * data) 127{ 128 int chan = CR_CHAN(insn->chanspec); 129 unsigned int interval; 130 131 if (insn->n != 2) 132 return -EINVAL; 133 134 if (data[0] != INSN_CONFIG_FILTER) 135 return -EINVAL; 136 137 if (data[1]) { 138 interval = (data[1] + 100) / 200; 139 data[1] = interval * 200; 140 141 if (interval != devpriv->filter_interval) { 142 writeb(interval & 0xff, 143 devpriv->mite->daq_io_addr + 144 Filter_Interval(0)); 145 writeb((interval >> 8) & 0xff, 146 devpriv->mite->daq_io_addr + 147 Filter_Interval(1)); 148 writeb((interval >> 16) & 0x0f, 149 devpriv->mite->daq_io_addr + 150 Filter_Interval(2)); 151 152 writeb(ClrInterval, 153 devpriv->mite->daq_io_addr + Clear_Register); 154 155 devpriv->filter_interval = interval; 156 } 157 158 devpriv->filter_enable |= 1 << chan; 159 } else { 160 devpriv->filter_enable &= ~(1 << chan); 161 } 162 163 writeb(devpriv->filter_enable, 164 devpriv->mite->daq_io_addr + Filter_Enable(0)); 165 writeb(devpriv->filter_enable >> 8, 166 devpriv->mite->daq_io_addr + Filter_Enable(1)); 167 writeb(devpriv->filter_enable >> 16, 168 devpriv->mite->daq_io_addr + Filter_Enable(2)); 169 170 return 2; 171} 172 173static int ni6527_di_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s, 174 struct comedi_insn * insn, unsigned int * data) 175{ 176 if (insn->n != 2) 177 return -EINVAL; 178 179 data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0)); 180 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8; 181 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16; 182 183 return 2; 184} 185 186static int ni6527_do_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s, 187 struct comedi_insn * insn, unsigned int * data) 188{ 189 if (insn->n != 2) 190 return -EINVAL; 191 if (data[0]) { 192 s->state &= ~data[0]; 193 s->state |= (data[0] & data[1]); 194 195 /* The open relay state on the board cooresponds to 1, 196 * but in Comedi, it is represented by 0. */ 197 if (data[0] & 0x0000ff) { 198 writeb((s->state ^ 0xff), 199 devpriv->mite->daq_io_addr + Port_Register(3)); 200 } 201 if (data[0] & 0x00ff00) { 202 writeb((s->state >> 8) ^ 0xff, 203 devpriv->mite->daq_io_addr + Port_Register(4)); 204 } 205 if (data[0] & 0xff0000) { 206 writeb((s->state >> 16) ^ 0xff, 207 devpriv->mite->daq_io_addr + Port_Register(5)); 208 } 209 } 210 data[1] = s->state; 211 212 return 2; 213} 214 215static irqreturn_t ni6527_interrupt(int irq, void *d PT_REGS_ARG) 216{ 217 struct comedi_device *dev = d; 218 struct comedi_subdevice *s = dev->subdevices + 2; 219 unsigned int status; 220 221 status = readb(devpriv->mite->daq_io_addr + Change_Status); 222 if ((status & MasterInterruptStatus) == 0) 223 return IRQ_NONE; 224 if ((status & EdgeStatus) == 0) 225 return IRQ_NONE; 226 227 writeb(ClrEdge | ClrOverflow, 228 devpriv->mite->daq_io_addr + Clear_Register); 229 230 comedi_buf_put(s->async, 0); 231 s->async->events |= COMEDI_CB_EOS; 232 comedi_event(dev, s); 233 return IRQ_HANDLED; 234} 235 236static int ni6527_intr_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s, 237 struct comedi_cmd * cmd) 238{ 239 int err = 0; 240 int tmp; 241 242 /* step 1: make sure trigger sources are trivially valid */ 243 244 tmp = cmd->start_src; 245 cmd->start_src &= TRIG_NOW; 246 if (!cmd->start_src || tmp != cmd->start_src) 247 err++; 248 249 tmp = cmd->scan_begin_src; 250 cmd->scan_begin_src &= TRIG_OTHER; 251 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) 252 err++; 253 254 tmp = cmd->convert_src; 255 cmd->convert_src &= TRIG_FOLLOW; 256 if (!cmd->convert_src || tmp != cmd->convert_src) 257 err++; 258 259 tmp = cmd->scan_end_src; 260 cmd->scan_end_src &= TRIG_COUNT; 261 if (!cmd->scan_end_src || tmp != cmd->scan_end_src) 262 err++; 263 264 tmp = cmd->stop_src; 265 cmd->stop_src &= TRIG_COUNT; 266 if (!cmd->stop_src || tmp != cmd->stop_src) 267 err++; 268 269 if (err) 270 return 1; 271 272 /* step 2: make sure trigger sources are unique and mutually compatible */ 273 274 if (err) 275 return 2; 276 277 /* step 3: make sure arguments are trivially compatible */ 278 279 if (cmd->start_arg != 0) { 280 cmd->start_arg = 0; 281 err++; 282 } 283 if (cmd->scan_begin_arg != 0) { 284 cmd->scan_begin_arg = 0; 285 err++; 286 } 287 if (cmd->convert_arg != 0) { 288 cmd->convert_arg = 0; 289 err++; 290 } 291 292 if (cmd->scan_end_arg != 1) { 293 cmd->scan_end_arg = 1; 294 err++; 295 } 296 if (cmd->stop_arg != 0) { 297 cmd->stop_arg = 0; 298 err++; 299 } 300 301 if (err) 302 return 3; 303 304 /* step 4: fix up any arguments */ 305 306 if (err) 307 return 4; 308 309 return 0; 310} 311 312static int ni6527_intr_cmd(struct comedi_device * dev, struct comedi_subdevice * s) 313{ 314 //struct comedi_cmd *cmd = &s->async->cmd; 315 316 writeb(ClrEdge | ClrOverflow, 317 devpriv->mite->daq_io_addr + Clear_Register); 318 writeb(FallingEdgeIntEnable | RisingEdgeIntEnable | 319 MasterInterruptEnable | EdgeIntEnable, 320 devpriv->mite->daq_io_addr + Master_Interrupt_Control); 321 322 return 0; 323} 324 325static int ni6527_intr_cancel(struct comedi_device * dev, struct comedi_subdevice * s) 326{ 327 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control); 328 329 return 0; 330} 331 332static int ni6527_intr_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s, 333 struct comedi_insn * insn, unsigned int * data) 334{ 335 if (insn->n < 1) 336 return -EINVAL; 337 338 data[1] = 0; 339 return 2; 340} 341 342static int ni6527_intr_insn_config(struct comedi_device * dev, struct comedi_subdevice * s, 343 struct comedi_insn * insn, unsigned int * data) 344{ 345 if (insn->n < 1) 346 return -EINVAL; 347 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY) 348 return -EINVAL; 349 350 writeb(data[1], 351 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(0)); 352 writeb(data[1] >> 8, 353 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(1)); 354 writeb(data[1] >> 16, 355 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(2)); 356 357 writeb(data[2], 358 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(0)); 359 writeb(data[2] >> 8, 360 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(1)); 361 writeb(data[2] >> 16, 362 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(2)); 363 364 return 2; 365} 366 367static int ni6527_attach(struct comedi_device * dev, struct comedi_devconfig * it) 368{ 369 struct comedi_subdevice *s; 370 int ret; 371 372 printk("comedi%d: ni6527:", dev->minor); 373 374 if ((ret = alloc_private(dev, sizeof(struct ni6527_private))) < 0) 375 return ret; 376 377 ret = ni6527_find_device(dev, it->options[0], it->options[1]); 378 if (ret < 0) 379 return ret; 380 381 ret = mite_setup(devpriv->mite); 382 if (ret < 0) { 383 printk("error setting up mite\n"); 384 return ret; 385 } 386 387 dev->board_name = this_board->name; 388 printk(" %s", dev->board_name); 389 390 printk(" ID=0x%02x", readb(devpriv->mite->daq_io_addr + ID_Register)); 391 392 if ((ret = alloc_subdevices(dev, 3)) < 0) 393 return ret; 394 395 s = dev->subdevices + 0; 396 s->type = COMEDI_SUBD_DI; 397 s->subdev_flags = SDF_READABLE; 398 s->n_chan = 24; 399 s->range_table = &range_digital; 400 s->maxdata = 1; 401 s->insn_config = ni6527_di_insn_config; 402 s->insn_bits = ni6527_di_insn_bits; 403 404 s = dev->subdevices + 1; 405 s->type = COMEDI_SUBD_DO; 406 s->subdev_flags = SDF_READABLE | SDF_WRITABLE; 407 s->n_chan = 24; 408 s->range_table = &range_unknown; /* FIXME: actually conductance */ 409 s->maxdata = 1; 410 s->insn_bits = ni6527_do_insn_bits; 411 412 s = dev->subdevices + 2; 413 dev->read_subdev = s; 414 s->type = COMEDI_SUBD_DI; 415 s->subdev_flags = SDF_READABLE | SDF_CMD_READ; 416 s->n_chan = 1; 417 s->range_table = &range_unknown; 418 s->maxdata = 1; 419 s->do_cmdtest = ni6527_intr_cmdtest; 420 s->do_cmd = ni6527_intr_cmd; 421 s->cancel = ni6527_intr_cancel; 422 s->insn_bits = ni6527_intr_insn_bits; 423 s->insn_config = ni6527_intr_insn_config; 424 425 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(0)); 426 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(1)); 427 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(2)); 428 429 writeb(ClrEdge | ClrOverflow | ClrFilter | ClrInterval, 430 devpriv->mite->daq_io_addr + Clear_Register); 431 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control); 432 433 ret = comedi_request_irq(mite_irq(devpriv->mite), ni6527_interrupt, 434 IRQF_SHARED, "ni6527", dev); 435 if (ret < 0) { 436 printk(" irq not available"); 437 } else 438 dev->irq = mite_irq(devpriv->mite); 439 440 printk("\n"); 441 442 return 0; 443} 444 445static int ni6527_detach(struct comedi_device * dev) 446{ 447 if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) { 448 writeb(0x00, 449 devpriv->mite->daq_io_addr + Master_Interrupt_Control); 450 } 451 452 if (dev->irq) { 453 comedi_free_irq(dev->irq, dev); 454 } 455 456 if (devpriv && devpriv->mite) { 457 mite_unsetup(devpriv->mite); 458 } 459 460 return 0; 461} 462 463static int ni6527_find_device(struct comedi_device * dev, int bus, int slot) 464{ 465 struct mite_struct *mite; 466 int i; 467 468 for (mite = mite_devices; mite; mite = mite->next) { 469 if (mite->used) 470 continue; 471 if (bus || slot) { 472 if (bus != mite->pcidev->bus->number || 473 slot != PCI_SLOT(mite->pcidev->devfn)) 474 continue; 475 } 476 for (i = 0; i < n_ni6527_boards; i++) { 477 if (mite_device_id(mite) == ni6527_boards[i].dev_id) { 478 dev->board_ptr = ni6527_boards + i; 479 devpriv->mite = mite; 480 return 0; 481 } 482 } 483 } 484 printk("no device found\n"); 485 mite_list_devices(); 486 return -EIO; 487} 488 489COMEDI_PCI_INITCLEANUP(driver_ni6527, ni6527_pci_table); 490