17648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* 27648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary * Common structures and definitions for FT1000 Flarion Flash OFDM PCMCIA and USB devices 37648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary * 47648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary * Originally copyright (c) 2002 Flarion Technologies 57648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary * 67648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary */ 77648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 87648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSPVERSZ 4 97648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define HWSERNUMSZ 16 107648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define SKUSZ 20 117648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define EUISZ 8 127648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define MODESZ 2 137648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define CALVERSZ 2 147648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define CALDATESZ 6 157648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 167648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ELECTRABUZZ_ID 0 /* ASIC ID for Electrabuzz */ 177648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define MAGNEMITE_ID 0x1a01 /* ASIC ID for Magnemite */ 187648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 197648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* MEMORY MAP common to both ELECTRABUZZ and MAGNEMITE */ 207648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_DPRAM_ADDR 0x000E /* DPADR - Dual Port Ram Indirect Address Register */ 217648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_SUP_CTRL 0x0020 /* HCTR - Host Control Register */ 227648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_SUP_STAT 0x0022 /* HSTAT - Host Status Register */ 237648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_RESET 0x0024 /* HCTR - Host Control Register */ 247648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_SUP_ISR 0x0026 /* HISR - Host Interrupt Status Register */ 257648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_SUP_IMASK 0x0028 /* HIMASK - Host Interrupt Mask */ 267648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_DOORBELL 0x002a /* DBELL - Door Bell Register */ 277648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_ASIC_ID 0x002e /* ASICID - ASIC Identification Number */ 287648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 297648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* MEMORY MAP FOR ELECTRABUZZ ASIC */ 307648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_UFIFO_STAT 0x0000 /* UFSR - Uplink FIFO status register */ 317648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_UFIFO_BEG 0x0002 /* UFBR - Uplink FIFO beginning register */ 327648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_UFIFO_MID 0x0004 /* UFMR - Uplink FIFO middle register */ 337648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_UFIFO_END 0x0006 /* UFER - Uplink FIFO end register */ 347648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_DFIFO_STAT 0x0008 /* DFSR - Downlink FIFO status register */ 357648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_DFIFO 0x000A /* DFR - Downlink FIFO Register */ 367648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_DPRAM_DATA 0x000C /* DPRAM - Dual Port Indirect Data Register */ 377648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_WATERMARK 0x0010 /* WMARK - Watermark Register */ 387648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 397648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* MEMORY MAP FOR MAGNEMITE */ 407648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_UFDR 0x0000 /* UFDR - Uplink FIFO Data Register (32-bits) */ 417648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_UFDRL 0x0000 /* UFDRL - Uplink FIFO Data Register low-word (16-bits) */ 427648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_UFDRH 0x0002 /* UFDRH - Uplink FIFO Data Register high-word (16-bits) */ 437648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_UFER 0x0004 /* UFER - Uplink FIFO End Register */ 447648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_UFSR 0x0006 /* UFSR - Uplink FIFO Status Register */ 457648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_DFR 0x0008 /* DFR - Downlink FIFO Register (32-bits) */ 467648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_DFRL 0x0008 /* DFRL - Downlink FIFO Register low-word (16-bits) */ 477648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_DFRH 0x000a /* DFRH - Downlink FIFO Register high-word (16-bits) */ 487648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_DFSR 0x000c /* DFSR - Downlink FIFO Status Register */ 497648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_DPDATA 0x0010 /* DPDATA - Dual Port RAM Indirect Data Register (32-bits) */ 507648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_DPDATAL 0x0010 /* DPDATAL - Dual Port RAM Indirect Data Register low-word (16-bits) */ 517648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_DPDATAH 0x0012 /* DPDATAH - Dual Port RAM Indirect Data Register high-word (16-bits) */ 527648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_WATERMARK 0x002c /* WMARK - Watermark Register */ 537648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_REG_MAG_VERSION 0x0030 /* LLC Version */ 547648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 557648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Reserved Dual Port RAM offsets for Electrabuzz */ 567648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DPRAM_TX_BASE 0x0002 /* Host to PC Card Messaging Area */ 577648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DPRAM_RX_BASE 0x0800 /* PC Card to Host Messaging Area */ 587648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_FIFO_LEN 0x07FC /* total length for DSP FIFO tracking */ 597648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_HI_HO 0x07FE /* heartbeat with HI/HO */ 607648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DSP_STATUS 0x0FFE /* dsp status - non-zero is a request to reset dsp */ 617648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DSP_LED 0x0FFA /* dsp led status for PAD device */ 627648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DSP_CON_STATE 0x0FF8 /* DSP Connection Status Info */ 637648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DPRAM_FEFE 0x0002 /* location for dsp ready indicator */ 647648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DSP_TIMER0 0x1FF0 /* Timer Field from Basestation */ 657648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DSP_TIMER1 0x1FF2 /* Timer Field from Basestation */ 667648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DSP_TIMER2 0x1FF4 /* Timer Field from Basestation */ 677648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DSP_TIMER3 0x1FF6 /* Timer Field from Basestation */ 687648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 697648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Reserved Dual Port RAM offsets for Magnemite */ 707648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DPRAM_MAG_TX_BASE 0x0000 /* Host to PC Card Messaging Area */ 717648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DPRAM_MAG_RX_BASE 0x0200 /* PC Card to Host Messaging Area */ 727648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 737648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_FIFO_LEN 0x1FF /* total length for DSP FIFO tracking */ 747648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_FIFO_LEN_INDX 0x1 /* low-word index */ 757648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_HI_HO 0x1FF /* heartbeat with HI/HO */ 767648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_HI_HO_INDX 0x0 /* high-word index */ 777648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_LED 0x3FE /* dsp led status for PAD device */ 787648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_LED_INDX 0x0 /* dsp led status for PAD device */ 797648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_CON_STATE 0x3FE /* DSP Connection Status Info */ 807648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_CON_STATE_INDX 0x1 /* DSP Connection Status Info */ 817648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DPRAM_FEFE 0x000 /* location for dsp ready indicator */ 827648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DPRAM_FEFE_INDX 0x0 /* location for dsp ready indicator */ 837648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_TIMER0 0x3FC /* Timer Field from Basestation */ 847648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_TIMER0_INDX 0x1 857648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_TIMER1 0x3FC /* Timer Field from Basestation */ 867648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_TIMER1_INDX 0x0 877648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_TIMER2 0x3FD /* Timer Field from Basestation */ 887648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_TIMER2_INDX 0x1 897648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_TIMER3 0x3FD /* Timer Field from Basestation */ 907648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_DSP_TIMER3_INDX 0x0 917648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_TOTAL_LEN 0x200 927648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_TOTAL_LEN_INDX 0x1 937648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_PH_LEN 0x200 947648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_PH_LEN_INDX 0x0 957648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_PORT_ID 0x201 967648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_MAG_PORT_ID_INDX 0x0 977648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 987648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define HOST_INTF_LE 0x0 /* Host interface little endian mode */ 997648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define HOST_INTF_BE 0x1 /* Host interface big endian mode */ 1007648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1017648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* FT1000 to Host Doorbell assignments */ 1027648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DB_DPRAM_RX 0x0001 /* this value indicates that DSP has data for host in DPRAM */ 1037648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DB_DNLD_RX 0x0002 /* Downloader handshake doorbell */ 1047648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_ASIC_RESET_REQ 0x0004 /* DSP requesting host to reset the ASIC */ 1057648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DSP_ASIC_RESET 0x0008 /* DSP indicating host that it will reset the ASIC */ 1067648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DB_COND_RESET 0x0010 /* DSP request for a card reset. */ 1077648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1087648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Host to FT1000 Doorbell assignments */ 1097648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DB_DPRAM_TX 0x0100 /* this value indicates that host has data for DSP in DPRAM. */ 1107648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DB_DNLD_TX 0x0200 /* Downloader handshake doorbell */ 1117648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_ASIC_RESET_DSP 0x0400 /* Responds to FT1000_ASIC_RESET_REQ */ 1127648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FT1000_DB_HB 0x1000 /* Indicates that supervisor has a heartbeat message for DSP. */ 1137648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1147648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define hi 0x6869 /* PC Card heartbeat values */ 1157648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ho 0x686f /* PC Card heartbeat values */ 1167648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1177648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Magnemite specific defines */ 1187648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define hi_mag 0x6968 /* Byte swap hi to avoid additional system call */ 1197648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ho_mag 0x6f68 /* Byte swap ho to avoid additional system call */ 1207648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1217648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Bit field definitions for Host Interrupt Status Register */ 1227648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Indicate the cause of an interrupt. */ 1237648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_EMPTY 0x00 /* no bits set */ 1247648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_DOORBELL_ACK 0x01 /* Doorbell acknowledge from DSP */ 1257648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_DOORBELL_PEND 0x02 /* Doorbell pending from DSP */ 1267648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_RCV 0x04 /* Packet available in Downlink FIFO */ 1277648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_WATERMARK 0x08 /* Watermark requirements satisfied */ 1287648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1297648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Bit field definition for Host Interrupt Mask */ 1307648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_MASK_NONE 0x0000 /* no bits set */ 1317648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_MASK_DOORBELL_ACK 0x0001 /* Doorbell acknowledge mask */ 1327648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_MASK_DOORBELL_PEND 0x0002 /* Doorbell pending mask */ 1337648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_MASK_RCV 0x0004 /* Downlink Packet available mask */ 1347648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_MASK_WATERMARK 0x0008 /* Watermark interrupt mask */ 1357648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_MASK_ALL 0xffff /* Mask all interrupts */ 1367648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Default interrupt mask (Enable Doorbell pending and Packet available interrupts) */ 1377648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ISR_DEFAULT_MASK 0x7ff9 1387648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1397648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Bit field definition for Host Control Register */ 1407648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_RESET_BIT 0x0001 /* Bit field to control dsp reset state */ 1417648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* (0 = out of reset 1 = reset) */ 1427648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ASIC_RESET_BIT 0x0002 /* Bit field to control ASIC reset state */ 1437648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* (0 = out of reset 1 = reset) */ 1447648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_UNENCRYPTED 0x0004 1457648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_ENCRYPTED 0x0008 1467648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define EFUSE_MEM_DISABLE 0x0040 1477648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1487648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Application specific IDs */ 1497648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSPID 0x20 1507648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define HOSTID 0x10 1517648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSPAIRID 0x90 1527648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DRIVERID 0x00 1537648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define NETWORKID 0x20 1547648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1557648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Size of DPRAM Message */ 1567648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define MAX_CMD_SQSIZE 1780 1577648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1587648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ENET_MAX_SIZE 1514 1597648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define ENET_HEADER_SIZE 14 1607648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1617648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define SLOWQ_TYPE 0 1627648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FASTQ_TYPE 1 1637648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1647648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define MAX_DSP_SESS_REC 1024 1657648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1667648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_QID_OFFSET 4 1677648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1687648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Driver message types */ 1697648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define MEDIA_STATE 0x0010 1707648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define TIME_UPDATE 0x0020 1717648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_PROVISION 0x0030 1727648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_INIT_MSG 0x0050 1737648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_HIBERNATE 0x0060 1747648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_STORE_INFO 0x0070 1757648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_GET_INFO 0x0071 1767648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define GET_DRV_ERR_RPT_MSG 0x0073 1777648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define RSP_DRV_ERR_RPT_MSG 0x0074 1787648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1797648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Driver Error Messages for DSP */ 1807648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_HB_INFO 0x7ef0 1817648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_FIFO_INFO 0x7ef1 1827648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_CONDRESET_INFO 0x7ef2 1837648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_CMDLEN_INFO 0x7ef3 1847648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_CMDPHCKSUM_INFO 0x7ef4 1857648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_PKTPHCKSUM_INFO 0x7ef5 1867648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_PKTLEN_INFO 0x7ef6 1877648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define DSP_USER_RESET 0x7ef7 1887648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FIFO_FLUSH_MAXLIMIT 0x7ef8 1897648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FIFO_FLUSH_BADCNT 0x7ef9 1907648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary#define FIFO_ZERO_LEN 0x7efa 1917648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 1927648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary/* Pseudo Header structure */ 1937648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zarystruct pseudo_hdr { 1947648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned short length; /* length of msg body */ 1957648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned char source; /* hardware source id */ 1967648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Host = 0x10 */ 1977648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Dsp = 0x20 */ 1987648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned char destination; /* hardware destination id (refer to source) */ 1997648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned char portdest; /* software destination port id */ 2007648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Host = 0x00 */ 2017648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Applicaton Broadcast = 0x10 */ 2027648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Network Stack = 0x20 */ 2037648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Dsp OAM = 0x80 */ 2047648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Dsp Airlink = 0x90 */ 2057648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Dsp Loader = 0xa0 */ 2067648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary /* Dsp MIP = 0xb0 */ 2077648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned char portsrc; /* software source port id (refer to portdest) */ 2087648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned short sh_str_id; /* not used */ 2097648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned char control; /* not used */ 2107648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned char rsvd1; 2117648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned char seq_num; /* message sequence number */ 2127648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned char rsvd2; 2137648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned short qos_class; /* not used */ 2147648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary unsigned short checksum; /* pseudo header checksum */ 2157648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary} __packed; 2167648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 2177648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zarystruct drv_msg { 2187648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary struct pseudo_hdr pseudo; 2197648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u16 type; 2207648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u16 length; 2217648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 data[0]; 2227648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary} __packed; 2237648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 2247648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zarystruct media_msg { 2257648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary struct pseudo_hdr pseudo; 2267648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u16 type; 2277648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u16 length; 2287648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u16 state; 2297648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u32 ip_addr; 2307648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u32 net_mask; 2317648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u32 gateway; 2327648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u32 dns_1; 2337648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u32 dns_2; 2347648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary} __packed; 2357648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 2367648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zarystruct dsp_init_msg { 2377648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary struct pseudo_hdr pseudo; 2387648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u16 type; 2397648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u16 length; 2407648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 DspVer[DSPVERSZ]; /* DSP version number */ 2417648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 HwSerNum[HWSERNUMSZ]; /* Hardware Serial Number */ 2427648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 Sku[SKUSZ]; /* SKU */ 2437648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 eui64[EUISZ]; /* EUI64 */ 2447648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 ProductMode[MODESZ]; /* Product Mode (Market/Production) */ 2457648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 RfCalVer[CALVERSZ]; /* Rf Calibration version */ 2467648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 RfCalDate[CALDATESZ]; /* Rf Calibration date */ 2477648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary} __packed; 2487648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary 2497648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zarystruct prov_record { 2507648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary struct list_head list; 2517648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary u8 *pprov_data; 2527648c996ea9c97b0af391f7594c4728ecf47df84Ondrej Zary}; 253