vme_ca91cx42.c revision bb9ea89ec8a3d80a835d53afc388ad5f67fd3cb3
160479690af6d559d4202bed139db90323386bd2bMartyn Welch/* 260479690af6d559d4202bed139db90323386bd2bMartyn Welch * Support for the Tundra Universe I/II VME-PCI Bridge Chips 360479690af6d559d4202bed139db90323386bd2bMartyn Welch * 466bd8db52ab48e7189e02d4bf1f23109cc1ede70Martyn Welch * Author: Martyn Welch <martyn.welch@ge.com> 566bd8db52ab48e7189e02d4bf1f23109cc1ede70Martyn Welch * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. 660479690af6d559d4202bed139db90323386bd2bMartyn Welch * 760479690af6d559d4202bed139db90323386bd2bMartyn Welch * Based on work by Tom Armistead and Ajit Prem 860479690af6d559d4202bed139db90323386bd2bMartyn Welch * Copyright 2004 Motorola Inc. 960479690af6d559d4202bed139db90323386bd2bMartyn Welch * 1060479690af6d559d4202bed139db90323386bd2bMartyn Welch * Derived from ca91c042.c by Michael Wyrick 1160479690af6d559d4202bed139db90323386bd2bMartyn Welch * 1260479690af6d559d4202bed139db90323386bd2bMartyn Welch * This program is free software; you can redistribute it and/or modify it 1360479690af6d559d4202bed139db90323386bd2bMartyn Welch * under the terms of the GNU General Public License as published by the 1460479690af6d559d4202bed139db90323386bd2bMartyn Welch * Free Software Foundation; either version 2 of the License, or (at your 1560479690af6d559d4202bed139db90323386bd2bMartyn Welch * option) any later version. 1660479690af6d559d4202bed139db90323386bd2bMartyn Welch */ 1760479690af6d559d4202bed139db90323386bd2bMartyn Welch 1860479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/module.h> 1960479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/mm.h> 2060479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/types.h> 2160479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/errno.h> 2260479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/pci.h> 2360479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/dma-mapping.h> 2460479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/poll.h> 2560479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/interrupt.h> 2660479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <linux/spinlock.h> 276af783c8ba3418a8ffc50f1266d9b1e35a3322dbGreg Kroah-Hartman#include <linux/sched.h> 2860479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <asm/time.h> 2960479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <asm/io.h> 3060479690af6d559d4202bed139db90323386bd2bMartyn Welch#include <asm/uaccess.h> 3160479690af6d559d4202bed139db90323386bd2bMartyn Welch 3260479690af6d559d4202bed139db90323386bd2bMartyn Welch#include "../vme.h" 3360479690af6d559d4202bed139db90323386bd2bMartyn Welch#include "../vme_bridge.h" 3460479690af6d559d4202bed139db90323386bd2bMartyn Welch#include "vme_ca91cx42.h" 3560479690af6d559d4202bed139db90323386bd2bMartyn Welch 363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic int __init ca91cx42_init(void); 373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic int ca91cx42_probe(struct pci_dev *, const struct pci_device_id *); 383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic void ca91cx42_remove(struct pci_dev *); 393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic void __exit ca91cx42_exit(void); 4060479690af6d559d4202bed139db90323386bd2bMartyn Welch 4112b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welch/* Module parameters */ 4212b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welchstatic int geoid; 4312b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welch 443d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic char driver_name[] = "vme_ca91cx42"; 4560479690af6d559d4202bed139db90323386bd2bMartyn Welch 4613ac58dac0c6b1edeb060102049b07ebceea9a40Németh Mártonstatic const struct pci_device_id ca91cx42_ids[] = { 473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch { PCI_DEVICE(PCI_VENDOR_ID_TUNDRA, PCI_DEVICE_ID_TUNDRA_CA91C142) }, 483d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch { }, 4960479690af6d559d4202bed139db90323386bd2bMartyn Welch}; 5060479690af6d559d4202bed139db90323386bd2bMartyn Welch 513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic struct pci_driver ca91cx42_driver = { 523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch .name = driver_name, 533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch .id_table = ca91cx42_ids, 543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch .probe = ca91cx42_probe, 553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch .remove = ca91cx42_remove, 5660479690af6d559d4202bed139db90323386bd2bMartyn Welch}; 5760479690af6d559d4202bed139db90323386bd2bMartyn Welch 5829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic u32 ca91cx42_DMA_irqhandler(struct ca91cx42_driver *bridge) 5960479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 6029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch wake_up(&(bridge->dma_queue)); 6160479690af6d559d4202bed139db90323386bd2bMartyn Welch 623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return CA91CX42_LINT_DMA; 633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 6460479690af6d559d4202bed139db90323386bd2bMartyn Welch 6529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic u32 ca91cx42_LM_irqhandler(struct ca91cx42_driver *bridge, u32 stat) 663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int i; 683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch u32 serviced = 0; 6960479690af6d559d4202bed139db90323386bd2bMartyn Welch 703d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch for (i = 0; i < 4; i++) { 713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & CA91CX42_LINT_LM[i]) { 723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* We only enable interrupts if the callback is set */ 7329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge->lm_callback[i](i); 743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch serviced |= CA91CX42_LINT_LM[i]; 7560479690af6d559d4202bed139db90323386bd2bMartyn Welch } 7660479690af6d559d4202bed139db90323386bd2bMartyn Welch } 7760479690af6d559d4202bed139db90323386bd2bMartyn Welch 783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return serviced; 793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 8060479690af6d559d4202bed139db90323386bd2bMartyn Welch 813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch/* XXX This needs to be split into 4 queues */ 8229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic u32 ca91cx42_MB_irqhandler(struct ca91cx42_driver *bridge, int mbox_mask) 833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 8429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch wake_up(&(bridge->mbox_queue)); 8560479690af6d559d4202bed139db90323386bd2bMartyn Welch 863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return CA91CX42_LINT_MBOX; 873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 8860479690af6d559d4202bed139db90323386bd2bMartyn Welch 8929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge) 903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 9129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch wake_up(&(bridge->iack_queue)); 9260479690af6d559d4202bed139db90323386bd2bMartyn Welch 933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return CA91CX42_LINT_SW_IACK; 9460479690af6d559d4202bed139db90323386bd2bMartyn Welch} 9560479690af6d559d4202bed139db90323386bd2bMartyn Welch 9629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic u32 ca91cx42_VERR_irqhandler(struct ca91cx42_driver *bridge) 9760479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 9860479690af6d559d4202bed139db90323386bd2bMartyn Welch int val; 9960479690af6d559d4202bed139db90323386bd2bMartyn Welch 10029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch val = ioread32(bridge->base + DGCS); 10160479690af6d559d4202bed139db90323386bd2bMartyn Welch 10260479690af6d559d4202bed139db90323386bd2bMartyn Welch if (!(val & 0x00000800)) { 1033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "ca91c042: ca91cx42_VERR_irqhandler DMA Read " 1043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "Error DGCS=%08X\n", val); 10560479690af6d559d4202bed139db90323386bd2bMartyn Welch } 1063d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 1073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return CA91CX42_LINT_VERR; 10860479690af6d559d4202bed139db90323386bd2bMartyn Welch} 10960479690af6d559d4202bed139db90323386bd2bMartyn Welch 11029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic u32 ca91cx42_LERR_irqhandler(struct ca91cx42_driver *bridge) 11160479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 11260479690af6d559d4202bed139db90323386bd2bMartyn Welch int val; 11360479690af6d559d4202bed139db90323386bd2bMartyn Welch 11429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch val = ioread32(bridge->base + DGCS); 11560479690af6d559d4202bed139db90323386bd2bMartyn Welch 11660479690af6d559d4202bed139db90323386bd2bMartyn Welch if (!(val & 0x00000800)) { 1173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "ca91c042: ca91cx42_LERR_irqhandler DMA Read " 1183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "Error DGCS=%08X\n", val); 11960479690af6d559d4202bed139db90323386bd2bMartyn Welch 12060479690af6d559d4202bed139db90323386bd2bMartyn Welch } 12160479690af6d559d4202bed139db90323386bd2bMartyn Welch 1223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return CA91CX42_LINT_LERR; 12360479690af6d559d4202bed139db90323386bd2bMartyn Welch} 12460479690af6d559d4202bed139db90323386bd2bMartyn Welch 1253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 12629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic u32 ca91cx42_VIRQ_irqhandler(struct vme_bridge *ca91cx42_bridge, 12729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch int stat) 12860479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 1293d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int vec, i, serviced = 0; 13029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 13129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 13229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 13329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 13460479690af6d559d4202bed139db90323386bd2bMartyn Welch 13560479690af6d559d4202bed139db90323386bd2bMartyn Welch for (i = 7; i > 0; i--) { 1363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & (1 << i)) { 13729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch vec = ioread32(bridge->base + 1383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch CA91CX42_V_STATID[i]) & 0xff; 1393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 140c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch vme_irq_handler(ca91cx42_bridge, i, vec); 1413d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 1423d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch serviced |= (1 << i); 14360479690af6d559d4202bed139db90323386bd2bMartyn Welch } 14460479690af6d559d4202bed139db90323386bd2bMartyn Welch } 1453d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 1463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return serviced; 14760479690af6d559d4202bed139db90323386bd2bMartyn Welch} 14860479690af6d559d4202bed139db90323386bd2bMartyn Welch 14929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic irqreturn_t ca91cx42_irqhandler(int irq, void *ptr) 15060479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 1513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch u32 stat, enable, serviced = 0; 15229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct vme_bridge *ca91cx42_bridge; 15329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 15460479690af6d559d4202bed139db90323386bd2bMartyn Welch 15529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_bridge = ptr; 15660479690af6d559d4202bed139db90323386bd2bMartyn Welch 15729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 15829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 15929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch enable = ioread32(bridge->base + LINT_EN); 16029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch stat = ioread32(bridge->base + LINT_STAT); 16160479690af6d559d4202bed139db90323386bd2bMartyn Welch 1623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Only look at unmasked interrupts */ 1633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch stat &= enable; 1643d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 1653d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (unlikely(!stat)) 1663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return IRQ_NONE; 1673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 1683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & CA91CX42_LINT_DMA) 16929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch serviced |= ca91cx42_DMA_irqhandler(bridge); 1703d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 | 1713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch CA91CX42_LINT_LM3)) 17229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch serviced |= ca91cx42_LM_irqhandler(bridge, stat); 1733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & CA91CX42_LINT_MBOX) 17429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch serviced |= ca91cx42_MB_irqhandler(bridge, stat); 1753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & CA91CX42_LINT_SW_IACK) 17629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch serviced |= ca91cx42_IACK_irqhandler(bridge); 1773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & CA91CX42_LINT_VERR) 17829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch serviced |= ca91cx42_VERR_irqhandler(bridge); 1793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & CA91CX42_LINT_LERR) 18029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch serviced |= ca91cx42_LERR_irqhandler(bridge); 1813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 | 1823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 | 1833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 | 1843d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch CA91CX42_LINT_VIRQ7)) 18529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch serviced |= ca91cx42_VIRQ_irqhandler(ca91cx42_bridge, stat); 1863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 1873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Clear serviced interrupts */ 18829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(stat, bridge->base + LINT_STAT); 18960479690af6d559d4202bed139db90323386bd2bMartyn Welch 19060479690af6d559d4202bed139db90323386bd2bMartyn Welch return IRQ_HANDLED; 19160479690af6d559d4202bed139db90323386bd2bMartyn Welch} 19260479690af6d559d4202bed139db90323386bd2bMartyn Welch 19329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic int ca91cx42_irq_init(struct vme_bridge *ca91cx42_bridge) 19460479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 1953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int result, tmp; 1963d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct pci_dev *pdev; 19729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 19829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 19929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 20060479690af6d559d4202bed139db90323386bd2bMartyn Welch 2013d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Need pdev */ 20229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); 20360479690af6d559d4202bed139db90323386bd2bMartyn Welch 2043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Initialise list for VME bus errors */ 20529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch INIT_LIST_HEAD(&(ca91cx42_bridge->vme_errors)); 20660479690af6d559d4202bed139db90323386bd2bMartyn Welch 20729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch mutex_init(&(ca91cx42_bridge->irq_mtx)); 208c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch 2093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Disable interrupts from PCI to VME */ 2103d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iowrite32(0, bridge->base + VINT_EN); 21160479690af6d559d4202bed139db90323386bd2bMartyn Welch 2123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Disable PCI interrupts */ 2133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iowrite32(0, bridge->base + LINT_EN); 2143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Clear Any Pending PCI Interrupts */ 2153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iowrite32(0x00FFFFFF, bridge->base + LINT_STAT); 21660479690af6d559d4202bed139db90323386bd2bMartyn Welch 2173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch result = request_irq(pdev->irq, ca91cx42_irqhandler, IRQF_SHARED, 21829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch driver_name, ca91cx42_bridge); 2193d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (result) { 2203d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", 2213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pdev->irq); 2223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return result; 22360479690af6d559d4202bed139db90323386bd2bMartyn Welch } 22460479690af6d559d4202bed139db90323386bd2bMartyn Welch 2253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Ensure all interrupts are mapped to PCI Interrupt 0 */ 2263d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iowrite32(0, bridge->base + LINT_MAP0); 2273d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iowrite32(0, bridge->base + LINT_MAP1); 2283d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iowrite32(0, bridge->base + LINT_MAP2); 2293d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 2303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Enable DMA, mailbox & LM Interrupts */ 2313d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch tmp = CA91CX42_LINT_MBOX3 | CA91CX42_LINT_MBOX2 | CA91CX42_LINT_MBOX1 | 2323d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch CA91CX42_LINT_MBOX0 | CA91CX42_LINT_SW_IACK | 2333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch CA91CX42_LINT_VERR | CA91CX42_LINT_LERR | CA91CX42_LINT_DMA; 2343d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 2353d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iowrite32(tmp, bridge->base + LINT_EN); 23660479690af6d559d4202bed139db90323386bd2bMartyn Welch 2373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 23860479690af6d559d4202bed139db90323386bd2bMartyn Welch} 23960479690af6d559d4202bed139db90323386bd2bMartyn Welch 24029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic void ca91cx42_irq_exit(struct ca91cx42_driver *bridge, 24129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct pci_dev *pdev) 24260479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 2433d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Disable interrupts from PCI to VME */ 24429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0, bridge->base + VINT_EN); 24560479690af6d559d4202bed139db90323386bd2bMartyn Welch 2463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Disable PCI interrupts */ 24729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0, bridge->base + LINT_EN); 2483d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Clear Any Pending PCI Interrupts */ 24929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00FFFFFF, bridge->base + LINT_STAT); 25060479690af6d559d4202bed139db90323386bd2bMartyn Welch 2513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch free_irq(pdev->irq, pdev); 2523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 25360479690af6d559d4202bed139db90323386bd2bMartyn Welch 2543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch/* 2553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * Set up an VME interrupt 2563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch */ 25729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchvoid ca91cx42_irq_set(struct vme_bridge *ca91cx42_bridge, int level, int state, 25829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch int sync) 259c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch 2603d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 261c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch struct pci_dev *pdev; 2623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch u32 tmp; 26329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 26429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 26529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 26660479690af6d559d4202bed139db90323386bd2bMartyn Welch 2673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Enable IRQ level */ 26829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch tmp = ioread32(bridge->base + LINT_EN); 2693d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 270c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch if (state == 0) 2713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch tmp &= ~CA91CX42_LINT_VIRQ[level]; 272c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch else 273c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch tmp |= CA91CX42_LINT_VIRQ[level]; 27460479690af6d559d4202bed139db90323386bd2bMartyn Welch 27529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(tmp, bridge->base + LINT_EN); 276c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch 277c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch if ((state == 0) && (sync != 0)) { 2783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, 2793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev); 2803d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 2813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch synchronize_irq(pdev->irq); 28260479690af6d559d4202bed139db90323386bd2bMartyn Welch } 28360479690af6d559d4202bed139db90323386bd2bMartyn Welch} 28460479690af6d559d4202bed139db90323386bd2bMartyn Welch 28529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchint ca91cx42_irq_generate(struct vme_bridge *ca91cx42_bridge, int level, 28629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch int statid) 28760479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 2883d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch u32 tmp; 28929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 29029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 29129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 29260479690af6d559d4202bed139db90323386bd2bMartyn Welch 2933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Universe can only generate even vectors */ 2943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (statid & 1) 2953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return -EINVAL; 29660479690af6d559d4202bed139db90323386bd2bMartyn Welch 29729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch mutex_lock(&(bridge->vme_int)); 29860479690af6d559d4202bed139db90323386bd2bMartyn Welch 29929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch tmp = ioread32(bridge->base + VINT_EN); 30060479690af6d559d4202bed139db90323386bd2bMartyn Welch 3013d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Set Status/ID */ 30229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(statid << 24, bridge->base + STATID); 3033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 3043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Assert VMEbus IRQ */ 3053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch tmp = tmp | (1 << (level + 24)); 30629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(tmp, bridge->base + VINT_EN); 30760479690af6d559d4202bed139db90323386bd2bMartyn Welch 3083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Wait for IACK */ 30929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch wait_event_interruptible(bridge->iack_queue, 0); 3103d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 3113d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Return interrupt to low state */ 31229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch tmp = ioread32(bridge->base + VINT_EN); 3133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch tmp = tmp & ~(1 << (level + 24)); 31429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(tmp, bridge->base + VINT_EN); 3153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 31629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch mutex_unlock(&(bridge->vme_int)); 3173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 3183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 31960479690af6d559d4202bed139db90323386bd2bMartyn Welch} 32060479690af6d559d4202bed139db90323386bd2bMartyn Welch 3213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchint ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, 3223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long vme_base, unsigned long long size, 3233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) 32460479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 32521e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch unsigned int i, addr = 0, granularity; 3263d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned int temp_ctl = 0; 3273d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned int vme_bound, pci_offset; 32829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 32929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 33029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = image->parent->driver_priv; 33160479690af6d559d4202bed139db90323386bd2bMartyn Welch 3323d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch i = image->number; 33360479690af6d559d4202bed139db90323386bd2bMartyn Welch 3343d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch switch (aspace) { 3353d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_A16: 3363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch addr |= CA91CX42_VSI_CTL_VAS_A16; 3373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 3383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_A24: 3393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch addr |= CA91CX42_VSI_CTL_VAS_A24; 3403d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 3413d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_A32: 3423d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch addr |= CA91CX42_VSI_CTL_VAS_A32; 3433d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 3443d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_USER1: 3453d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch addr |= CA91CX42_VSI_CTL_VAS_USER1; 3463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 3473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_USER2: 3483d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch addr |= CA91CX42_VSI_CTL_VAS_USER2; 3493d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 3503d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_A64: 3513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_CRCSR: 3523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_USER3: 3533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_USER4: 3543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch default: 3553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Invalid address space\n"); 3563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return -EINVAL; 3573d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 35860479690af6d559d4202bed139db90323386bd2bMartyn Welch } 35960479690af6d559d4202bed139db90323386bd2bMartyn Welch 3603d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* 3613d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * Bound address is a valid address for the window, adjust 3623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * accordingly 3633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch */ 36421e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch vme_bound = vme_base + size; 3653d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pci_offset = pci_base - vme_base; 3663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 3673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if ((i == 0) || (i == 4)) 3683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch granularity = 0x1000; 3693d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch else 3703d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch granularity = 0x10000; 3713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 3723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (vme_base & (granularity - 1)) { 3733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Invalid VME base alignment\n"); 3743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return -EINVAL; 3753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 3763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (vme_bound & (granularity - 1)) { 3773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Invalid VME bound alignment\n"); 3783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return -EINVAL; 3793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 3803d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (pci_offset & (granularity - 1)) { 3813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Invalid PCI Offset alignment\n"); 3823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return -EINVAL; 38360479690af6d559d4202bed139db90323386bd2bMartyn Welch } 38460479690af6d559d4202bed139db90323386bd2bMartyn Welch 3853d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Disable while we are mucking around */ 38629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch temp_ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]); 3873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl &= ~CA91CX42_VSI_CTL_EN; 38829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); 38960479690af6d559d4202bed139db90323386bd2bMartyn Welch 3903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup mapping */ 39129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(vme_base, bridge->base + CA91CX42_VSI_BS[i]); 39229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(vme_bound, bridge->base + CA91CX42_VSI_BD[i]); 39329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(pci_offset, bridge->base + CA91CX42_VSI_TO[i]); 3943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 3953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup address space */ 3963d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl &= ~CA91CX42_VSI_CTL_VAS_M; 3973d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= addr; 3983d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 3993d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup cycle types */ 4003d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl &= ~(CA91CX42_VSI_CTL_PGM_M | CA91CX42_VSI_CTL_SUPER_M); 4013d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (cycle & VME_SUPER) 4023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_VSI_CTL_SUPER_SUPR; 4033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (cycle & VME_USER) 4043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_VSI_CTL_SUPER_NPRIV; 4053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (cycle & VME_PROG) 4063d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_VSI_CTL_PGM_PGM; 4073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (cycle & VME_DATA) 4083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_VSI_CTL_PGM_DATA; 4093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4103d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Write ctl reg without enable */ 41129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); 4123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (enabled) 4143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_VSI_CTL_EN; 4153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 41629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); 4173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 41960479690af6d559d4202bed139db90323386bd2bMartyn Welch} 42060479690af6d559d4202bed139db90323386bd2bMartyn Welch 4213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchint ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, 4223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long *vme_base, unsigned long long *size, 4233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dma_addr_t *pci_base, vme_address_t *aspace, vme_cycle_t *cycle) 42460479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 4253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned int i, granularity = 0, ctl = 0; 4263d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long vme_bound, pci_offset; 42729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 42829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 42929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = image->parent->driver_priv; 4303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4313d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch i = image->number; 43260479690af6d559d4202bed139db90323386bd2bMartyn Welch 4333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if ((i == 0) || (i == 4)) 4343d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch granularity = 0x1000; 4353d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch else 4363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch granularity = 0x10000; 4373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Read Registers */ 43929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]); 4403d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 44129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch *vme_base = ioread32(bridge->base + CA91CX42_VSI_BS[i]); 44229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch vme_bound = ioread32(bridge->base + CA91CX42_VSI_BD[i]); 44329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch pci_offset = ioread32(bridge->base + CA91CX42_VSI_TO[i]); 4443d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4453d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *pci_base = (dma_addr_t)vme_base + pci_offset; 4463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *size = (unsigned long long)((vme_bound - *vme_base) + granularity); 4473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4483d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *enabled = 0; 4493d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = 0; 4503d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle = 0; 4513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_VSI_CTL_EN) 4533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *enabled = 1; 4543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A16) 4563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_A16; 4573d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A24) 4583d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_A24; 4593d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A32) 4603d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_A32; 4613d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_USER1) 4623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_USER1; 4633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_USER2) 4643d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_USER2; 4653d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_VSI_CTL_SUPER_SUPR) 4673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle |= VME_SUPER; 4683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_VSI_CTL_SUPER_NPRIV) 4693d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle |= VME_USER; 4703d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_VSI_CTL_PGM_PGM) 4713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle |= VME_PROG; 4723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_VSI_CTL_PGM_DATA) 4733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle |= VME_DATA; 4743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 4763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 4773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch/* 4793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * Allocate and map PCI Resource 4803d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch */ 4813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic int ca91cx42_alloc_resource(struct vme_master_resource *image, 4823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long size) 4833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 4843d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long existing_size; 4853d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int retval = 0; 4863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct pci_dev *pdev; 48729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct vme_bridge *ca91cx42_bridge; 48829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 48929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_bridge = image->parent; 4903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4913d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Find pci_dev container of dev */ 4923d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ca91cx42_bridge->parent == NULL) { 4933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Dev entry NULL\n"); 4943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return -EINVAL; 4953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 4963d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); 4973d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4988fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch existing_size = (unsigned long long)(image->bus_resource.end - 4998fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch image->bus_resource.start); 5003d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5013d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* If the existing size is OK, return */ 5023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (existing_size == (size - 1)) 5033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 5043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (existing_size != 0) { 5063d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iounmap(image->kern_base); 5073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch image->kern_base = NULL; 5088fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch if (image->bus_resource.name != NULL) 5098fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch kfree(image->bus_resource.name); 5108fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch release_resource(&(image->bus_resource)); 5118fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch memset(&(image->bus_resource), 0, sizeof(struct resource)); 5123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 5133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5148fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch if (image->bus_resource.name == NULL) { 5158fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); 5168fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch if (image->bus_resource.name == NULL) { 5173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Unable to allocate memory for resource" 5183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch " name\n"); 5193d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -ENOMEM; 5203d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_name; 5213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 52260479690af6d559d4202bed139db90323386bd2bMartyn Welch } 5233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5248fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch sprintf((char *)image->bus_resource.name, "%s.%d", 5253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->name, image->number); 5263d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5278fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch image->bus_resource.start = 0; 5288fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch image->bus_resource.end = (unsigned long)size; 5298fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch image->bus_resource.flags = IORESOURCE_MEM; 5303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5313d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = pci_bus_alloc_resource(pdev->bus, 5328fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch &(image->bus_resource), size, size, PCIBIOS_MIN_MEM, 5333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 0, NULL, NULL); 5343d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (retval) { 5353d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Failed to allocate mem resource for " 5363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "window %d size 0x%lx start 0x%lx\n", 5373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch image->number, (unsigned long)size, 5388fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch (unsigned long)image->bus_resource.start); 5393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_resource; 54060479690af6d559d4202bed139db90323386bd2bMartyn Welch } 5413d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5423d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch image->kern_base = ioremap_nocache( 5438fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch image->bus_resource.start, size); 5443d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (image->kern_base == NULL) { 5453d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Failed to remap resource\n"); 5463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -ENOMEM; 5473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_remap; 54860479690af6d559d4202bed139db90323386bd2bMartyn Welch } 54960479690af6d559d4202bed139db90323386bd2bMartyn Welch 5503d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 5513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iounmap(image->kern_base); 5533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch image->kern_base = NULL; 5543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_remap: 5558fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch release_resource(&(image->bus_resource)); 5563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_resource: 5578fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch kfree(image->bus_resource.name); 5588fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch memset(&(image->bus_resource), 0, sizeof(struct resource)); 5593d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_name: 5603d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return retval; 5613d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 5623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch/* 5644860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch * Free and unmap PCI Resource 5654860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch */ 5663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic void ca91cx42_free_resource(struct vme_master_resource *image) 5673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 5683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch iounmap(image->kern_base); 5693d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch image->kern_base = NULL; 5708fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch release_resource(&(image->bus_resource)); 5718fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch kfree(image->bus_resource.name); 5728fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch memset(&(image->bus_resource), 0, sizeof(struct resource)); 5733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 5743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 5763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchint ca91cx42_master_set(struct vme_master_resource *image, int enabled, 5773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long vme_base, unsigned long long size, 5783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) 5793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 5803d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int retval = 0; 58121e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch unsigned int i, granularity = 0; 5823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned int temp_ctl = 0; 5833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long pci_bound, vme_offset, pci_base; 58429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 58529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 58629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = image->parent->driver_priv; 5873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 58821e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch i = image->number; 58921e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch 59021e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch if ((i == 0) || (i == 4)) 59121e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch granularity = 0x1000; 59221e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch else 59321e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch granularity = 0x10000; 59421e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch 5953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Verify input data */ 59621e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch if (vme_base & (granularity - 1)) { 5973d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Invalid VME Window alignment\n"); 5983d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -EINVAL; 5993d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_window; 6003d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 60121e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch if (size & (granularity - 1)) { 6023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Invalid VME Window alignment\n"); 6033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -EINVAL; 6043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_window; 6053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 6063d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 6073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_lock(&(image->lock)); 6083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 6093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* 6103d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * Let's allocate the resource here rather than further up the stack as 6113d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * it avoids pushing loads of bus dependant stuff up the stack 6123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch */ 6133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = ca91cx42_alloc_resource(image, size); 6143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (retval) { 6153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_unlock(&(image->lock)); 6163d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Unable to allocate memory for resource " 6173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "name\n"); 6183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -ENOMEM; 6193d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_res; 6203d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 6213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 6228fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch pci_base = (unsigned long long)image->bus_resource.start; 6233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 6243d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* 6253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * Bound address is a valid address for the window, adjust 6263d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * according to window granularity. 6273d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch */ 62821e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch pci_bound = pci_base + size; 6293d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch vme_offset = vme_base - pci_base; 6303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 6313d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Disable while we are mucking around */ 63229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch temp_ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]); 6333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl &= ~CA91CX42_LSI_CTL_EN; 63429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); 6353d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 6363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup cycle types */ 6373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl &= ~CA91CX42_LSI_CTL_VCT_M; 6383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (cycle & VME_BLT) 6393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VCT_BLT; 6403d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (cycle & VME_MBLT) 6413d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VCT_MBLT; 6423d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 6433d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup data width */ 6443d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl &= ~CA91CX42_LSI_CTL_VDW_M; 6453d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch switch (dwidth) { 6463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_D8: 6473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VDW_D8; 6483d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 6493d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_D16: 6503d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VDW_D16; 6513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 6523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_D32: 6533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VDW_D32; 6543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 6553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_D64: 6563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VDW_D64; 6573d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 6583d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch default: 6593d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_unlock(&(image->lock)); 6603d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Invalid data width\n"); 6613d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -EINVAL; 6623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_dwidth; 6633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 66460479690af6d559d4202bed139db90323386bd2bMartyn Welch } 6653d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 6663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup address space */ 6673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl &= ~CA91CX42_LSI_CTL_VAS_M; 6683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch switch (aspace) { 66960479690af6d559d4202bed139db90323386bd2bMartyn Welch case VME_A16: 6703d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VAS_A16; 67160479690af6d559d4202bed139db90323386bd2bMartyn Welch break; 67260479690af6d559d4202bed139db90323386bd2bMartyn Welch case VME_A24: 6733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VAS_A24; 67460479690af6d559d4202bed139db90323386bd2bMartyn Welch break; 67560479690af6d559d4202bed139db90323386bd2bMartyn Welch case VME_A32: 6763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VAS_A32; 6773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 6783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_CRCSR: 6793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VAS_CRCSR; 68060479690af6d559d4202bed139db90323386bd2bMartyn Welch break; 68160479690af6d559d4202bed139db90323386bd2bMartyn Welch case VME_USER1: 6823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VAS_USER1; 68360479690af6d559d4202bed139db90323386bd2bMartyn Welch break; 68460479690af6d559d4202bed139db90323386bd2bMartyn Welch case VME_USER2: 6853d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_VAS_USER2; 6863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 6873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_A64: 6883d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_USER3: 6893d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case VME_USER4: 6903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch default: 6913d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_unlock(&(image->lock)); 6923d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch printk(KERN_ERR "Invalid address space\n"); 6933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -EINVAL; 6943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_aspace; 69560479690af6d559d4202bed139db90323386bd2bMartyn Welch break; 69660479690af6d559d4202bed139db90323386bd2bMartyn Welch } 69760479690af6d559d4202bed139db90323386bd2bMartyn Welch 6983d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl &= ~(CA91CX42_LSI_CTL_PGM_M | CA91CX42_LSI_CTL_SUPER_M); 6993d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (cycle & VME_SUPER) 7003d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_SUPER_SUPR; 7013d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (cycle & VME_PROG) 7023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_PGM_PGM; 70360479690af6d559d4202bed139db90323386bd2bMartyn Welch 7043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup mapping */ 70529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(pci_base, bridge->base + CA91CX42_LSI_BS[i]); 70629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(pci_bound, bridge->base + CA91CX42_LSI_BD[i]); 70729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(vme_offset, bridge->base + CA91CX42_LSI_TO[i]); 7083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Write ctl reg without enable */ 71029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); 7113d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (enabled) 7133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch temp_ctl |= CA91CX42_LSI_CTL_EN; 7143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 71529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); 7163d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_unlock(&(image->lock)); 7183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 7193d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7203d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_aspace: 7213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_dwidth: 7223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_free_resource(image); 7233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_res: 7243d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_window: 7253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return retval; 7263d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 7273d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7283d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchint __ca91cx42_master_get(struct vme_master_resource *image, int *enabled, 7293d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long *vme_base, unsigned long long *size, 7303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 7313d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 7323d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned int i, ctl; 7333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long pci_base, pci_bound, vme_offset; 73429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 73529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 73629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = image->parent->driver_priv; 7373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch i = image->number; 7393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 74029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]); 7413d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 74229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch pci_base = ioread32(bridge->base + CA91CX42_LSI_BS[i]); 74329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch vme_offset = ioread32(bridge->base + CA91CX42_LSI_TO[i]); 74429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch pci_bound = ioread32(bridge->base + CA91CX42_LSI_BD[i]); 7453d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *vme_base = pci_base + vme_offset; 74721e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch *size = (unsigned long long)(pci_bound - pci_base); 7483d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7493d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *enabled = 0; 7503d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = 0; 7513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle = 0; 7523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *dwidth = 0; 7533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_LSI_CTL_EN) 7553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *enabled = 1; 7563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7573d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup address space */ 7583d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch switch (ctl & CA91CX42_LSI_CTL_VAS_M) { 7593d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VAS_A16: 7603d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_A16; 7613d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 7623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VAS_A24: 7633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_A24; 7643d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 7653d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VAS_A32: 7663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_A32; 7673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 7683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VAS_CRCSR: 7693d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_CRCSR; 7703d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 7713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VAS_USER1: 7723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_USER1; 7733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 7743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VAS_USER2: 7753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *aspace = VME_USER2; 7763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 7773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 7783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* XXX Not sure howto check for MBLT */ 7803d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup cycle types */ 7813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_LSI_CTL_VCT_BLT) 7823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle |= VME_BLT; 7833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch else 7843d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle |= VME_SCT; 7853d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_LSI_CTL_SUPER_SUPR) 7873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle |= VME_SUPER; 7883d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch else 7893d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle |= VME_USER; 7903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7913d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ctl & CA91CX42_LSI_CTL_PGM_PGM) 7923d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle = VME_PROG; 7933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch else 7943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *cycle = VME_DATA; 7953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 7963d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup data width */ 7973d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch switch (ctl & CA91CX42_LSI_CTL_VDW_M) { 7983d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VDW_D8: 7993d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *dwidth = VME_D8; 8003d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 8013d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VDW_D16: 8023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *dwidth = VME_D16; 8033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 8043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VDW_D32: 8053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *dwidth = VME_D32; 8063d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 8073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch case CA91CX42_LSI_CTL_VDW_D64: 8083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch *dwidth = VME_D64; 8093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch break; 8103d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 8113d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 8133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 8143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchint ca91cx42_master_get(struct vme_master_resource *image, int *enabled, 8163d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned long long *vme_base, unsigned long long *size, 8173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 8183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 8193d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int retval; 8203d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_lock(&(image->lock)); 8223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = __ca91cx42_master_get(image, enabled, vme_base, size, aspace, 8243d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch cycle, dwidth); 8253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8263d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_unlock(&(image->lock)); 8273d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8283d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return retval; 8293d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 8303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8313d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchssize_t ca91cx42_master_read(struct vme_master_resource *image, void *buf, 8323d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch size_t count, loff_t offset) 8333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 83421e0cf6d2e59e19f77096e73d83157734e7f7782Martyn Welch ssize_t retval; 83560479690af6d559d4202bed139db90323386bd2bMartyn Welch 8363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_lock(&(image->lock)); 83760479690af6d559d4202bed139db90323386bd2bMartyn Welch 8383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch memcpy_fromio(buf, image->kern_base + offset, (unsigned int)count); 8393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = count; 84060479690af6d559d4202bed139db90323386bd2bMartyn Welch 8413d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_unlock(&(image->lock)); 8423d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8433d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return retval; 84460479690af6d559d4202bed139db90323386bd2bMartyn Welch} 84560479690af6d559d4202bed139db90323386bd2bMartyn Welch 8463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchssize_t ca91cx42_master_write(struct vme_master_resource *image, void *buf, 8473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch size_t count, loff_t offset) 84860479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 8493d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int retval = 0; 85060479690af6d559d4202bed139db90323386bd2bMartyn Welch 8513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_lock(&(image->lock)); 85260479690af6d559d4202bed139db90323386bd2bMartyn Welch 8533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch memcpy_toio(image->kern_base + offset, buf, (unsigned int)count); 8543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = count; 8553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_unlock(&(image->lock)); 8573d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 8583d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return retval; 85960479690af6d559d4202bed139db90323386bd2bMartyn Welch} 86060479690af6d559d4202bed139db90323386bd2bMartyn Welch 86104e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welchunsigned int ca91cx42_master_rmw(struct vme_master_resource *image, 86204e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch unsigned int mask, unsigned int compare, unsigned int swap, 86304e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch loff_t offset) 86404e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch{ 86504e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch u32 pci_addr, result; 86604e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch int i; 86704e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch struct ca91cx42_driver *bridge; 86804e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch struct device *dev; 86904e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 87004e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch bridge = image->parent->driver_priv; 87104e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch dev = image->parent->parent; 87204e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 87304e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Find the PCI address that maps to the desired VME address */ 87404e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch i = image->number; 87504e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 87604e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Locking as we can only do one of these at a time */ 87704e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch mutex_lock(&(bridge->vme_rmw)); 87804e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 87904e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Lock image */ 88004e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch spin_lock(&(image->lock)); 88104e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 88204e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch pci_addr = (u32)image->kern_base + offset; 88304e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 88404e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Address must be 4-byte aligned */ 88504e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch if (pci_addr & 0x3) { 88604e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch dev_err(dev, "RMW Address not 4-byte aligned\n"); 88704e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch return -EINVAL; 88804e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch } 88904e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 89004e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Ensure RMW Disabled whilst configuring */ 89104e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch iowrite32(0, bridge->base + SCYC_CTL); 89204e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 89304e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Configure registers */ 89404e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch iowrite32(mask, bridge->base + SCYC_EN); 89504e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch iowrite32(compare, bridge->base + SCYC_CMP); 89604e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch iowrite32(swap, bridge->base + SCYC_SWP); 89704e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch iowrite32(pci_addr, bridge->base + SCYC_ADDR); 89804e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 89904e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Enable RMW */ 90004e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch iowrite32(CA91CX42_SCYC_CTL_CYC_RMW, bridge->base + SCYC_CTL); 90104e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 90204e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Kick process off with a read to the required address. */ 90304e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch result = ioread32(image->kern_base + offset); 90404e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 90504e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch /* Disable RMW */ 90604e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch iowrite32(0, bridge->base + SCYC_CTL); 90704e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 90804e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch spin_unlock(&(image->lock)); 90904e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 91004e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch mutex_unlock(&(bridge->vme_rmw)); 91104e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 91204e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch return result; 91304e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch} 91404e10e15f9509d08c5e2194ea2ae680c013d5b63Martyn Welch 9154860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welchint ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, 9164860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct vme_dma_attr *dest, size_t count) 9174860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch{ 9184860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct ca91cx42_dma_entry *entry, *prev; 9194860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct vme_dma_pci *pci_attr; 9204860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct vme_dma_vme *vme_attr; 9214860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch dma_addr_t desc_ptr; 9224860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch int retval = 0; 9234860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9244860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* XXX descriptor must be aligned on 64-bit boundaries */ 9254860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry = (struct ca91cx42_dma_entry *) 9264860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL); 9274860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (entry == NULL) { 9284860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch printk(KERN_ERR "Failed to allocate memory for dma resource " 9294860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch "structure\n"); 9304860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch retval = -ENOMEM; 9314860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch goto err_mem; 9324860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 9334860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9344860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Test descriptor alignment */ 9354860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if ((unsigned long)&(entry->descriptor) & CA91CX42_DCPP_M) { 9364860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch printk("Descriptor not aligned to 16 byte boundary as " 9374860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch "required: %p\n", &(entry->descriptor)); 9384860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch retval = -EINVAL; 9394860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch goto err_align; 9404860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 9414860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9424860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch memset(&(entry->descriptor), 0, sizeof(struct ca91cx42_dma_descriptor)); 9434860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9444860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (dest->type == VME_DMA_VME) { 9454860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_L2V; 9464860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch vme_attr = (struct vme_dma_vme *)dest->private; 9474860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch pci_attr = (struct vme_dma_pci *)src->private; 9484860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } else { 9494860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch vme_attr = (struct vme_dma_vme *)src->private; 9504860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch pci_attr = (struct vme_dma_pci *)dest->private; 9514860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 9524860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9534860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Check we can do fullfill required attributes */ 9544860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 | 9554860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch VME_USER2)) != 0) { 9564860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9574860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch printk(KERN_ERR "Unsupported cycle type\n"); 9584860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch retval = -EINVAL; 9594860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch goto err_aspace; 9604860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 9614860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9624860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER | 9634860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch VME_PROG | VME_DATA)) != 0) { 9644860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9654860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch printk(KERN_ERR "Unsupported cycle type\n"); 9664860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch retval = -EINVAL; 9674860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch goto err_cycle; 9684860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 9694860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9704860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Check to see if we can fullfill source and destination */ 9714860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) || 9724860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch ((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) { 9734860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9744860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch printk(KERN_ERR "Cannot perform transfer with this " 9754860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch "source-destination combination\n"); 9764860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch retval = -EINVAL; 9774860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch goto err_direct; 9784860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 9794860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9804860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Setup cycle types */ 9814860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (vme_attr->cycle & VME_BLT) 9824860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VCT_BLT; 9834860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 9844860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Setup data width */ 9854860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch switch (vme_attr->dwidth) { 9864860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_D8: 9874860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D8; 9884860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 9894860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_D16: 9904860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D16; 9914860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 9924860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_D32: 9934860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D32; 9944860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 9954860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_D64: 9964860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64; 9974860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 9984860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch default: 9994860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch printk(KERN_ERR "Invalid data width\n"); 10004860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return -EINVAL; 10014860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 10024860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10034860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Setup address space */ 10044860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch switch (vme_attr->aspace) { 10054860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_A16: 10064860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A16; 10074860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 10084860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_A24: 10094860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A24; 10104860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 10114860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_A32: 10124860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A32; 10134860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 10144860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_USER1: 10154860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER1; 10164860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 10174860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch case VME_USER2: 10184860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2; 10194860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 10204860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch default: 10214860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch printk(KERN_ERR "Invalid address space\n"); 10224860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return -EINVAL; 10234860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch break; 10244860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 10254860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10264860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (vme_attr->cycle & VME_SUPER) 10274860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_SUPER_SUPR; 10284860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (vme_attr->cycle & VME_PROG) 10294860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dctl |= CA91CX42_DCTL_PGM_PGM; 10304860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10314860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dtbc = count; 10324860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dla = pci_attr->address; 10334860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dva = vme_attr->address; 10344860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry->descriptor.dcpp = CA91CX42_DCPP_NULL; 10354860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10364860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Add to list */ 10374860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch list_add_tail(&(entry->list), &(list->entries)); 10384860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10394860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Fill out previous descriptors "Next Address" */ 10404860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (entry->list.prev != &(list->entries)) { 10414860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch prev = list_entry(entry->list.prev, struct ca91cx42_dma_entry, 10424860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch list); 10434860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* We need the bus address for the pointer */ 10444860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch desc_ptr = virt_to_bus(&(entry->descriptor)); 10454860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch prev->descriptor.dcpp = desc_ptr & ~CA91CX42_DCPP_M; 10464860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 10474860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10484860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return 0; 10494860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10504860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welcherr_cycle: 10514860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welcherr_aspace: 10524860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welcherr_direct: 10534860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welcherr_align: 10544860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch kfree(entry); 10554860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welcherr_mem: 10564860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return retval; 10574860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch} 10584860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10594860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welchstatic int ca91cx42_dma_busy(struct vme_bridge *ca91cx42_bridge) 10604860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch{ 10614860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch u32 tmp; 10624860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct ca91cx42_driver *bridge; 10634860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10644860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch bridge = ca91cx42_bridge->driver_priv; 10654860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10664860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch tmp = ioread32(bridge->base + DGCS); 10674860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10684860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (tmp & CA91CX42_DGCS_ACT) 10694860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return 0; 10704860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch else 10714860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return 1; 10724860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch} 10734860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10744860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welchint ca91cx42_dma_list_exec(struct vme_dma_list *list) 10754860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch{ 10764860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct vme_dma_resource *ctrlr; 10774860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct ca91cx42_dma_entry *entry; 10784860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch int retval = 0; 10794860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch dma_addr_t bus_addr; 10804860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch u32 val; 10814860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10824860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct ca91cx42_driver *bridge; 10834860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10844860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch ctrlr = list->parent; 10854860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10864860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch bridge = ctrlr->parent->driver_priv; 10874860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10884860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch mutex_lock(&(ctrlr->mtx)); 10894860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 10904860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (!(list_empty(&(ctrlr->running)))) { 10914860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* 10924860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch * XXX We have an active DMA transfer and currently haven't 10934860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch * sorted out the mechanism for "pending" DMA transfers. 10944860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch * Return busy. 10954860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch */ 10964860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Need to add to pending here */ 10974860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch mutex_unlock(&(ctrlr->mtx)); 10984860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return -EBUSY; 10994860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } else { 11004860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch list_add(&(list->list), &(ctrlr->running)); 11014860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 11024860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11034860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Get first bus address and write into registers */ 11044860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry = list_first_entry(&(list->entries), struct ca91cx42_dma_entry, 11054860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch list); 11064860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11074860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch bus_addr = virt_to_bus(&(entry->descriptor)); 11084860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11094860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch mutex_unlock(&(ctrlr->mtx)); 11104860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11114860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch iowrite32(0, bridge->base + DTBC); 11124860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch iowrite32(bus_addr & ~CA91CX42_DCPP_M, bridge->base + DCPP); 11134860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11144860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Start the operation */ 11154860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch val = ioread32(bridge->base + DGCS); 11164860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11174860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* XXX Could set VMEbus On and Off Counters here */ 11184860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch val &= (CA91CX42_DGCS_VON_M | CA91CX42_DGCS_VOFF_M); 11194860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11204860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch val |= (CA91CX42_DGCS_CHAIN | CA91CX42_DGCS_STOP | CA91CX42_DGCS_HALT | 11214860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch CA91CX42_DGCS_DONE | CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | 11224860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch CA91CX42_DGCS_PERR); 11234860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11244860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch iowrite32(val, bridge->base + DGCS); 11254860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11264860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch val |= CA91CX42_DGCS_GO; 11274860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11284860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch iowrite32(val, bridge->base + DGCS); 11294860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11304860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch wait_event_interruptible(bridge->dma_queue, 11314860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch ca91cx42_dma_busy(ctrlr->parent)); 11324860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11334860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* 11344860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch * Read status register, this register is valid until we kick off a 11354860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch * new transfer. 11364860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch */ 11374860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch val = ioread32(bridge->base + DGCS); 11384860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11394860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | 11404860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch CA91CX42_DGCS_PERR)) { 11414860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11424860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch printk(KERN_ERR "ca91c042: DMA Error. DGCS=%08X\n", val); 11434860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch val = ioread32(bridge->base + DCTL); 11444860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 11454860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11464860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* Remove list from running list */ 11474860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch mutex_lock(&(ctrlr->mtx)); 11484860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch list_del(&(list->list)); 11494860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch mutex_unlock(&(ctrlr->mtx)); 11504860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11514860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return retval; 11524860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11534860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch} 11544860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11554860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welchint ca91cx42_dma_list_empty(struct vme_dma_list *list) 11564860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch{ 11574860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct list_head *pos, *temp; 11584860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch struct ca91cx42_dma_entry *entry; 11594860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11604860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch /* detach and free each entry */ 11614860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch list_for_each_safe(pos, temp, &(list->entries)) { 11624860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch list_del(pos); 11634860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch entry = list_entry(pos, struct ca91cx42_dma_entry, list); 11644860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch kfree(entry); 11654860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch } 11664860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11674860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch return 0; 11684860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch} 11694860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 11702b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch/* 11712b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * All 4 location monitors reside at the same base - this is therefore a 11722b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * system wide configuration. 11732b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * 11742b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * This does not enable the LM monitor - that should be done when the first 11752b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * callback is attached and disabled when the last callback is removed. 11762b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch */ 11772b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welchint ca91cx42_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, 11782b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch vme_address_t aspace, vme_cycle_t cycle) 11792b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch{ 11802b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch u32 temp_base, lm_ctl = 0; 11812b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch int i; 11822b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch struct ca91cx42_driver *bridge; 11832b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch struct device *dev; 11842b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 11852b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch bridge = lm->parent->driver_priv; 11862b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch dev = lm->parent->parent; 11872b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 11882b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* Check the alignment of the location monitor */ 11892b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch temp_base = (u32)lm_base; 11902b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (temp_base & 0xffff) { 11912b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch dev_err(dev, "Location monitor must be aligned to 64KB " 11922b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch "boundary"); 11932b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return -EINVAL; 11942b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch } 11952b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 11962b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_lock(&(lm->mtx)); 11972b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 11982b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* If we already have a callback attached, we can't move it! */ 11992b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch for (i = 0; i < lm->monitors; i++) { 12002b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (bridge->lm_callback[i] != NULL) { 12012b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_unlock(&(lm->mtx)); 12022b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch dev_err(dev, "Location monitor callback attached, " 12032b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch "can't reset\n"); 12042b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return -EBUSY; 12052b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch } 12062b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch } 12072b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12082b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch switch (aspace) { 12092b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch case VME_A16: 12102b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl |= CA91CX42_LM_CTL_AS_A16; 12112b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch break; 12122b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch case VME_A24: 12132b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl |= CA91CX42_LM_CTL_AS_A24; 12142b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch break; 12152b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch case VME_A32: 12162b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl |= CA91CX42_LM_CTL_AS_A32; 12172b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch break; 12182b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch default: 12192b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_unlock(&(lm->mtx)); 12202b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch dev_err(dev, "Invalid address space\n"); 12212b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return -EINVAL; 12222b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch break; 12232b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch } 12242b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12252b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (cycle & VME_SUPER) 12262b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl |= CA91CX42_LM_CTL_SUPR; 12272b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (cycle & VME_USER) 12282b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl |= CA91CX42_LM_CTL_NPRIV; 12292b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (cycle & VME_PROG) 12302b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl |= CA91CX42_LM_CTL_PGM; 12312b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (cycle & VME_DATA) 12322b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl |= CA91CX42_LM_CTL_DATA; 12332b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12342b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch iowrite32(lm_base, bridge->base + LM_BS); 12352b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch iowrite32(lm_ctl, bridge->base + LM_CTL); 12362b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12372b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_unlock(&(lm->mtx)); 12382b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12392b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return 0; 12402b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch} 12412b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12422b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch/* Get configuration of the callback monitor and return whether it is enabled 12432b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * or disabled. 12442b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch */ 12452b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welchint ca91cx42_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, 12462b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch vme_address_t *aspace, vme_cycle_t *cycle) 12472b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch{ 12482b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch u32 lm_ctl, enabled = 0; 12492b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch struct ca91cx42_driver *bridge; 12502b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12512b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch bridge = lm->parent->driver_priv; 12522b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12532b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_lock(&(lm->mtx)); 12542b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12552b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *lm_base = (unsigned long long)ioread32(bridge->base + LM_BS); 12562b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl = ioread32(bridge->base + LM_CTL); 12572b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12582b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (lm_ctl & CA91CX42_LM_CTL_EN) 12592b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch enabled = 1; 12602b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12612b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A16) 12622b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *aspace = VME_A16; 12632b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A24) 12642b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *aspace = VME_A24; 12652b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A32) 12662b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *aspace = VME_A32; 12672b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12682b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *cycle = 0; 12692b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (lm_ctl & CA91CX42_LM_CTL_SUPR) 12702b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *cycle |= VME_SUPER; 12712b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (lm_ctl & CA91CX42_LM_CTL_NPRIV) 12722b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *cycle |= VME_USER; 12732b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (lm_ctl & CA91CX42_LM_CTL_PGM) 12742b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *cycle |= VME_PROG; 12752b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (lm_ctl & CA91CX42_LM_CTL_DATA) 12762b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch *cycle |= VME_DATA; 12772b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12782b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_unlock(&(lm->mtx)); 12792b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12802b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return enabled; 12812b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch} 12822b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12832b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch/* 12842b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * Attach a callback to a specific location monitor. 12852b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * 12862b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * Callback will be passed the monitor triggered. 12872b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch */ 12882b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welchint ca91cx42_lm_attach(struct vme_lm_resource *lm, int monitor, 12892b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch void (*callback)(int)) 12902b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch{ 12912b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch u32 lm_ctl, tmp; 12922b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch struct ca91cx42_driver *bridge; 12932b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch struct device *dev; 12942b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12952b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch bridge = lm->parent->driver_priv; 12962b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch dev = lm->parent->parent; 12972b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 12982b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_lock(&(lm->mtx)); 12992b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13002b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* Ensure that the location monitor is configured - need PGM or DATA */ 13012b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl = ioread32(bridge->base + LM_CTL); 13022b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if ((lm_ctl & (CA91CX42_LM_CTL_PGM | CA91CX42_LM_CTL_DATA)) == 0) { 13032b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_unlock(&(lm->mtx)); 13042b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch dev_err(dev, "Location monitor not properly configured\n"); 13052b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return -EINVAL; 13062b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch } 13072b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13082b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* Check that a callback isn't already attached */ 13092b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if (bridge->lm_callback[monitor] != NULL) { 13102b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_unlock(&(lm->mtx)); 13112b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch dev_err(dev, "Existing callback attached\n"); 13122b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return -EBUSY; 13132b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch } 13142b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13152b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* Attach callback */ 13162b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch bridge->lm_callback[monitor] = callback; 13172b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13182b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* Enable Location Monitor interrupt */ 13192b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch tmp = ioread32(bridge->base + LINT_EN); 13202b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch tmp |= CA91CX42_LINT_LM[monitor]; 13212b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch iowrite32(tmp, bridge->base + LINT_EN); 13222b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13232b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* Ensure that global Location Monitor Enable set */ 13242b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if ((lm_ctl & CA91CX42_LM_CTL_EN) == 0) { 13252b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch lm_ctl |= CA91CX42_LM_CTL_EN; 13262b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch iowrite32(lm_ctl, bridge->base + LM_CTL); 13272b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch } 13282b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13292b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_unlock(&(lm->mtx)); 13302b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13312b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return 0; 13322b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch} 13332b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13342b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch/* 13352b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch * Detach a callback function forn a specific location monitor. 13362b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch */ 13372b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welchint ca91cx42_lm_detach(struct vme_lm_resource *lm, int monitor) 13382b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch{ 13392b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch u32 tmp; 13402b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch struct ca91cx42_driver *bridge; 13412b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13422b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch bridge = lm->parent->driver_priv; 13432b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13442b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_lock(&(lm->mtx)); 13452b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13462b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* Disable Location Monitor and ensure previous interrupts are clear */ 13472b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch tmp = ioread32(bridge->base + LINT_EN); 13482b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch tmp &= ~CA91CX42_LINT_LM[monitor]; 13492b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch iowrite32(tmp, bridge->base + LINT_EN); 13502b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13512b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch iowrite32(CA91CX42_LINT_LM[monitor], 13522b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch bridge->base + LINT_STAT); 13532b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13542b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* Detach callback */ 13552b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch bridge->lm_callback[monitor] = NULL; 13562b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13572b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch /* If all location monitors disabled, disable global Location Monitor */ 13582b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch if ((tmp & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 | 13592b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch CA91CX42_LINT_LM3)) == 0) { 13602b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch tmp = ioread32(bridge->base + LM_CTL); 13612b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch tmp &= ~CA91CX42_LM_CTL_EN; 13622b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch iowrite32(tmp, bridge->base + LM_CTL); 13632b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch } 13642b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13652b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch mutex_unlock(&(lm->mtx)); 13662b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 13672b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch return 0; 13682b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch} 13692b82beb8c1bc81b3dde69d16cacbc22546681acfMartyn Welch 137029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchint ca91cx42_slot_get(struct vme_bridge *ca91cx42_bridge) 137160479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 13723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch u32 slot = 0; 137329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 137429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 137529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 137660479690af6d559d4202bed139db90323386bd2bMartyn Welch 137712b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welch if (!geoid) { 137829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch slot = ioread32(bridge->base + VCSR_BS); 137912b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welch slot = ((slot & CA91CX42_VCSR_BS_SLOT_M) >> 27); 138012b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welch } else 138112b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welch slot = geoid; 138212b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welch 13833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return (int)slot; 13843d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 13853d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 13863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 13873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic int __init ca91cx42_init(void) 13883d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 13893d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return pci_register_driver(&ca91cx42_driver); 13903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 13913d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 13923d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch/* 13933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * Configure CR/CSR space 13943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * 13953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * Access to the CR/CSR can be configured at power-up. The location of the 13963d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * CR/CSR registers in the CR/CSR address space is determined by the boards 13973d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * Auto-ID or Geographic address. This function ensures that the window is 13983d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * enabled at an offset consistent with the boards geopgraphic address. 13993d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch */ 140029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic int ca91cx42_crcsr_init(struct vme_bridge *ca91cx42_bridge, 140129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct pci_dev *pdev) 14023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 14033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch unsigned int crcsr_addr; 14043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int tmp, slot; 140529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 140629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 140729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 14083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 140929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch slot = ca91cx42_slot_get(ca91cx42_bridge); 141025331ba2f8e36abe77211765fa879106cdbc43e6Martyn Welch 141125331ba2f8e36abe77211765fa879106cdbc43e6Martyn Welch /* Write CSR Base Address if slot ID is supplied as a module param */ 141225331ba2f8e36abe77211765fa879106cdbc43e6Martyn Welch if (geoid) 141325331ba2f8e36abe77211765fa879106cdbc43e6Martyn Welch iowrite32(geoid << 27, bridge->base + VCSR_BS); 141425331ba2f8e36abe77211765fa879106cdbc43e6Martyn Welch 14153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_info(&pdev->dev, "CR/CSR Offset: %d\n", slot); 14163d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (slot == 0) { 14173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Slot number is unset, not configuring " 14183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "CR/CSR space\n"); 14193d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return -EINVAL; 142060479690af6d559d4202bed139db90323386bd2bMartyn Welch } 14213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 14223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Allocate mem for CR/CSR image */ 142329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE, 142429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch &(bridge->crcsr_bus)); 142529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch if (bridge->crcsr_kernel == NULL) { 14263d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " 14273d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "image\n"); 14283d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return -ENOMEM; 142960479690af6d559d4202bed139db90323386bd2bMartyn Welch } 143060479690af6d559d4202bed139db90323386bd2bMartyn Welch 143129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch memset(bridge->crcsr_kernel, 0, VME_CRCSR_BUF_SIZE); 143260479690af6d559d4202bed139db90323386bd2bMartyn Welch 14333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch crcsr_addr = slot * (512 * 1024); 143429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(bridge->crcsr_bus - crcsr_addr, bridge->base + VCSR_TO); 143560479690af6d559d4202bed139db90323386bd2bMartyn Welch 143629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch tmp = ioread32(bridge->base + VCSR_CTL); 14373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch tmp |= CA91CX42_VCSR_CTL_EN; 143829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(tmp, bridge->base + VCSR_CTL); 143960479690af6d559d4202bed139db90323386bd2bMartyn Welch 14403d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 144160479690af6d559d4202bed139db90323386bd2bMartyn Welch} 144260479690af6d559d4202bed139db90323386bd2bMartyn Welch 144329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welchstatic void ca91cx42_crcsr_exit(struct vme_bridge *ca91cx42_bridge, 144429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct pci_dev *pdev) 144560479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 14463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch u32 tmp; 144729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 144829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 144929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 145060479690af6d559d4202bed139db90323386bd2bMartyn Welch 14513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Turn off CR/CSR space */ 145229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch tmp = ioread32(bridge->base + VCSR_CTL); 14533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch tmp &= ~CA91CX42_VCSR_CTL_EN; 145429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(tmp, bridge->base + VCSR_CTL); 145560479690af6d559d4202bed139db90323386bd2bMartyn Welch 14563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Free image */ 145729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0, bridge->base + VCSR_TO); 145860479690af6d559d4202bed139db90323386bd2bMartyn Welch 145929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch pci_free_consistent(pdev, VME_CRCSR_BUF_SIZE, bridge->crcsr_kernel, 146029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge->crcsr_bus); 14613d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 146260479690af6d559d4202bed139db90323386bd2bMartyn Welch 14633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) 14643d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch{ 14653d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch int retval, i; 14663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch u32 data; 14673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct list_head *pos = NULL; 146829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct vme_bridge *ca91cx42_bridge; 146929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *ca91cx42_device; 14703d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct vme_master_resource *master_image; 14713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct vme_slave_resource *slave_image; 14723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct vme_dma_resource *dma_ctrlr; 14733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct vme_lm_resource *lm; 14743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 14753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* We want to support more than one of each bridge so we need to 14763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * dynamically allocate the bridge structure 14773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch */ 14783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge = kmalloc(sizeof(struct vme_bridge), GFP_KERNEL); 14793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 14803d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (ca91cx42_bridge == NULL) { 14813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Failed to allocate memory for device " 14823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "structure\n"); 14833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -ENOMEM; 14843d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_struct; 14853d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 14863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 14873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch memset(ca91cx42_bridge, 0, sizeof(struct vme_bridge)); 14883d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 148929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_device = kmalloc(sizeof(struct ca91cx42_driver), GFP_KERNEL); 149029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 149129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch if (ca91cx42_device == NULL) { 149229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch dev_err(&pdev->dev, "Failed to allocate memory for device " 149329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch "structure\n"); 149429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch retval = -ENOMEM; 149529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch goto err_driver; 149629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch } 149729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 149829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch memset(ca91cx42_device, 0, sizeof(struct ca91cx42_driver)); 149929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 150029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_bridge->driver_priv = ca91cx42_device; 150129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 15023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Enable the device */ 15033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = pci_enable_device(pdev); 15043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (retval) { 15053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Unable to enable device\n"); 15063d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_enable; 15073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 15083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Map Registers */ 15103d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = pci_request_regions(pdev, driver_name); 15113d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (retval) { 15123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Unable to reserve resources\n"); 15133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_resource; 15143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 15153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15163d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* map registers in BAR 0 */ 151729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_device->base = ioremap_nocache(pci_resource_start(pdev, 0), 15183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 4096); 151929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch if (!ca91cx42_device->base) { 15203d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Unable to remap CRG region\n"); 15213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -EIO; 15223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_remap; 15233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 15243d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Check to see if the mapping worked out */ 152629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch data = ioread32(ca91cx42_device->base + CA91CX42_PCI_ID) & 0x0000FFFF; 15273d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (data != PCI_VENDOR_ID_TUNDRA) { 15283d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "PCI_ID check failed\n"); 15293d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -EIO; 15303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_test; 15313d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 15323d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Initialize wait queues & mutual exclusion flags */ 153429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch init_waitqueue_head(&(ca91cx42_device->dma_queue)); 153529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch init_waitqueue_head(&(ca91cx42_device->iack_queue)); 153629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch mutex_init(&(ca91cx42_device->vme_int)); 153729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch mutex_init(&(ca91cx42_device->vme_rmw)); 15383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->parent = &(pdev->dev); 15403d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch strcpy(ca91cx42_bridge->name, driver_name); 15413d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15423d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Setup IRQ */ 15433d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = ca91cx42_irq_init(ca91cx42_bridge); 15443d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (retval != 0) { 15453d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Chip Initialization failed.\n"); 15463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_irq; 15473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 15483d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15493d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Add master windows to list */ 15503d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch INIT_LIST_HEAD(&(ca91cx42_bridge->master_resources)); 15513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch for (i = 0; i < CA91C142_MAX_MASTER; i++) { 15523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image = kmalloc(sizeof(struct vme_master_resource), 15533d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch GFP_KERNEL); 15543d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (master_image == NULL) { 15553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Failed to allocate memory for " 15563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "master resource structure\n"); 15573d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -ENOMEM; 15583d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_master; 15593d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 15603d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image->parent = ca91cx42_bridge; 15613d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch spin_lock_init(&(master_image->lock)); 15623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image->locked = 0; 15633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image->number = i; 15643d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image->address_attr = VME_A16 | VME_A24 | VME_A32 | 15653d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch VME_CRCSR | VME_USER1 | VME_USER2; 15663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | 15673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch VME_SUPER | VME_USER | VME_PROG | VME_DATA; 15683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image->width_attr = VME_D8 | VME_D16 | VME_D32 | VME_D64; 15698fafb47638012d93134d0ff38adcc5fc661beeb1Martyn Welch memset(&(master_image->bus_resource), 0, 15703d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch sizeof(struct resource)); 15713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image->kern_base = NULL; 15723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_add_tail(&(master_image->list), 15733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch &(ca91cx42_bridge->master_resources)); 15743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 15753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Add slave windows to list */ 15773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch INIT_LIST_HEAD(&(ca91cx42_bridge->slave_resources)); 15783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch for (i = 0; i < CA91C142_MAX_SLAVE; i++) { 15793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image = kmalloc(sizeof(struct vme_slave_resource), 15803d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch GFP_KERNEL); 15813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (slave_image == NULL) { 15823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Failed to allocate memory for " 15833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "slave resource structure\n"); 15843d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -ENOMEM; 15853d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_slave; 15863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 15873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image->parent = ca91cx42_bridge; 15883d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch mutex_init(&(slave_image->mtx)); 15893d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image->locked = 0; 15903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image->number = i; 15913d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image->address_attr = VME_A24 | VME_A32 | VME_USER1 | 15923d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch VME_USER2; 15933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Only windows 0 and 4 support A16 */ 15953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (i == 0 || i == 4) 15963d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image->address_attr |= VME_A16; 15973d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 15983d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | 15993d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch VME_SUPER | VME_USER | VME_PROG | VME_DATA; 16003d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_add_tail(&(slave_image->list), 16013d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch &(ca91cx42_bridge->slave_resources)); 16023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 16034860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 16043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Add dma engines to list */ 16053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch INIT_LIST_HEAD(&(ca91cx42_bridge->dma_resources)); 16063d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch for (i = 0; i < CA91C142_MAX_DMA; i++) { 16073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dma_ctrlr = kmalloc(sizeof(struct vme_dma_resource), 16083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch GFP_KERNEL); 16093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (dma_ctrlr == NULL) { 16103d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Failed to allocate memory for " 16113d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "dma resource structure\n"); 16123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -ENOMEM; 16133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_dma; 16143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 16153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dma_ctrlr->parent = ca91cx42_bridge; 16163d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch mutex_init(&(dma_ctrlr->mtx)); 16173d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dma_ctrlr->locked = 0; 16183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dma_ctrlr->number = i; 16194f723df45d3952c485ee0125fb6797ad615901c3Martyn Welch dma_ctrlr->route_attr = VME_DMA_VME_TO_MEM | 16204f723df45d3952c485ee0125fb6797ad615901c3Martyn Welch VME_DMA_MEM_TO_VME; 16213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch INIT_LIST_HEAD(&(dma_ctrlr->pending)); 16223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch INIT_LIST_HEAD(&(dma_ctrlr->running)); 16233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_add_tail(&(dma_ctrlr->list), 16243d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch &(ca91cx42_bridge->dma_resources)); 16253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 16264860ab74d4d577d21fbfe0da3bd0925f3efc8907Martyn Welch 16273d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Add location monitor to list */ 16283d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch INIT_LIST_HEAD(&(ca91cx42_bridge->lm_resources)); 16293d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch lm = kmalloc(sizeof(struct vme_lm_resource), GFP_KERNEL); 16303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (lm == NULL) { 16313d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Failed to allocate memory for " 16323d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch "location monitor resource structure\n"); 16333d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = -ENOMEM; 16343d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_lm; 16353d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 16363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch lm->parent = ca91cx42_bridge; 16373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch mutex_init(&(lm->mtx)); 16383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch lm->locked = 0; 16393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch lm->number = 1; 16403d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch lm->monitors = 4; 16413d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_add_tail(&(lm->list), &(ca91cx42_bridge->lm_resources)); 16423d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 16433d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->slave_get = ca91cx42_slave_get; 16443d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->slave_set = ca91cx42_slave_set; 16453d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->master_get = ca91cx42_master_get; 16463d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->master_set = ca91cx42_master_set; 16473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->master_read = ca91cx42_master_read; 16483d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->master_write = ca91cx42_master_write; 16493d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->master_rmw = ca91cx42_master_rmw; 16503d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->dma_list_add = ca91cx42_dma_list_add; 16513d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->dma_list_exec = ca91cx42_dma_list_exec; 16523d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->dma_list_empty = ca91cx42_dma_list_empty; 1653c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch ca91cx42_bridge->irq_set = ca91cx42_irq_set; 1654c813f592a5e65cfd9321f51c95a6977e9518dde6Martyn Welch ca91cx42_bridge->irq_generate = ca91cx42_irq_generate; 16553d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->lm_set = ca91cx42_lm_set; 16563d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->lm_get = ca91cx42_lm_get; 16573d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->lm_attach = ca91cx42_lm_attach; 16583d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->lm_detach = ca91cx42_lm_detach; 16593d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch ca91cx42_bridge->slot_get = ca91cx42_slot_get; 16603d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 166129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch data = ioread32(ca91cx42_device->base + MISC_CTL); 16623d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_info(&pdev->dev, "Board is%s the VME system controller\n", 16633d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch (data & CA91CX42_MISC_CTL_SYSCON) ? "" : " not"); 166429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch dev_info(&pdev->dev, "Slot ID is %d\n", 166529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_slot_get(ca91cx42_bridge)); 16663d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 166729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch if (ca91cx42_crcsr_init(ca91cx42_bridge, pdev)) { 16683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "CR/CSR configuration failed.\n"); 166960479690af6d559d4202bed139db90323386bd2bMartyn Welch } 167060479690af6d559d4202bed139db90323386bd2bMartyn Welch 16713d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Need to save ca91cx42_bridge pointer locally in link list for use in 16723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch * ca91cx42_remove() 16733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch */ 16743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch retval = vme_register_bridge(ca91cx42_bridge); 16753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch if (retval != 0) { 16763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dev_err(&pdev->dev, "Chip Registration failed.\n"); 16773d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch goto err_reg; 16783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 16793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 168029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch pci_set_drvdata(pdev, ca91cx42_bridge); 168129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 16823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return 0; 16833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 16843d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch vme_unregister_bridge(ca91cx42_bridge); 16853d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_reg: 168629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_crcsr_exit(ca91cx42_bridge, pdev); 16873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_lm: 16883d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* resources are stored in link list */ 16893d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_for_each(pos, &(ca91cx42_bridge->lm_resources)) { 16903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch lm = list_entry(pos, struct vme_lm_resource, list); 16913d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_del(pos); 16923d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(lm); 16933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 16943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_dma: 16953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* resources are stored in link list */ 16963d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_for_each(pos, &(ca91cx42_bridge->dma_resources)) { 16973d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dma_ctrlr = list_entry(pos, struct vme_dma_resource, list); 16983d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_del(pos); 16993d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(dma_ctrlr); 170060479690af6d559d4202bed139db90323386bd2bMartyn Welch } 17013d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_slave: 17023d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* resources are stored in link list */ 17033d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_for_each(pos, &(ca91cx42_bridge->slave_resources)) { 17043d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image = list_entry(pos, struct vme_slave_resource, list); 17053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_del(pos); 17063d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(slave_image); 17073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 17083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_master: 17093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* resources are stored in link list */ 17103d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_for_each(pos, &(ca91cx42_bridge->master_resources)) { 17113d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image = list_entry(pos, struct vme_master_resource, 17123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list); 17133d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_del(pos); 17143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(master_image); 17153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 17163d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 171729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_irq_exit(ca91cx42_device, pdev); 17183d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_irq: 17193d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_test: 172029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iounmap(ca91cx42_device->base); 17213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_remap: 17223d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pci_release_regions(pdev); 17233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_resource: 17243d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pci_disable_device(pdev); 17253d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_enable: 172629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch kfree(ca91cx42_device); 172729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welcherr_driver: 17283d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(ca91cx42_bridge); 17293d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welcherr_struct: 17303d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch return retval; 173160479690af6d559d4202bed139db90323386bd2bMartyn Welch 173260479690af6d559d4202bed139db90323386bd2bMartyn Welch} 173360479690af6d559d4202bed139db90323386bd2bMartyn Welch 17343d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchvoid ca91cx42_remove(struct pci_dev *pdev) 173560479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 17363d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct list_head *pos = NULL; 17373d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct vme_master_resource *master_image; 17383d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct vme_slave_resource *slave_image; 17393d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct vme_dma_resource *dma_ctrlr; 17403d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch struct vme_lm_resource *lm; 174129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct ca91cx42_driver *bridge; 174229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch struct vme_bridge *ca91cx42_bridge = pci_get_drvdata(pdev); 174329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 174429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch bridge = ca91cx42_bridge->driver_priv; 174529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch 174660479690af6d559d4202bed139db90323386bd2bMartyn Welch 17473d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Turn off Ints */ 174829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0, bridge->base + LINT_EN); 17493d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 17503d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* Turn off the windows */ 175129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00800000, bridge->base + LSI0_CTL); 175229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00800000, bridge->base + LSI1_CTL); 175329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00800000, bridge->base + LSI2_CTL); 175429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00800000, bridge->base + LSI3_CTL); 175529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00800000, bridge->base + LSI4_CTL); 175629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00800000, bridge->base + LSI5_CTL); 175729848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00800000, bridge->base + LSI6_CTL); 175829848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00800000, bridge->base + LSI7_CTL); 175929848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00F00000, bridge->base + VSI0_CTL); 176029848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00F00000, bridge->base + VSI1_CTL); 176129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00F00000, bridge->base + VSI2_CTL); 176229848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00F00000, bridge->base + VSI3_CTL); 176329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00F00000, bridge->base + VSI4_CTL); 176429848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00F00000, bridge->base + VSI5_CTL); 176529848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00F00000, bridge->base + VSI6_CTL); 176629848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iowrite32(0x00F00000, bridge->base + VSI7_CTL); 17673d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 17683d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch vme_unregister_bridge(ca91cx42_bridge); 1769bb9ea89ec8a3d80a835d53afc388ad5f67fd3cb3Martyn Welch 1770bb9ea89ec8a3d80a835d53afc388ad5f67fd3cb3Martyn Welch ca91cx42_crcsr_exit(ca91cx42_bridge, pdev); 1771bb9ea89ec8a3d80a835d53afc388ad5f67fd3cb3Martyn Welch 17723d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* resources are stored in link list */ 17733d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_for_each(pos, &(ca91cx42_bridge->lm_resources)) { 17743d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch lm = list_entry(pos, struct vme_lm_resource, list); 17753d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_del(pos); 17763d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(lm); 177760479690af6d559d4202bed139db90323386bd2bMartyn Welch } 17783d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 17793d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* resources are stored in link list */ 17803d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_for_each(pos, &(ca91cx42_bridge->dma_resources)) { 17813d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch dma_ctrlr = list_entry(pos, struct vme_dma_resource, list); 17823d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_del(pos); 17833d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(dma_ctrlr); 178460479690af6d559d4202bed139db90323386bd2bMartyn Welch } 178560479690af6d559d4202bed139db90323386bd2bMartyn Welch 17863d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* resources are stored in link list */ 17873d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_for_each(pos, &(ca91cx42_bridge->slave_resources)) { 17883d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch slave_image = list_entry(pos, struct vme_slave_resource, list); 17893d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_del(pos); 17903d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(slave_image); 17913d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 179260479690af6d559d4202bed139db90323386bd2bMartyn Welch 17933d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch /* resources are stored in link list */ 17943d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_for_each(pos, &(ca91cx42_bridge->master_resources)) { 17953d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch master_image = list_entry(pos, struct vme_master_resource, 17963d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list); 17973d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch list_del(pos); 17983d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(master_image); 17993d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch } 180060479690af6d559d4202bed139db90323386bd2bMartyn Welch 180129848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch ca91cx42_irq_exit(bridge, pdev); 180260479690af6d559d4202bed139db90323386bd2bMartyn Welch 180329848ac9f3b33bf171439ae2d66d40e6a71446c4Martyn Welch iounmap(bridge->base); 180460479690af6d559d4202bed139db90323386bd2bMartyn Welch 18053d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pci_release_regions(pdev); 180660479690af6d559d4202bed139db90323386bd2bMartyn Welch 18073d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pci_disable_device(pdev); 18083d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch 18093d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch kfree(ca91cx42_bridge); 181060479690af6d559d4202bed139db90323386bd2bMartyn Welch} 181160479690af6d559d4202bed139db90323386bd2bMartyn Welch 18123d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchstatic void __exit ca91cx42_exit(void) 181360479690af6d559d4202bed139db90323386bd2bMartyn Welch{ 18143d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch pci_unregister_driver(&ca91cx42_driver); 18153d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welch} 181660479690af6d559d4202bed139db90323386bd2bMartyn Welch 181712b2d5c0895a03e941e7c145d9d23a45908a857bMartyn WelchMODULE_PARM_DESC(geoid, "Override geographical addressing"); 181812b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welchmodule_param(geoid, int, 0); 181912b2d5c0895a03e941e7c145d9d23a45908a857bMartyn Welch 18203d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn WelchMODULE_DESCRIPTION("VME driver for the Tundra Universe II VME bridge"); 18213d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn WelchMODULE_LICENSE("GPL"); 182260479690af6d559d4202bed139db90323386bd2bMartyn Welch 18233d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchmodule_init(ca91cx42_init); 18243d0f8bc7517718a4846de6f538ad67a4f7f83239Martyn Welchmodule_exit(ca91cx42_exit); 1825