ehci-q.c revision 196705c9bbc03540429b0f7cf9ee35c2f928a534
1/*
2 * Copyright (C) 2001-2004 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* this file is part of ehci-hcd.c */
20
21/*-------------------------------------------------------------------------*/
22
23/*
24 * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
25 *
26 * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number).  We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
30 *
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling.  Performance improvements can be
33 * an ongoing challenge.  That's in "ehci-sched.c".
34 *
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries.  TTs will
38 * buffer low/full speed data so the host collects it at high speed.
39 */
40
41/*-------------------------------------------------------------------------*/
42
43/* fill a qtd, returning how much of the buffer we were able to queue up */
44
45static int
46qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
47		int token, int maxpacket)
48{
49	int	i, count;
50	u64	addr = buf;
51
52	/* one buffer entry per 4K ... first might be short or unaligned */
53	qtd->hw_buf [0] = cpu_to_le32 ((u32)addr);
54	qtd->hw_buf_hi [0] = cpu_to_le32 ((u32)(addr >> 32));
55	count = 0x1000 - (buf & 0x0fff);	/* rest of that page */
56	if (likely (len < count))		/* ... iff needed */
57		count = len;
58	else {
59		buf +=  0x1000;
60		buf &= ~0x0fff;
61
62		/* per-qtd limit: from 16K to 20K (best alignment) */
63		for (i = 1; count < len && i < 5; i++) {
64			addr = buf;
65			qtd->hw_buf [i] = cpu_to_le32 ((u32)addr);
66			qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32));
67			buf += 0x1000;
68			if ((count + 0x1000) < len)
69				count += 0x1000;
70			else
71				count = len;
72		}
73
74		/* short packets may only terminate transfers */
75		if (count != len)
76			count -= (count % maxpacket);
77	}
78	qtd->hw_token = cpu_to_le32 ((count << 16) | token);
79	qtd->length = count;
80
81	return count;
82}
83
84/*-------------------------------------------------------------------------*/
85
86static inline void
87qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
88{
89	/* writes to an active overlay are unsafe */
90	BUG_ON(qh->qh_state != QH_STATE_IDLE);
91
92	qh->hw_qtd_next = QTD_NEXT (qtd->qtd_dma);
93	qh->hw_alt_next = EHCI_LIST_END;
94
95	/* Except for control endpoints, we make hardware maintain data
96	 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
97	 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
98	 * ever clear it.
99	 */
100	if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
101		unsigned	is_out, epnum;
102
103		is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
104		epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
105		if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
106			qh->hw_token &= ~__constant_cpu_to_le32 (QTD_TOGGLE);
107			usb_settoggle (qh->dev, epnum, is_out, 1);
108		}
109	}
110
111	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
112	wmb ();
113	qh->hw_token &= __constant_cpu_to_le32 (QTD_TOGGLE | QTD_STS_PING);
114}
115
116/* if it weren't for a common silicon quirk (writing the dummy into the qh
117 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
118 * recovery (including urb dequeue) would need software changes to a QH...
119 */
120static void
121qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
122{
123	struct ehci_qtd *qtd;
124
125	if (list_empty (&qh->qtd_list))
126		qtd = qh->dummy;
127	else {
128		qtd = list_entry (qh->qtd_list.next,
129				struct ehci_qtd, qtd_list);
130		/* first qtd may already be partially processed */
131		if (cpu_to_le32 (qtd->qtd_dma) == qh->hw_current)
132			qtd = NULL;
133	}
134
135	if (qtd)
136		qh_update (ehci, qh, qtd);
137}
138
139/*-------------------------------------------------------------------------*/
140
141static void qtd_copy_status (
142	struct ehci_hcd *ehci,
143	struct urb *urb,
144	size_t length,
145	u32 token
146)
147{
148	/* count IN/OUT bytes, not SETUP (even short packets) */
149	if (likely (QTD_PID (token) != 2))
150		urb->actual_length += length - QTD_LENGTH (token);
151
152	/* don't modify error codes */
153	if (unlikely (urb->status != -EINPROGRESS))
154		return;
155
156	/* force cleanup after short read; not always an error */
157	if (unlikely (IS_SHORT_READ (token)))
158		urb->status = -EREMOTEIO;
159
160	/* serious "can't proceed" faults reported by the hardware */
161	if (token & QTD_STS_HALT) {
162		if (token & QTD_STS_BABBLE) {
163			/* FIXME "must" disable babbling device's port too */
164			urb->status = -EOVERFLOW;
165		} else if (token & QTD_STS_MMF) {
166			/* fs/ls interrupt xfer missed the complete-split */
167			urb->status = -EPROTO;
168		} else if (token & QTD_STS_DBE) {
169			urb->status = (QTD_PID (token) == 1) /* IN ? */
170				? -ENOSR  /* hc couldn't read data */
171				: -ECOMM; /* hc couldn't write data */
172		} else if (token & QTD_STS_XACT) {
173			/* timeout, bad crc, wrong PID, etc; retried */
174			if (QTD_CERR (token))
175				urb->status = -EPIPE;
176			else {
177				ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
178					urb->dev->devpath,
179					usb_pipeendpoint (urb->pipe),
180					usb_pipein (urb->pipe) ? "in" : "out");
181				urb->status = -EPROTO;
182			}
183		/* CERR nonzero + no errors + halt --> stall */
184		} else if (QTD_CERR (token))
185			urb->status = -EPIPE;
186		else	/* unknown */
187			urb->status = -EPROTO;
188
189		ehci_vdbg (ehci,
190			"dev%d ep%d%s qtd token %08x --> status %d\n",
191			usb_pipedevice (urb->pipe),
192			usb_pipeendpoint (urb->pipe),
193			usb_pipein (urb->pipe) ? "in" : "out",
194			token, urb->status);
195
196		/* if async CSPLIT failed, try cleaning out the TT buffer */
197		if (urb->status != -EPIPE
198				&& urb->dev->tt && !usb_pipeint (urb->pipe)
199				&& ((token & QTD_STS_MMF) != 0
200					|| QTD_CERR(token) == 0)
201				&& (!ehci_is_TDI(ehci)
202			                || urb->dev->tt->hub !=
203					   ehci_to_hcd(ehci)->self.root_hub)) {
204#ifdef DEBUG
205			struct usb_device *tt = urb->dev->tt->hub;
206			dev_dbg (&tt->dev,
207				"clear tt buffer port %d, a%d ep%d t%08x\n",
208				urb->dev->ttport, urb->dev->devnum,
209				usb_pipeendpoint (urb->pipe), token);
210#endif /* DEBUG */
211			usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
212		}
213	}
214}
215
216static void
217ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb)
218__releases(ehci->lock)
219__acquires(ehci->lock)
220{
221	if (likely (urb->hcpriv != NULL)) {
222		struct ehci_qh	*qh = (struct ehci_qh *) urb->hcpriv;
223
224		/* S-mask in a QH means it's an interrupt urb */
225		if ((qh->hw_info2 & __constant_cpu_to_le32 (QH_SMASK)) != 0) {
226
227			/* ... update hc-wide periodic stats (for usbfs) */
228			ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
229		}
230		qh_put (qh);
231	}
232
233	spin_lock (&urb->lock);
234	urb->hcpriv = NULL;
235	switch (urb->status) {
236	case -EINPROGRESS:		/* success */
237		urb->status = 0;
238	default:			/* fault */
239		COUNT (ehci->stats.complete);
240		break;
241	case -EREMOTEIO:		/* fault or normal */
242		if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
243			urb->status = 0;
244		COUNT (ehci->stats.complete);
245		break;
246	case -ECONNRESET:		/* canceled */
247	case -ENOENT:
248		COUNT (ehci->stats.unlink);
249		break;
250	}
251	spin_unlock (&urb->lock);
252
253#ifdef EHCI_URB_TRACE
254	ehci_dbg (ehci,
255		"%s %s urb %p ep%d%s status %d len %d/%d\n",
256		__FUNCTION__, urb->dev->devpath, urb,
257		usb_pipeendpoint (urb->pipe),
258		usb_pipein (urb->pipe) ? "in" : "out",
259		urb->status,
260		urb->actual_length, urb->transfer_buffer_length);
261#endif
262
263	/* complete() can reenter this HCD */
264	spin_unlock (&ehci->lock);
265	usb_hcd_giveback_urb (ehci_to_hcd(ehci), urb);
266	spin_lock (&ehci->lock);
267}
268
269static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
270static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
271
272static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
273static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
274
275/*
276 * Process and free completed qtds for a qh, returning URBs to drivers.
277 * Chases up to qh->hw_current.  Returns number of completions called,
278 * indicating how much "real" work we did.
279 */
280#define HALT_BIT __constant_cpu_to_le32(QTD_STS_HALT)
281static unsigned
282qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
283{
284	struct ehci_qtd		*last = NULL, *end = qh->dummy;
285	struct list_head	*entry, *tmp;
286	int			stopped;
287	unsigned		count = 0;
288	int			do_status = 0;
289	u8			state;
290
291	if (unlikely (list_empty (&qh->qtd_list)))
292		return count;
293
294	/* completions (or tasks on other cpus) must never clobber HALT
295	 * till we've gone through and cleaned everything up, even when
296	 * they add urbs to this qh's queue or mark them for unlinking.
297	 *
298	 * NOTE:  unlinking expects to be done in queue order.
299	 */
300	state = qh->qh_state;
301	qh->qh_state = QH_STATE_COMPLETING;
302	stopped = (state == QH_STATE_IDLE);
303
304	/* remove de-activated QTDs from front of queue.
305	 * after faults (including short reads), cleanup this urb
306	 * then let the queue advance.
307	 * if queue is stopped, handles unlinks.
308	 */
309	list_for_each_safe (entry, tmp, &qh->qtd_list) {
310		struct ehci_qtd	*qtd;
311		struct urb	*urb;
312		u32		token = 0;
313
314		/* ignore QHs that are currently inactive */
315		if (qh->hw_info1 & __constant_cpu_to_le32(QH_INACTIVATE))
316			break;
317
318		qtd = list_entry (entry, struct ehci_qtd, qtd_list);
319		urb = qtd->urb;
320
321		/* clean up any state from previous QTD ...*/
322		if (last) {
323			if (likely (last->urb != urb)) {
324				ehci_urb_done (ehci, last->urb);
325				count++;
326			}
327			ehci_qtd_free (ehci, last);
328			last = NULL;
329		}
330
331		/* ignore urbs submitted during completions we reported */
332		if (qtd == end)
333			break;
334
335		/* hardware copies qtd out of qh overlay */
336		rmb ();
337		token = le32_to_cpu (qtd->hw_token);
338
339		/* always clean up qtds the hc de-activated */
340		if ((token & QTD_STS_ACTIVE) == 0) {
341
342			if ((token & QTD_STS_HALT) != 0) {
343				stopped = 1;
344
345			/* magic dummy for some short reads; qh won't advance.
346			 * that silicon quirk can kick in with this dummy too.
347			 */
348			} else if (IS_SHORT_READ (token)
349					&& !(qtd->hw_alt_next & EHCI_LIST_END)) {
350				stopped = 1;
351				goto halt;
352			}
353
354		/* stop scanning when we reach qtds the hc is using */
355		} else if (likely (!stopped
356				&& HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
357			break;
358
359		} else {
360			stopped = 1;
361
362			if (unlikely (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)))
363				urb->status = -ESHUTDOWN;
364
365			/* ignore active urbs unless some previous qtd
366			 * for the urb faulted (including short read) or
367			 * its urb was canceled.  we may patch qh or qtds.
368			 */
369			if (likely (urb->status == -EINPROGRESS))
370				continue;
371
372			/* issue status after short control reads */
373			if (unlikely (do_status != 0)
374					&& QTD_PID (token) == 0 /* OUT */) {
375				do_status = 0;
376				continue;
377			}
378
379			/* token in overlay may be most current */
380			if (state == QH_STATE_IDLE
381					&& cpu_to_le32 (qtd->qtd_dma)
382						== qh->hw_current)
383				token = le32_to_cpu (qh->hw_token);
384
385			/* force halt for unlinked or blocked qh, so we'll
386			 * patch the qh later and so that completions can't
387			 * activate it while we "know" it's stopped.
388			 */
389			if ((HALT_BIT & qh->hw_token) == 0) {
390halt:
391				qh->hw_token |= HALT_BIT;
392				wmb ();
393			}
394		}
395
396		/* remove it from the queue */
397		spin_lock (&urb->lock);
398		qtd_copy_status (ehci, urb, qtd->length, token);
399		do_status = (urb->status == -EREMOTEIO)
400				&& usb_pipecontrol (urb->pipe);
401		spin_unlock (&urb->lock);
402
403		if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
404			last = list_entry (qtd->qtd_list.prev,
405					struct ehci_qtd, qtd_list);
406			last->hw_next = qtd->hw_next;
407		}
408		list_del (&qtd->qtd_list);
409		last = qtd;
410	}
411
412	/* last urb's completion might still need calling */
413	if (likely (last != NULL)) {
414		ehci_urb_done (ehci, last->urb);
415		count++;
416		ehci_qtd_free (ehci, last);
417	}
418
419	/* restore original state; caller must unlink or relink */
420	qh->qh_state = state;
421
422	/* be sure the hardware's done with the qh before refreshing
423	 * it after fault cleanup, or recovering from silicon wrongly
424	 * overlaying the dummy qtd (which reduces DMA chatter).
425	 */
426	if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
427		switch (state) {
428		case QH_STATE_IDLE:
429			qh_refresh(ehci, qh);
430			break;
431		case QH_STATE_LINKED:
432			/* should be rare for periodic transfers,
433			 * except maybe high bandwidth ...
434			 */
435			if ((__constant_cpu_to_le32 (QH_SMASK)
436					& qh->hw_info2) != 0) {
437				intr_deschedule (ehci, qh);
438				(void) qh_schedule (ehci, qh);
439			} else
440				unlink_async (ehci, qh);
441			break;
442		/* otherwise, unlink already started */
443		}
444	}
445
446	return count;
447}
448
449/*-------------------------------------------------------------------------*/
450
451// high bandwidth multiplier, as encoded in highspeed endpoint descriptors
452#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
453// ... and packet size, for any kind of endpoint descriptor
454#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
455
456/*
457 * reverse of qh_urb_transaction:  free a list of TDs.
458 * used for cleanup after errors, before HC sees an URB's TDs.
459 */
460static void qtd_list_free (
461	struct ehci_hcd		*ehci,
462	struct urb		*urb,
463	struct list_head	*qtd_list
464) {
465	struct list_head	*entry, *temp;
466
467	list_for_each_safe (entry, temp, qtd_list) {
468		struct ehci_qtd	*qtd;
469
470		qtd = list_entry (entry, struct ehci_qtd, qtd_list);
471		list_del (&qtd->qtd_list);
472		ehci_qtd_free (ehci, qtd);
473	}
474}
475
476/*
477 * create a list of filled qtds for this URB; won't link into qh.
478 */
479static struct list_head *
480qh_urb_transaction (
481	struct ehci_hcd		*ehci,
482	struct urb		*urb,
483	struct list_head	*head,
484	gfp_t			flags
485) {
486	struct ehci_qtd		*qtd, *qtd_prev;
487	dma_addr_t		buf;
488	int			len, maxpacket;
489	int			is_input;
490	u32			token;
491
492	/*
493	 * URBs map to sequences of QTDs:  one logical transaction
494	 */
495	qtd = ehci_qtd_alloc (ehci, flags);
496	if (unlikely (!qtd))
497		return NULL;
498	list_add_tail (&qtd->qtd_list, head);
499	qtd->urb = urb;
500
501	token = QTD_STS_ACTIVE;
502	token |= (EHCI_TUNE_CERR << 10);
503	/* for split transactions, SplitXState initialized to zero */
504
505	len = urb->transfer_buffer_length;
506	is_input = usb_pipein (urb->pipe);
507	if (usb_pipecontrol (urb->pipe)) {
508		/* SETUP pid */
509		qtd_fill (qtd, urb->setup_dma, sizeof (struct usb_ctrlrequest),
510			token | (2 /* "setup" */ << 8), 8);
511
512		/* ... and always at least one more pid */
513		token ^= QTD_TOGGLE;
514		qtd_prev = qtd;
515		qtd = ehci_qtd_alloc (ehci, flags);
516		if (unlikely (!qtd))
517			goto cleanup;
518		qtd->urb = urb;
519		qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
520		list_add_tail (&qtd->qtd_list, head);
521
522		/* for zero length DATA stages, STATUS is always IN */
523		if (len == 0)
524			token |= (1 /* "in" */ << 8);
525	}
526
527	/*
528	 * data transfer stage:  buffer setup
529	 */
530	buf = urb->transfer_dma;
531
532	if (is_input)
533		token |= (1 /* "in" */ << 8);
534	/* else it's already initted to "out" pid (0 << 8) */
535
536	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
537
538	/*
539	 * buffer gets wrapped in one or more qtds;
540	 * last one may be "short" (including zero len)
541	 * and may serve as a control status ack
542	 */
543	for (;;) {
544		int this_qtd_len;
545
546		this_qtd_len = qtd_fill (qtd, buf, len, token, maxpacket);
547		len -= this_qtd_len;
548		buf += this_qtd_len;
549		if (is_input)
550			qtd->hw_alt_next = ehci->async->hw_alt_next;
551
552		/* qh makes control packets use qtd toggle; maybe switch it */
553		if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
554			token ^= QTD_TOGGLE;
555
556		if (likely (len <= 0))
557			break;
558
559		qtd_prev = qtd;
560		qtd = ehci_qtd_alloc (ehci, flags);
561		if (unlikely (!qtd))
562			goto cleanup;
563		qtd->urb = urb;
564		qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
565		list_add_tail (&qtd->qtd_list, head);
566	}
567
568	/* unless the bulk/interrupt caller wants a chance to clean
569	 * up after short reads, hc should advance qh past this urb
570	 */
571	if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
572				|| usb_pipecontrol (urb->pipe)))
573		qtd->hw_alt_next = EHCI_LIST_END;
574
575	/*
576	 * control requests may need a terminating data "status" ack;
577	 * bulk ones may need a terminating short packet (zero length).
578	 */
579	if (likely (urb->transfer_buffer_length != 0)) {
580		int	one_more = 0;
581
582		if (usb_pipecontrol (urb->pipe)) {
583			one_more = 1;
584			token ^= 0x0100;	/* "in" <--> "out"  */
585			token |= QTD_TOGGLE;	/* force DATA1 */
586		} else if (usb_pipebulk (urb->pipe)
587				&& (urb->transfer_flags & URB_ZERO_PACKET)
588				&& !(urb->transfer_buffer_length % maxpacket)) {
589			one_more = 1;
590		}
591		if (one_more) {
592			qtd_prev = qtd;
593			qtd = ehci_qtd_alloc (ehci, flags);
594			if (unlikely (!qtd))
595				goto cleanup;
596			qtd->urb = urb;
597			qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
598			list_add_tail (&qtd->qtd_list, head);
599
600			/* never any data in such packets */
601			qtd_fill (qtd, 0, 0, token, 0);
602		}
603	}
604
605	/* by default, enable interrupt on urb completion */
606	if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
607		qtd->hw_token |= __constant_cpu_to_le32 (QTD_IOC);
608	return head;
609
610cleanup:
611	qtd_list_free (ehci, urb, head);
612	return NULL;
613}
614
615/*-------------------------------------------------------------------------*/
616
617// Would be best to create all qh's from config descriptors,
618// when each interface/altsetting is established.  Unlink
619// any previous qh and cancel its urbs first; endpoints are
620// implicitly reset then (data toggle too).
621// That'd mean updating how usbcore talks to HCDs. (2.7?)
622
623
624/*
625 * Each QH holds a qtd list; a QH is used for everything except iso.
626 *
627 * For interrupt urbs, the scheduler must set the microframe scheduling
628 * mask(s) each time the QH gets scheduled.  For highspeed, that's
629 * just one microframe in the s-mask.  For split interrupt transactions
630 * there are additional complications: c-mask, maybe FSTNs.
631 */
632static struct ehci_qh *
633qh_make (
634	struct ehci_hcd		*ehci,
635	struct urb		*urb,
636	gfp_t			flags
637) {
638	struct ehci_qh		*qh = ehci_qh_alloc (ehci, flags);
639	u32			info1 = 0, info2 = 0;
640	int			is_input, type;
641	int			maxp = 0;
642
643	if (!qh)
644		return qh;
645
646	/*
647	 * init endpoint/device data for this QH
648	 */
649	info1 |= usb_pipeendpoint (urb->pipe) << 8;
650	info1 |= usb_pipedevice (urb->pipe) << 0;
651
652	is_input = usb_pipein (urb->pipe);
653	type = usb_pipetype (urb->pipe);
654	maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
655
656	/* Compute interrupt scheduling parameters just once, and save.
657	 * - allowing for high bandwidth, how many nsec/uframe are used?
658	 * - split transactions need a second CSPLIT uframe; same question
659	 * - splits also need a schedule gap (for full/low speed I/O)
660	 * - qh has a polling interval
661	 *
662	 * For control/bulk requests, the HC or TT handles these.
663	 */
664	if (type == PIPE_INTERRUPT) {
665		qh->usecs = NS_TO_US (usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
666				hb_mult (maxp) * max_packet (maxp)));
667		qh->start = NO_FRAME;
668
669		if (urb->dev->speed == USB_SPEED_HIGH) {
670			qh->c_usecs = 0;
671			qh->gap_uf = 0;
672
673			qh->period = urb->interval >> 3;
674			if (qh->period == 0 && urb->interval != 1) {
675				/* NOTE interval 2 or 4 uframes could work.
676				 * But interval 1 scheduling is simpler, and
677				 * includes high bandwidth.
678				 */
679				dbg ("intr period %d uframes, NYET!",
680						urb->interval);
681				goto done;
682			}
683		} else {
684			struct usb_tt	*tt = urb->dev->tt;
685			int		think_time;
686
687			/* gap is f(FS/LS transfer times) */
688			qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
689					is_input, 0, maxp) / (125 * 1000);
690
691			/* FIXME this just approximates SPLIT/CSPLIT times */
692			if (is_input) {		// SPLIT, gap, CSPLIT+DATA
693				qh->c_usecs = qh->usecs + HS_USECS (0);
694				qh->usecs = HS_USECS (1);
695			} else {		// SPLIT+DATA, gap, CSPLIT
696				qh->usecs += HS_USECS (1);
697				qh->c_usecs = HS_USECS (0);
698			}
699
700			think_time = tt ? tt->think_time : 0;
701			qh->tt_usecs = NS_TO_US (think_time +
702					usb_calc_bus_time (urb->dev->speed,
703					is_input, 0, max_packet (maxp)));
704			qh->period = urb->interval;
705		}
706	}
707
708	/* support for tt scheduling, and access to toggles */
709	qh->dev = urb->dev;
710
711	/* using TT? */
712	switch (urb->dev->speed) {
713	case USB_SPEED_LOW:
714		info1 |= (1 << 12);	/* EPS "low" */
715		/* FALL THROUGH */
716
717	case USB_SPEED_FULL:
718		/* EPS 0 means "full" */
719		if (type != PIPE_INTERRUPT)
720			info1 |= (EHCI_TUNE_RL_TT << 28);
721		if (type == PIPE_CONTROL) {
722			info1 |= (1 << 27);	/* for TT */
723			info1 |= 1 << 14;	/* toggle from qtd */
724		}
725		info1 |= maxp << 16;
726
727		info2 |= (EHCI_TUNE_MULT_TT << 30);
728
729		/* Some Freescale processors have an erratum in which the
730		 * port number in the queue head was 0..N-1 instead of 1..N.
731		 */
732		if (ehci_has_fsl_portno_bug(ehci))
733			info2 |= (urb->dev->ttport-1) << 23;
734		else
735			info2 |= urb->dev->ttport << 23;
736
737		/* set the address of the TT; for TDI's integrated
738		 * root hub tt, leave it zeroed.
739		 */
740		if (!ehci_is_TDI(ehci)
741				|| urb->dev->tt->hub !=
742					ehci_to_hcd(ehci)->self.root_hub)
743			info2 |= urb->dev->tt->hub->devnum << 16;
744
745		/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
746
747		break;
748
749	case USB_SPEED_HIGH:		/* no TT involved */
750		info1 |= (2 << 12);	/* EPS "high" */
751		if (type == PIPE_CONTROL) {
752			info1 |= (EHCI_TUNE_RL_HS << 28);
753			info1 |= 64 << 16;	/* usb2 fixed maxpacket */
754			info1 |= 1 << 14;	/* toggle from qtd */
755			info2 |= (EHCI_TUNE_MULT_HS << 30);
756		} else if (type == PIPE_BULK) {
757			info1 |= (EHCI_TUNE_RL_HS << 28);
758			info1 |= 512 << 16;	/* usb2 fixed maxpacket */
759			info2 |= (EHCI_TUNE_MULT_HS << 30);
760		} else {		/* PIPE_INTERRUPT */
761			info1 |= max_packet (maxp) << 16;
762			info2 |= hb_mult (maxp) << 30;
763		}
764		break;
765	default:
766		dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
767done:
768		qh_put (qh);
769		return NULL;
770	}
771
772	/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
773
774	/* init as live, toggle clear, advance to dummy */
775	qh->qh_state = QH_STATE_IDLE;
776	qh->hw_info1 = cpu_to_le32 (info1);
777	qh->hw_info2 = cpu_to_le32 (info2);
778	usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
779	qh_refresh (ehci, qh);
780	return qh;
781}
782
783/*-------------------------------------------------------------------------*/
784
785/* move qh (and its qtds) onto async queue; maybe enable queue.  */
786
787static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
788{
789	__le32		dma = QH_NEXT (qh->qh_dma);
790	struct ehci_qh	*head;
791
792	/* (re)start the async schedule? */
793	head = ehci->async;
794	timer_action_done (ehci, TIMER_ASYNC_OFF);
795	if (!head->qh_next.qh) {
796		u32	cmd = ehci_readl(ehci, &ehci->regs->command);
797
798		if (!(cmd & CMD_ASE)) {
799			/* in case a clear of CMD_ASE didn't take yet */
800			(void)handshake(ehci, &ehci->regs->status,
801					STS_ASS, 0, 150);
802			cmd |= CMD_ASE | CMD_RUN;
803			ehci_writel(ehci, cmd, &ehci->regs->command);
804			ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
805			/* posted write need not be known to HC yet ... */
806		}
807	}
808
809	/* clear halt and/or toggle; and maybe recover from silicon quirk */
810	if (qh->qh_state == QH_STATE_IDLE)
811		qh_refresh (ehci, qh);
812
813	/* splice right after start */
814	qh->qh_next = head->qh_next;
815	qh->hw_next = head->hw_next;
816	wmb ();
817
818	head->qh_next.qh = qh;
819	head->hw_next = dma;
820
821	qh->qh_state = QH_STATE_LINKED;
822	/* qtd completions reported later by interrupt */
823}
824
825/*-------------------------------------------------------------------------*/
826
827#define	QH_ADDR_MASK	__constant_cpu_to_le32(0x7f)
828
829/*
830 * For control/bulk/interrupt, return QH with these TDs appended.
831 * Allocates and initializes the QH if necessary.
832 * Returns null if it can't allocate a QH it needs to.
833 * If the QH has TDs (urbs) already, that's great.
834 */
835static struct ehci_qh *qh_append_tds (
836	struct ehci_hcd		*ehci,
837	struct urb		*urb,
838	struct list_head	*qtd_list,
839	int			epnum,
840	void			**ptr
841)
842{
843	struct ehci_qh		*qh = NULL;
844
845	qh = (struct ehci_qh *) *ptr;
846	if (unlikely (qh == NULL)) {
847		/* can't sleep here, we have ehci->lock... */
848		qh = qh_make (ehci, urb, GFP_ATOMIC);
849		*ptr = qh;
850	}
851	if (likely (qh != NULL)) {
852		struct ehci_qtd	*qtd;
853
854		if (unlikely (list_empty (qtd_list)))
855			qtd = NULL;
856		else
857			qtd = list_entry (qtd_list->next, struct ehci_qtd,
858					qtd_list);
859
860		/* control qh may need patching ... */
861		if (unlikely (epnum == 0)) {
862
863                        /* usb_reset_device() briefly reverts to address 0 */
864                        if (usb_pipedevice (urb->pipe) == 0)
865                                qh->hw_info1 &= ~QH_ADDR_MASK;
866		}
867
868		/* just one way to queue requests: swap with the dummy qtd.
869		 * only hc or qh_refresh() ever modify the overlay.
870		 */
871		if (likely (qtd != NULL)) {
872			struct ehci_qtd		*dummy;
873			dma_addr_t		dma;
874			__le32			token;
875
876			/* to avoid racing the HC, use the dummy td instead of
877			 * the first td of our list (becomes new dummy).  both
878			 * tds stay deactivated until we're done, when the
879			 * HC is allowed to fetch the old dummy (4.10.2).
880			 */
881			token = qtd->hw_token;
882			qtd->hw_token = HALT_BIT;
883			wmb ();
884			dummy = qh->dummy;
885
886			dma = dummy->qtd_dma;
887			*dummy = *qtd;
888			dummy->qtd_dma = dma;
889
890			list_del (&qtd->qtd_list);
891			list_add (&dummy->qtd_list, qtd_list);
892			__list_splice (qtd_list, qh->qtd_list.prev);
893
894			ehci_qtd_init (qtd, qtd->qtd_dma);
895			qh->dummy = qtd;
896
897			/* hc must see the new dummy at list end */
898			dma = qtd->qtd_dma;
899			qtd = list_entry (qh->qtd_list.prev,
900					struct ehci_qtd, qtd_list);
901			qtd->hw_next = QTD_NEXT (dma);
902
903			/* let the hc process these next qtds */
904			wmb ();
905			dummy->hw_token = token;
906
907			urb->hcpriv = qh_get (qh);
908		}
909	}
910	return qh;
911}
912
913/*-------------------------------------------------------------------------*/
914
915static int
916submit_async (
917	struct ehci_hcd		*ehci,
918	struct usb_host_endpoint *ep,
919	struct urb		*urb,
920	struct list_head	*qtd_list,
921	gfp_t			mem_flags
922) {
923	struct ehci_qtd		*qtd;
924	int			epnum;
925	unsigned long		flags;
926	struct ehci_qh		*qh = NULL;
927	int			rc = 0;
928
929	qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
930	epnum = ep->desc.bEndpointAddress;
931
932#ifdef EHCI_URB_TRACE
933	ehci_dbg (ehci,
934		"%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
935		__FUNCTION__, urb->dev->devpath, urb,
936		epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
937		urb->transfer_buffer_length,
938		qtd, ep->hcpriv);
939#endif
940
941	spin_lock_irqsave (&ehci->lock, flags);
942	if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
943			       &ehci_to_hcd(ehci)->flags))) {
944		rc = -ESHUTDOWN;
945		goto done;
946	}
947
948	qh = qh_append_tds (ehci, urb, qtd_list, epnum, &ep->hcpriv);
949	if (unlikely(qh == NULL)) {
950		rc = -ENOMEM;
951		goto done;
952	}
953
954	/* Control/bulk operations through TTs don't need scheduling,
955	 * the HC and TT handle it when the TT has a buffer ready.
956	 */
957	if (likely (qh->qh_state == QH_STATE_IDLE))
958		qh_link_async (ehci, qh_get (qh));
959 done:
960	spin_unlock_irqrestore (&ehci->lock, flags);
961	if (unlikely (qh == NULL))
962		qtd_list_free (ehci, urb, qtd_list);
963	return rc;
964}
965
966/*-------------------------------------------------------------------------*/
967
968/* the async qh for the qtds being reclaimed are now unlinked from the HC */
969
970static void end_unlink_async (struct ehci_hcd *ehci)
971{
972	struct ehci_qh		*qh = ehci->reclaim;
973	struct ehci_qh		*next;
974
975	timer_action_done (ehci, TIMER_IAA_WATCHDOG);
976
977	// qh->hw_next = cpu_to_le32 (qh->qh_dma);
978	qh->qh_state = QH_STATE_IDLE;
979	qh->qh_next.qh = NULL;
980	qh_put (qh);			// refcount from reclaim
981
982	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
983	next = qh->reclaim;
984	ehci->reclaim = next;
985	ehci->reclaim_ready = 0;
986	qh->reclaim = NULL;
987
988	qh_completions (ehci, qh);
989
990	if (!list_empty (&qh->qtd_list)
991			&& HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
992		qh_link_async (ehci, qh);
993	else {
994		qh_put (qh);		// refcount from async list
995
996		/* it's not free to turn the async schedule on/off; leave it
997		 * active but idle for a while once it empties.
998		 */
999		if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1000				&& ehci->async->qh_next.qh == NULL)
1001			timer_action (ehci, TIMER_ASYNC_OFF);
1002	}
1003
1004	if (next) {
1005		ehci->reclaim = NULL;
1006		start_unlink_async (ehci, next);
1007	}
1008}
1009
1010/* makes sure the async qh will become idle */
1011/* caller must own ehci->lock */
1012
1013static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1014{
1015	int		cmd = ehci_readl(ehci, &ehci->regs->command);
1016	struct ehci_qh	*prev;
1017
1018#ifdef DEBUG
1019	assert_spin_locked(&ehci->lock);
1020	if (ehci->reclaim
1021			|| (qh->qh_state != QH_STATE_LINKED
1022				&& qh->qh_state != QH_STATE_UNLINK_WAIT)
1023			)
1024		BUG ();
1025#endif
1026
1027	/* stop async schedule right now? */
1028	if (unlikely (qh == ehci->async)) {
1029		/* can't get here without STS_ASS set */
1030		if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1031				&& !ehci->reclaim) {
1032			/* ... and CMD_IAAD clear */
1033			ehci_writel(ehci, cmd & ~CMD_ASE,
1034				    &ehci->regs->command);
1035			wmb ();
1036			// handshake later, if we need to
1037			timer_action_done (ehci, TIMER_ASYNC_OFF);
1038		}
1039		return;
1040	}
1041
1042	qh->qh_state = QH_STATE_UNLINK;
1043	ehci->reclaim = qh = qh_get (qh);
1044
1045	prev = ehci->async;
1046	while (prev->qh_next.qh != qh)
1047		prev = prev->qh_next.qh;
1048
1049	prev->hw_next = qh->hw_next;
1050	prev->qh_next = qh->qh_next;
1051	wmb ();
1052
1053	if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
1054		/* if (unlikely (qh->reclaim != 0))
1055		 *	this will recurse, probably not much
1056		 */
1057		end_unlink_async (ehci);
1058		return;
1059	}
1060
1061	ehci->reclaim_ready = 0;
1062	cmd |= CMD_IAAD;
1063	ehci_writel(ehci, cmd, &ehci->regs->command);
1064	(void)ehci_readl(ehci, &ehci->regs->command);
1065	timer_action (ehci, TIMER_IAA_WATCHDOG);
1066}
1067
1068/*-------------------------------------------------------------------------*/
1069
1070static void scan_async (struct ehci_hcd *ehci)
1071{
1072	struct ehci_qh		*qh;
1073	enum ehci_timer_action	action = TIMER_IO_WATCHDOG;
1074
1075	if (!++(ehci->stamp))
1076		ehci->stamp++;
1077	timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1078rescan:
1079	qh = ehci->async->qh_next.qh;
1080	if (likely (qh != NULL)) {
1081		do {
1082			/* clean any finished work for this qh */
1083			if (!list_empty (&qh->qtd_list)
1084					&& qh->stamp != ehci->stamp) {
1085				int temp;
1086
1087				/* unlinks could happen here; completion
1088				 * reporting drops the lock.  rescan using
1089				 * the latest schedule, but don't rescan
1090				 * qhs we already finished (no looping).
1091				 */
1092				qh = qh_get (qh);
1093				qh->stamp = ehci->stamp;
1094				temp = qh_completions (ehci, qh);
1095				qh_put (qh);
1096				if (temp != 0) {
1097					goto rescan;
1098				}
1099			}
1100
1101			/* unlink idle entries, reducing HC PCI usage as well
1102			 * as HCD schedule-scanning costs.  delay for any qh
1103			 * we just scanned, there's a not-unusual case that it
1104			 * doesn't stay idle for long.
1105			 * (plus, avoids some kind of re-activation race.)
1106			 */
1107			if (list_empty (&qh->qtd_list)) {
1108				if (qh->stamp == ehci->stamp)
1109					action = TIMER_ASYNC_SHRINK;
1110				else if (!ehci->reclaim
1111					    && qh->qh_state == QH_STATE_LINKED)
1112					start_unlink_async (ehci, qh);
1113			}
1114
1115			qh = qh->qh_next.qh;
1116		} while (qh);
1117	}
1118	if (action == TIMER_ASYNC_SHRINK)
1119		timer_action (ehci, TIMER_ASYNC_SHRINK);
1120}
1121