ehci-q.c revision fa38dfcc56b5f6cce787f9aaa5d1830509213802
1/*
2 * Copyright (C) 2001-2004 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* this file is part of ehci-hcd.c */
20
21/*-------------------------------------------------------------------------*/
22
23/*
24 * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
25 *
26 * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number).  We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
30 *
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling.  Performance improvements can be
33 * an ongoing challenge.  That's in "ehci-sched.c".
34 *
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries.  TTs will
38 * buffer low/full speed data so the host collects it at high speed.
39 */
40
41/*-------------------------------------------------------------------------*/
42
43/* fill a qtd, returning how much of the buffer we were able to queue up */
44
45static int
46qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47		  size_t len, int token, int maxpacket)
48{
49	int	i, count;
50	u64	addr = buf;
51
52	/* one buffer entry per 4K ... first might be short or unaligned */
53	qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54	qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55	count = 0x1000 - (buf & 0x0fff);	/* rest of that page */
56	if (likely (len < count))		/* ... iff needed */
57		count = len;
58	else {
59		buf +=  0x1000;
60		buf &= ~0x0fff;
61
62		/* per-qtd limit: from 16K to 20K (best alignment) */
63		for (i = 1; count < len && i < 5; i++) {
64			addr = buf;
65			qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66			qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67					(u32)(addr >> 32));
68			buf += 0x1000;
69			if ((count + 0x1000) < len)
70				count += 0x1000;
71			else
72				count = len;
73		}
74
75		/* short packets may only terminate transfers */
76		if (count != len)
77			count -= (count % maxpacket);
78	}
79	qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80	qtd->length = count;
81
82	return count;
83}
84
85/*-------------------------------------------------------------------------*/
86
87static inline void
88qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
89{
90	/* writes to an active overlay are unsafe */
91	BUG_ON(qh->qh_state != QH_STATE_IDLE);
92
93	qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
94	qh->hw_alt_next = EHCI_LIST_END(ehci);
95
96	/* Except for control endpoints, we make hardware maintain data
97	 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
98	 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
99	 * ever clear it.
100	 */
101	if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
102		unsigned	is_out, epnum;
103
104		is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
105		epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f;
106		if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
107			qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
108			usb_settoggle (qh->dev, epnum, is_out, 1);
109		}
110	}
111
112	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
113	wmb ();
114	qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
115}
116
117/* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
120 */
121static void
122qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
123{
124	struct ehci_qtd *qtd;
125
126	if (list_empty (&qh->qtd_list))
127		qtd = qh->dummy;
128	else {
129		qtd = list_entry (qh->qtd_list.next,
130				struct ehci_qtd, qtd_list);
131		/* first qtd may already be partially processed */
132		if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
133			qtd = NULL;
134	}
135
136	if (qtd)
137		qh_update (ehci, qh, qtd);
138}
139
140/*-------------------------------------------------------------------------*/
141
142static int qtd_copy_status (
143	struct ehci_hcd *ehci,
144	struct urb *urb,
145	size_t length,
146	u32 token
147)
148{
149	int	status = -EINPROGRESS;
150
151	/* count IN/OUT bytes, not SETUP (even short packets) */
152	if (likely (QTD_PID (token) != 2))
153		urb->actual_length += length - QTD_LENGTH (token);
154
155	/* don't modify error codes */
156	if (unlikely(urb->unlinked))
157		return status;
158
159	/* force cleanup after short read; not always an error */
160	if (unlikely (IS_SHORT_READ (token)))
161		status = -EREMOTEIO;
162
163	/* serious "can't proceed" faults reported by the hardware */
164	if (token & QTD_STS_HALT) {
165		if (token & QTD_STS_BABBLE) {
166			/* FIXME "must" disable babbling device's port too */
167			status = -EOVERFLOW;
168		} else if (token & QTD_STS_MMF) {
169			/* fs/ls interrupt xfer missed the complete-split */
170			status = -EPROTO;
171		} else if (token & QTD_STS_DBE) {
172			status = (QTD_PID (token) == 1) /* IN ? */
173				? -ENOSR  /* hc couldn't read data */
174				: -ECOMM; /* hc couldn't write data */
175		} else if (token & QTD_STS_XACT) {
176			/* timeout, bad crc, wrong PID, etc; retried */
177			if (QTD_CERR (token))
178				status = -EPIPE;
179			else {
180				ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
181					urb->dev->devpath,
182					usb_pipeendpoint (urb->pipe),
183					usb_pipein (urb->pipe) ? "in" : "out");
184				status = -EPROTO;
185			}
186		/* CERR nonzero + no errors + halt --> stall */
187		} else if (QTD_CERR (token))
188			status = -EPIPE;
189		else	/* unknown */
190			status = -EPROTO;
191
192		ehci_vdbg (ehci,
193			"dev%d ep%d%s qtd token %08x --> status %d\n",
194			usb_pipedevice (urb->pipe),
195			usb_pipeendpoint (urb->pipe),
196			usb_pipein (urb->pipe) ? "in" : "out",
197			token, status);
198
199		/* if async CSPLIT failed, try cleaning out the TT buffer */
200		if (status != -EPIPE
201				&& urb->dev->tt
202				&& !usb_pipeint(urb->pipe)
203				&& ((token & QTD_STS_MMF) != 0
204					|| QTD_CERR(token) == 0)
205				&& (!ehci_is_TDI(ehci)
206			                || urb->dev->tt->hub !=
207					   ehci_to_hcd(ehci)->self.root_hub)) {
208#ifdef DEBUG
209			struct usb_device *tt = urb->dev->tt->hub;
210			dev_dbg (&tt->dev,
211				"clear tt buffer port %d, a%d ep%d t%08x\n",
212				urb->dev->ttport, urb->dev->devnum,
213				usb_pipeendpoint (urb->pipe), token);
214#endif /* DEBUG */
215			/* REVISIT ARC-derived cores don't clear the root
216			 * hub TT buffer in this way...
217			 */
218			usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
219		}
220	}
221
222	return status;
223}
224
225static void
226ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
227__releases(ehci->lock)
228__acquires(ehci->lock)
229{
230	if (likely (urb->hcpriv != NULL)) {
231		struct ehci_qh	*qh = (struct ehci_qh *) urb->hcpriv;
232
233		/* S-mask in a QH means it's an interrupt urb */
234		if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
235
236			/* ... update hc-wide periodic stats (for usbfs) */
237			ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
238		}
239		qh_put (qh);
240	}
241
242	if (unlikely(urb->unlinked)) {
243		COUNT(ehci->stats.unlink);
244	} else {
245		/* report non-error and short read status as zero */
246		if (status == -EINPROGRESS || status == -EREMOTEIO)
247			status = 0;
248		COUNT(ehci->stats.complete);
249	}
250
251#ifdef EHCI_URB_TRACE
252	ehci_dbg (ehci,
253		"%s %s urb %p ep%d%s status %d len %d/%d\n",
254		__func__, urb->dev->devpath, urb,
255		usb_pipeendpoint (urb->pipe),
256		usb_pipein (urb->pipe) ? "in" : "out",
257		status,
258		urb->actual_length, urb->transfer_buffer_length);
259#endif
260
261	/* complete() can reenter this HCD */
262	usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
263	spin_unlock (&ehci->lock);
264	usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
265	spin_lock (&ehci->lock);
266}
267
268static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
269static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
270
271static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
272static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
273
274/*
275 * Process and free completed qtds for a qh, returning URBs to drivers.
276 * Chases up to qh->hw_current.  Returns number of completions called,
277 * indicating how much "real" work we did.
278 */
279static unsigned
280qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
281{
282	struct ehci_qtd		*last = NULL, *end = qh->dummy;
283	struct list_head	*entry, *tmp;
284	int			last_status = -EINPROGRESS;
285	int			stopped;
286	unsigned		count = 0;
287	u8			state;
288	__le32			halt = HALT_BIT(ehci);
289
290	if (unlikely (list_empty (&qh->qtd_list)))
291		return count;
292
293	/* completions (or tasks on other cpus) must never clobber HALT
294	 * till we've gone through and cleaned everything up, even when
295	 * they add urbs to this qh's queue or mark them for unlinking.
296	 *
297	 * NOTE:  unlinking expects to be done in queue order.
298	 */
299	state = qh->qh_state;
300	qh->qh_state = QH_STATE_COMPLETING;
301	stopped = (state == QH_STATE_IDLE);
302
303	/* remove de-activated QTDs from front of queue.
304	 * after faults (including short reads), cleanup this urb
305	 * then let the queue advance.
306	 * if queue is stopped, handles unlinks.
307	 */
308	list_for_each_safe (entry, tmp, &qh->qtd_list) {
309		struct ehci_qtd	*qtd;
310		struct urb	*urb;
311		u32		token = 0;
312
313		qtd = list_entry (entry, struct ehci_qtd, qtd_list);
314		urb = qtd->urb;
315
316		/* clean up any state from previous QTD ...*/
317		if (last) {
318			if (likely (last->urb != urb)) {
319				ehci_urb_done(ehci, last->urb, last_status);
320				count++;
321				last_status = -EINPROGRESS;
322			}
323			ehci_qtd_free (ehci, last);
324			last = NULL;
325		}
326
327		/* ignore urbs submitted during completions we reported */
328		if (qtd == end)
329			break;
330
331		/* hardware copies qtd out of qh overlay */
332		rmb ();
333		token = hc32_to_cpu(ehci, qtd->hw_token);
334
335		/* always clean up qtds the hc de-activated */
336		if ((token & QTD_STS_ACTIVE) == 0) {
337
338			/* on STALL, error, and short reads this urb must
339			 * complete and all its qtds must be recycled.
340			 */
341			if ((token & QTD_STS_HALT) != 0) {
342				stopped = 1;
343
344			/* magic dummy for some short reads; qh won't advance.
345			 * that silicon quirk can kick in with this dummy too.
346			 *
347			 * other short reads won't stop the queue, including
348			 * control transfers (status stage handles that) or
349			 * most other single-qtd reads ... the queue stops if
350			 * URB_SHORT_NOT_OK was set so the driver submitting
351			 * the urbs could clean it up.
352			 */
353			} else if (IS_SHORT_READ (token)
354					&& !(qtd->hw_alt_next
355						& EHCI_LIST_END(ehci))) {
356				stopped = 1;
357				goto halt;
358			}
359
360		/* stop scanning when we reach qtds the hc is using */
361		} else if (likely (!stopped
362				&& HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
363			break;
364
365		/* scan the whole queue for unlinks whenever it stops */
366		} else {
367			stopped = 1;
368
369			/* cancel everything if we halt, suspend, etc */
370			if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
371				last_status = -ESHUTDOWN;
372
373			/* this qtd is active; skip it unless a previous qtd
374			 * for its urb faulted, or its urb was canceled.
375			 */
376			else if (last_status == -EINPROGRESS && !urb->unlinked)
377				continue;
378
379			/* qh unlinked; token in overlay may be most current */
380			if (state == QH_STATE_IDLE
381					&& cpu_to_hc32(ehci, qtd->qtd_dma)
382						== qh->hw_current)
383				token = hc32_to_cpu(ehci, qh->hw_token);
384
385			/* force halt for unlinked or blocked qh, so we'll
386			 * patch the qh later and so that completions can't
387			 * activate it while we "know" it's stopped.
388			 */
389			if ((halt & qh->hw_token) == 0) {
390halt:
391				qh->hw_token |= halt;
392				wmb ();
393			}
394		}
395
396		/* unless we already know the urb's status, collect qtd status
397		 * and update count of bytes transferred.  in common short read
398		 * cases with only one data qtd (including control transfers),
399		 * queue processing won't halt.  but with two or more qtds (for
400		 * example, with a 32 KB transfer), when the first qtd gets a
401		 * short read the second must be removed by hand.
402		 */
403		if (last_status == -EINPROGRESS) {
404			last_status = qtd_copy_status(ehci, urb,
405					qtd->length, token);
406			if (last_status == -EREMOTEIO
407					&& (qtd->hw_alt_next
408						& EHCI_LIST_END(ehci)))
409				last_status = -EINPROGRESS;
410		}
411
412		/* if we're removing something not at the queue head,
413		 * patch the hardware queue pointer.
414		 */
415		if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
416			last = list_entry (qtd->qtd_list.prev,
417					struct ehci_qtd, qtd_list);
418			last->hw_next = qtd->hw_next;
419		}
420
421		/* remove qtd; it's recycled after possible urb completion */
422		list_del (&qtd->qtd_list);
423		last = qtd;
424	}
425
426	/* last urb's completion might still need calling */
427	if (likely (last != NULL)) {
428		ehci_urb_done(ehci, last->urb, last_status);
429		count++;
430		ehci_qtd_free (ehci, last);
431	}
432
433	/* restore original state; caller must unlink or relink */
434	qh->qh_state = state;
435
436	/* be sure the hardware's done with the qh before refreshing
437	 * it after fault cleanup, or recovering from silicon wrongly
438	 * overlaying the dummy qtd (which reduces DMA chatter).
439	 */
440	if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
441		switch (state) {
442		case QH_STATE_IDLE:
443			qh_refresh(ehci, qh);
444			break;
445		case QH_STATE_LINKED:
446			/* We won't refresh a QH that's linked (after the HC
447			 * stopped the queue).  That avoids a race:
448			 *  - HC reads first part of QH;
449			 *  - CPU updates that first part and the token;
450			 *  - HC reads rest of that QH, including token
451			 * Result:  HC gets an inconsistent image, and then
452			 * DMAs to/from the wrong memory (corrupting it).
453			 *
454			 * That should be rare for interrupt transfers,
455			 * except maybe high bandwidth ...
456			 */
457			if ((cpu_to_hc32(ehci, QH_SMASK)
458					& qh->hw_info2) != 0) {
459				intr_deschedule (ehci, qh);
460				(void) qh_schedule (ehci, qh);
461			} else
462				unlink_async (ehci, qh);
463			break;
464		/* otherwise, unlink already started */
465		}
466	}
467
468	return count;
469}
470
471/*-------------------------------------------------------------------------*/
472
473// high bandwidth multiplier, as encoded in highspeed endpoint descriptors
474#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
475// ... and packet size, for any kind of endpoint descriptor
476#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
477
478/*
479 * reverse of qh_urb_transaction:  free a list of TDs.
480 * used for cleanup after errors, before HC sees an URB's TDs.
481 */
482static void qtd_list_free (
483	struct ehci_hcd		*ehci,
484	struct urb		*urb,
485	struct list_head	*qtd_list
486) {
487	struct list_head	*entry, *temp;
488
489	list_for_each_safe (entry, temp, qtd_list) {
490		struct ehci_qtd	*qtd;
491
492		qtd = list_entry (entry, struct ehci_qtd, qtd_list);
493		list_del (&qtd->qtd_list);
494		ehci_qtd_free (ehci, qtd);
495	}
496}
497
498/*
499 * create a list of filled qtds for this URB; won't link into qh.
500 */
501static struct list_head *
502qh_urb_transaction (
503	struct ehci_hcd		*ehci,
504	struct urb		*urb,
505	struct list_head	*head,
506	gfp_t			flags
507) {
508	struct ehci_qtd		*qtd, *qtd_prev;
509	dma_addr_t		buf;
510	int			len, maxpacket;
511	int			is_input;
512	u32			token;
513
514	/*
515	 * URBs map to sequences of QTDs:  one logical transaction
516	 */
517	qtd = ehci_qtd_alloc (ehci, flags);
518	if (unlikely (!qtd))
519		return NULL;
520	list_add_tail (&qtd->qtd_list, head);
521	qtd->urb = urb;
522
523	token = QTD_STS_ACTIVE;
524	token |= (EHCI_TUNE_CERR << 10);
525	/* for split transactions, SplitXState initialized to zero */
526
527	len = urb->transfer_buffer_length;
528	is_input = usb_pipein (urb->pipe);
529	if (usb_pipecontrol (urb->pipe)) {
530		/* SETUP pid */
531		qtd_fill(ehci, qtd, urb->setup_dma,
532				sizeof (struct usb_ctrlrequest),
533				token | (2 /* "setup" */ << 8), 8);
534
535		/* ... and always at least one more pid */
536		token ^= QTD_TOGGLE;
537		qtd_prev = qtd;
538		qtd = ehci_qtd_alloc (ehci, flags);
539		if (unlikely (!qtd))
540			goto cleanup;
541		qtd->urb = urb;
542		qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
543		list_add_tail (&qtd->qtd_list, head);
544
545		/* for zero length DATA stages, STATUS is always IN */
546		if (len == 0)
547			token |= (1 /* "in" */ << 8);
548	}
549
550	/*
551	 * data transfer stage:  buffer setup
552	 */
553	buf = urb->transfer_dma;
554
555	if (is_input)
556		token |= (1 /* "in" */ << 8);
557	/* else it's already initted to "out" pid (0 << 8) */
558
559	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
560
561	/*
562	 * buffer gets wrapped in one or more qtds;
563	 * last one may be "short" (including zero len)
564	 * and may serve as a control status ack
565	 */
566	for (;;) {
567		int this_qtd_len;
568
569		this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
570		len -= this_qtd_len;
571		buf += this_qtd_len;
572
573		/*
574		 * short reads advance to a "magic" dummy instead of the next
575		 * qtd ... that forces the queue to stop, for manual cleanup.
576		 * (this will usually be overridden later.)
577		 */
578		if (is_input)
579			qtd->hw_alt_next = ehci->async->hw_alt_next;
580
581		/* qh makes control packets use qtd toggle; maybe switch it */
582		if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
583			token ^= QTD_TOGGLE;
584
585		if (likely (len <= 0))
586			break;
587
588		qtd_prev = qtd;
589		qtd = ehci_qtd_alloc (ehci, flags);
590		if (unlikely (!qtd))
591			goto cleanup;
592		qtd->urb = urb;
593		qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
594		list_add_tail (&qtd->qtd_list, head);
595	}
596
597	/*
598	 * unless the caller requires manual cleanup after short reads,
599	 * have the alt_next mechanism keep the queue running after the
600	 * last data qtd (the only one, for control and most other cases).
601	 */
602	if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
603				|| usb_pipecontrol (urb->pipe)))
604		qtd->hw_alt_next = EHCI_LIST_END(ehci);
605
606	/*
607	 * control requests may need a terminating data "status" ack;
608	 * bulk ones may need a terminating short packet (zero length).
609	 */
610	if (likely (urb->transfer_buffer_length != 0)) {
611		int	one_more = 0;
612
613		if (usb_pipecontrol (urb->pipe)) {
614			one_more = 1;
615			token ^= 0x0100;	/* "in" <--> "out"  */
616			token |= QTD_TOGGLE;	/* force DATA1 */
617		} else if (usb_pipebulk (urb->pipe)
618				&& (urb->transfer_flags & URB_ZERO_PACKET)
619				&& !(urb->transfer_buffer_length % maxpacket)) {
620			one_more = 1;
621		}
622		if (one_more) {
623			qtd_prev = qtd;
624			qtd = ehci_qtd_alloc (ehci, flags);
625			if (unlikely (!qtd))
626				goto cleanup;
627			qtd->urb = urb;
628			qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
629			list_add_tail (&qtd->qtd_list, head);
630
631			/* never any data in such packets */
632			qtd_fill(ehci, qtd, 0, 0, token, 0);
633		}
634	}
635
636	/* by default, enable interrupt on urb completion */
637	if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
638		qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
639	return head;
640
641cleanup:
642	qtd_list_free (ehci, urb, head);
643	return NULL;
644}
645
646/*-------------------------------------------------------------------------*/
647
648// Would be best to create all qh's from config descriptors,
649// when each interface/altsetting is established.  Unlink
650// any previous qh and cancel its urbs first; endpoints are
651// implicitly reset then (data toggle too).
652// That'd mean updating how usbcore talks to HCDs. (2.7?)
653
654
655/*
656 * Each QH holds a qtd list; a QH is used for everything except iso.
657 *
658 * For interrupt urbs, the scheduler must set the microframe scheduling
659 * mask(s) each time the QH gets scheduled.  For highspeed, that's
660 * just one microframe in the s-mask.  For split interrupt transactions
661 * there are additional complications: c-mask, maybe FSTNs.
662 */
663static struct ehci_qh *
664qh_make (
665	struct ehci_hcd		*ehci,
666	struct urb		*urb,
667	gfp_t			flags
668) {
669	struct ehci_qh		*qh = ehci_qh_alloc (ehci, flags);
670	u32			info1 = 0, info2 = 0;
671	int			is_input, type;
672	int			maxp = 0;
673	struct usb_tt		*tt = urb->dev->tt;
674
675	if (!qh)
676		return qh;
677
678	/*
679	 * init endpoint/device data for this QH
680	 */
681	info1 |= usb_pipeendpoint (urb->pipe) << 8;
682	info1 |= usb_pipedevice (urb->pipe) << 0;
683
684	is_input = usb_pipein (urb->pipe);
685	type = usb_pipetype (urb->pipe);
686	maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
687
688	/* 1024 byte maxpacket is a hardware ceiling.  High bandwidth
689	 * acts like up to 3KB, but is built from smaller packets.
690	 */
691	if (max_packet(maxp) > 1024) {
692		ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
693		goto done;
694	}
695
696	/* Compute interrupt scheduling parameters just once, and save.
697	 * - allowing for high bandwidth, how many nsec/uframe are used?
698	 * - split transactions need a second CSPLIT uframe; same question
699	 * - splits also need a schedule gap (for full/low speed I/O)
700	 * - qh has a polling interval
701	 *
702	 * For control/bulk requests, the HC or TT handles these.
703	 */
704	if (type == PIPE_INTERRUPT) {
705		qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
706				is_input, 0,
707				hb_mult(maxp) * max_packet(maxp)));
708		qh->start = NO_FRAME;
709
710		if (urb->dev->speed == USB_SPEED_HIGH) {
711			qh->c_usecs = 0;
712			qh->gap_uf = 0;
713
714			qh->period = urb->interval >> 3;
715			if (qh->period == 0 && urb->interval != 1) {
716				/* NOTE interval 2 or 4 uframes could work.
717				 * But interval 1 scheduling is simpler, and
718				 * includes high bandwidth.
719				 */
720				dbg ("intr period %d uframes, NYET!",
721						urb->interval);
722				goto done;
723			}
724		} else {
725			int		think_time;
726
727			/* gap is f(FS/LS transfer times) */
728			qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
729					is_input, 0, maxp) / (125 * 1000);
730
731			/* FIXME this just approximates SPLIT/CSPLIT times */
732			if (is_input) {		// SPLIT, gap, CSPLIT+DATA
733				qh->c_usecs = qh->usecs + HS_USECS (0);
734				qh->usecs = HS_USECS (1);
735			} else {		// SPLIT+DATA, gap, CSPLIT
736				qh->usecs += HS_USECS (1);
737				qh->c_usecs = HS_USECS (0);
738			}
739
740			think_time = tt ? tt->think_time : 0;
741			qh->tt_usecs = NS_TO_US (think_time +
742					usb_calc_bus_time (urb->dev->speed,
743					is_input, 0, max_packet (maxp)));
744			qh->period = urb->interval;
745		}
746	}
747
748	/* support for tt scheduling, and access to toggles */
749	qh->dev = urb->dev;
750
751	/* using TT? */
752	switch (urb->dev->speed) {
753	case USB_SPEED_LOW:
754		info1 |= (1 << 12);	/* EPS "low" */
755		/* FALL THROUGH */
756
757	case USB_SPEED_FULL:
758		/* EPS 0 means "full" */
759		if (type != PIPE_INTERRUPT)
760			info1 |= (EHCI_TUNE_RL_TT << 28);
761		if (type == PIPE_CONTROL) {
762			info1 |= (1 << 27);	/* for TT */
763			info1 |= 1 << 14;	/* toggle from qtd */
764		}
765		info1 |= maxp << 16;
766
767		info2 |= (EHCI_TUNE_MULT_TT << 30);
768
769		/* Some Freescale processors have an erratum in which the
770		 * port number in the queue head was 0..N-1 instead of 1..N.
771		 */
772		if (ehci_has_fsl_portno_bug(ehci))
773			info2 |= (urb->dev->ttport-1) << 23;
774		else
775			info2 |= urb->dev->ttport << 23;
776
777		/* set the address of the TT; for TDI's integrated
778		 * root hub tt, leave it zeroed.
779		 */
780		if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
781			info2 |= tt->hub->devnum << 16;
782
783		/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
784
785		break;
786
787	case USB_SPEED_HIGH:		/* no TT involved */
788		info1 |= (2 << 12);	/* EPS "high" */
789		if (type == PIPE_CONTROL) {
790			info1 |= (EHCI_TUNE_RL_HS << 28);
791			info1 |= 64 << 16;	/* usb2 fixed maxpacket */
792			info1 |= 1 << 14;	/* toggle from qtd */
793			info2 |= (EHCI_TUNE_MULT_HS << 30);
794		} else if (type == PIPE_BULK) {
795			info1 |= (EHCI_TUNE_RL_HS << 28);
796			/* The USB spec says that high speed bulk endpoints
797			 * always use 512 byte maxpacket.  But some device
798			 * vendors decided to ignore that, and MSFT is happy
799			 * to help them do so.  So now people expect to use
800			 * such nonconformant devices with Linux too; sigh.
801			 */
802			info1 |= max_packet(maxp) << 16;
803			info2 |= (EHCI_TUNE_MULT_HS << 30);
804		} else {		/* PIPE_INTERRUPT */
805			info1 |= max_packet (maxp) << 16;
806			info2 |= hb_mult (maxp) << 30;
807		}
808		break;
809	default:
810		dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
811done:
812		qh_put (qh);
813		return NULL;
814	}
815
816	/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
817
818	/* init as live, toggle clear, advance to dummy */
819	qh->qh_state = QH_STATE_IDLE;
820	qh->hw_info1 = cpu_to_hc32(ehci, info1);
821	qh->hw_info2 = cpu_to_hc32(ehci, info2);
822	usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
823	qh_refresh (ehci, qh);
824	return qh;
825}
826
827/*-------------------------------------------------------------------------*/
828
829/* move qh (and its qtds) onto async queue; maybe enable queue.  */
830
831static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
832{
833	__hc32		dma = QH_NEXT(ehci, qh->qh_dma);
834	struct ehci_qh	*head;
835
836	/* (re)start the async schedule? */
837	head = ehci->async;
838	timer_action_done (ehci, TIMER_ASYNC_OFF);
839	if (!head->qh_next.qh) {
840		u32	cmd = ehci_readl(ehci, &ehci->regs->command);
841
842		if (!(cmd & CMD_ASE)) {
843			/* in case a clear of CMD_ASE didn't take yet */
844			(void)handshake(ehci, &ehci->regs->status,
845					STS_ASS, 0, 150);
846			cmd |= CMD_ASE | CMD_RUN;
847			ehci_writel(ehci, cmd, &ehci->regs->command);
848			ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
849			/* posted write need not be known to HC yet ... */
850		}
851	}
852
853	/* clear halt and/or toggle; and maybe recover from silicon quirk */
854	if (qh->qh_state == QH_STATE_IDLE)
855		qh_refresh (ehci, qh);
856
857	/* splice right after start */
858	qh->qh_next = head->qh_next;
859	qh->hw_next = head->hw_next;
860	wmb ();
861
862	head->qh_next.qh = qh;
863	head->hw_next = dma;
864
865	qh->qh_state = QH_STATE_LINKED;
866	/* qtd completions reported later by interrupt */
867}
868
869/*-------------------------------------------------------------------------*/
870
871/*
872 * For control/bulk/interrupt, return QH with these TDs appended.
873 * Allocates and initializes the QH if necessary.
874 * Returns null if it can't allocate a QH it needs to.
875 * If the QH has TDs (urbs) already, that's great.
876 */
877static struct ehci_qh *qh_append_tds (
878	struct ehci_hcd		*ehci,
879	struct urb		*urb,
880	struct list_head	*qtd_list,
881	int			epnum,
882	void			**ptr
883)
884{
885	struct ehci_qh		*qh = NULL;
886	__hc32			qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
887
888	qh = (struct ehci_qh *) *ptr;
889	if (unlikely (qh == NULL)) {
890		/* can't sleep here, we have ehci->lock... */
891		qh = qh_make (ehci, urb, GFP_ATOMIC);
892		*ptr = qh;
893	}
894	if (likely (qh != NULL)) {
895		struct ehci_qtd	*qtd;
896
897		if (unlikely (list_empty (qtd_list)))
898			qtd = NULL;
899		else
900			qtd = list_entry (qtd_list->next, struct ehci_qtd,
901					qtd_list);
902
903		/* control qh may need patching ... */
904		if (unlikely (epnum == 0)) {
905
906                        /* usb_reset_device() briefly reverts to address 0 */
907                        if (usb_pipedevice (urb->pipe) == 0)
908                                qh->hw_info1 &= ~qh_addr_mask;
909		}
910
911		/* just one way to queue requests: swap with the dummy qtd.
912		 * only hc or qh_refresh() ever modify the overlay.
913		 */
914		if (likely (qtd != NULL)) {
915			struct ehci_qtd		*dummy;
916			dma_addr_t		dma;
917			__hc32			token;
918
919			/* to avoid racing the HC, use the dummy td instead of
920			 * the first td of our list (becomes new dummy).  both
921			 * tds stay deactivated until we're done, when the
922			 * HC is allowed to fetch the old dummy (4.10.2).
923			 */
924			token = qtd->hw_token;
925			qtd->hw_token = HALT_BIT(ehci);
926			wmb ();
927			dummy = qh->dummy;
928
929			dma = dummy->qtd_dma;
930			*dummy = *qtd;
931			dummy->qtd_dma = dma;
932
933			list_del (&qtd->qtd_list);
934			list_add (&dummy->qtd_list, qtd_list);
935			__list_splice (qtd_list, qh->qtd_list.prev);
936
937			ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
938			qh->dummy = qtd;
939
940			/* hc must see the new dummy at list end */
941			dma = qtd->qtd_dma;
942			qtd = list_entry (qh->qtd_list.prev,
943					struct ehci_qtd, qtd_list);
944			qtd->hw_next = QTD_NEXT(ehci, dma);
945
946			/* let the hc process these next qtds */
947			wmb ();
948			dummy->hw_token = token;
949
950			urb->hcpriv = qh_get (qh);
951		}
952	}
953	return qh;
954}
955
956/*-------------------------------------------------------------------------*/
957
958static int
959submit_async (
960	struct ehci_hcd		*ehci,
961	struct urb		*urb,
962	struct list_head	*qtd_list,
963	gfp_t			mem_flags
964) {
965	struct ehci_qtd		*qtd;
966	int			epnum;
967	unsigned long		flags;
968	struct ehci_qh		*qh = NULL;
969	int			rc;
970
971	qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
972	epnum = urb->ep->desc.bEndpointAddress;
973
974#ifdef EHCI_URB_TRACE
975	ehci_dbg (ehci,
976		"%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
977		__func__, urb->dev->devpath, urb,
978		epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
979		urb->transfer_buffer_length,
980		qtd, urb->ep->hcpriv);
981#endif
982
983	spin_lock_irqsave (&ehci->lock, flags);
984	if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
985			       &ehci_to_hcd(ehci)->flags))) {
986		rc = -ESHUTDOWN;
987		goto done;
988	}
989	rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
990	if (unlikely(rc))
991		goto done;
992
993	qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
994	if (unlikely(qh == NULL)) {
995		usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
996		rc = -ENOMEM;
997		goto done;
998	}
999
1000	/* Control/bulk operations through TTs don't need scheduling,
1001	 * the HC and TT handle it when the TT has a buffer ready.
1002	 */
1003	if (likely (qh->qh_state == QH_STATE_IDLE))
1004		qh_link_async (ehci, qh_get (qh));
1005 done:
1006	spin_unlock_irqrestore (&ehci->lock, flags);
1007	if (unlikely (qh == NULL))
1008		qtd_list_free (ehci, urb, qtd_list);
1009	return rc;
1010}
1011
1012/*-------------------------------------------------------------------------*/
1013
1014/* the async qh for the qtds being reclaimed are now unlinked from the HC */
1015
1016static void end_unlink_async (struct ehci_hcd *ehci)
1017{
1018	struct ehci_qh		*qh = ehci->reclaim;
1019	struct ehci_qh		*next;
1020
1021	iaa_watchdog_done(ehci);
1022
1023	// qh->hw_next = cpu_to_hc32(qh->qh_dma);
1024	qh->qh_state = QH_STATE_IDLE;
1025	qh->qh_next.qh = NULL;
1026	qh_put (qh);			// refcount from reclaim
1027
1028	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1029	next = qh->reclaim;
1030	ehci->reclaim = next;
1031	qh->reclaim = NULL;
1032
1033	qh_completions (ehci, qh);
1034
1035	if (!list_empty (&qh->qtd_list)
1036			&& HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1037		qh_link_async (ehci, qh);
1038	else {
1039		qh_put (qh);		// refcount from async list
1040
1041		/* it's not free to turn the async schedule on/off; leave it
1042		 * active but idle for a while once it empties.
1043		 */
1044		if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1045				&& ehci->async->qh_next.qh == NULL)
1046			timer_action (ehci, TIMER_ASYNC_OFF);
1047	}
1048
1049	if (next) {
1050		ehci->reclaim = NULL;
1051		start_unlink_async (ehci, next);
1052	}
1053}
1054
1055/* makes sure the async qh will become idle */
1056/* caller must own ehci->lock */
1057
1058static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1059{
1060	int		cmd = ehci_readl(ehci, &ehci->regs->command);
1061	struct ehci_qh	*prev;
1062
1063#ifdef DEBUG
1064	assert_spin_locked(&ehci->lock);
1065	if (ehci->reclaim
1066			|| (qh->qh_state != QH_STATE_LINKED
1067				&& qh->qh_state != QH_STATE_UNLINK_WAIT)
1068			)
1069		BUG ();
1070#endif
1071
1072	/* stop async schedule right now? */
1073	if (unlikely (qh == ehci->async)) {
1074		/* can't get here without STS_ASS set */
1075		if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1076				&& !ehci->reclaim) {
1077			/* ... and CMD_IAAD clear */
1078			ehci_writel(ehci, cmd & ~CMD_ASE,
1079				    &ehci->regs->command);
1080			wmb ();
1081			// handshake later, if we need to
1082			timer_action_done (ehci, TIMER_ASYNC_OFF);
1083		}
1084		return;
1085	}
1086
1087	qh->qh_state = QH_STATE_UNLINK;
1088	ehci->reclaim = qh = qh_get (qh);
1089
1090	prev = ehci->async;
1091	while (prev->qh_next.qh != qh)
1092		prev = prev->qh_next.qh;
1093
1094	prev->hw_next = qh->hw_next;
1095	prev->qh_next = qh->qh_next;
1096	wmb ();
1097
1098	if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
1099		/* if (unlikely (qh->reclaim != 0))
1100		 *	this will recurse, probably not much
1101		 */
1102		end_unlink_async (ehci);
1103		return;
1104	}
1105
1106	cmd |= CMD_IAAD;
1107	ehci_writel(ehci, cmd, &ehci->regs->command);
1108	(void)ehci_readl(ehci, &ehci->regs->command);
1109	iaa_watchdog_start(ehci);
1110}
1111
1112/*-------------------------------------------------------------------------*/
1113
1114static void scan_async (struct ehci_hcd *ehci)
1115{
1116	struct ehci_qh		*qh;
1117	enum ehci_timer_action	action = TIMER_IO_WATCHDOG;
1118
1119	ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
1120	timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1121rescan:
1122	qh = ehci->async->qh_next.qh;
1123	if (likely (qh != NULL)) {
1124		do {
1125			/* clean any finished work for this qh */
1126			if (!list_empty (&qh->qtd_list)
1127					&& qh->stamp != ehci->stamp) {
1128				int temp;
1129
1130				/* unlinks could happen here; completion
1131				 * reporting drops the lock.  rescan using
1132				 * the latest schedule, but don't rescan
1133				 * qhs we already finished (no looping).
1134				 */
1135				qh = qh_get (qh);
1136				qh->stamp = ehci->stamp;
1137				temp = qh_completions (ehci, qh);
1138				qh_put (qh);
1139				if (temp != 0) {
1140					goto rescan;
1141				}
1142			}
1143
1144			/* unlink idle entries, reducing HC PCI usage as well
1145			 * as HCD schedule-scanning costs.  delay for any qh
1146			 * we just scanned, there's a not-unusual case that it
1147			 * doesn't stay idle for long.
1148			 * (plus, avoids some kind of re-activation race.)
1149			 */
1150			if (list_empty(&qh->qtd_list) &&
1151					qh->qh_state == QH_STATE_LINKED) {
1152				if (!ehci->reclaim &&
1153				    ((ehci->stamp - qh->stamp) & 8191) >=
1154						EHCI_SHRINK_UFRAMES)
1155					start_unlink_async(ehci, qh);
1156				else
1157					action = TIMER_ASYNC_SHRINK;
1158			}
1159
1160			qh = qh->qh_next.qh;
1161		} while (qh);
1162	}
1163	if (action == TIMER_ASYNC_SHRINK)
1164		timer_action (ehci, TIMER_ASYNC_SHRINK);
1165}
1166