nv_i2c.c revision 3269711b76ba27b78862c48398b0d313ccaa99c2
1/* 2 * linux/drivers/video/nvidia/nvidia-i2c.c - nVidia i2c 3 * 4 * Copyright 2004 Antonino A. Daplas <adaplas @pol.net> 5 * 6 * Based on rivafb-i2c.c 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file COPYING in the main directory of this archive 10 * for more details. 11 */ 12 13#include <linux/module.h> 14#include <linux/kernel.h> 15#include <linux/sched.h> 16#include <linux/delay.h> 17#include <linux/pci.h> 18#include <linux/fb.h> 19 20#include <asm/io.h> 21 22#include "nv_type.h" 23#include "nv_local.h" 24#include "nv_proto.h" 25 26#include "../edid.h" 27 28static void nvidia_gpio_setscl(void *data, int state) 29{ 30 struct nvidia_i2c_chan *chan = data; 31 struct nvidia_par *par = chan->par; 32 u32 val; 33 34 VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1); 35 val = VGA_RD08(par->PCIO, 0x3d5) & 0xf0; 36 37 if (state) 38 val |= 0x20; 39 else 40 val &= ~0x20; 41 42 VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1); 43 VGA_WR08(par->PCIO, 0x3d5, val | 0x1); 44} 45 46static void nvidia_gpio_setsda(void *data, int state) 47{ 48 struct nvidia_i2c_chan *chan = data; 49 struct nvidia_par *par = chan->par; 50 u32 val; 51 52 VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1); 53 val = VGA_RD08(par->PCIO, 0x3d5) & 0xf0; 54 55 if (state) 56 val |= 0x10; 57 else 58 val &= ~0x10; 59 60 VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1); 61 VGA_WR08(par->PCIO, 0x3d5, val | 0x1); 62} 63 64static int nvidia_gpio_getscl(void *data) 65{ 66 struct nvidia_i2c_chan *chan = data; 67 struct nvidia_par *par = chan->par; 68 u32 val = 0; 69 70 VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base); 71 if (VGA_RD08(par->PCIO, 0x3d5) & 0x04) 72 val = 1; 73 74 val = VGA_RD08(par->PCIO, 0x3d5); 75 76 return val; 77} 78 79static int nvidia_gpio_getsda(void *data) 80{ 81 struct nvidia_i2c_chan *chan = data; 82 struct nvidia_par *par = chan->par; 83 u32 val = 0; 84 85 VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base); 86 if (VGA_RD08(par->PCIO, 0x3d5) & 0x08) 87 val = 1; 88 89 return val; 90} 91 92static int nvidia_setup_i2c_bus(struct nvidia_i2c_chan *chan, const char *name) 93{ 94 int rc; 95 96 strcpy(chan->adapter.name, name); 97 chan->adapter.owner = THIS_MODULE; 98 chan->adapter.id = I2C_HW_B_NVIDIA; 99 chan->adapter.algo_data = &chan->algo; 100 chan->adapter.dev.parent = &chan->par->pci_dev->dev; 101 chan->algo.setsda = nvidia_gpio_setsda; 102 chan->algo.setscl = nvidia_gpio_setscl; 103 chan->algo.getsda = nvidia_gpio_getsda; 104 chan->algo.getscl = nvidia_gpio_getscl; 105 chan->algo.udelay = 40; 106 chan->algo.timeout = msecs_to_jiffies(2); 107 chan->algo.data = chan; 108 109 i2c_set_adapdata(&chan->adapter, chan); 110 111 /* Raise SCL and SDA */ 112 nvidia_gpio_setsda(chan, 1); 113 nvidia_gpio_setscl(chan, 1); 114 udelay(20); 115 116 rc = i2c_bit_add_bus(&chan->adapter); 117 if (rc == 0) 118 dev_dbg(&chan->par->pci_dev->dev, 119 "I2C bus %s registered.\n", name); 120 else { 121 dev_warn(&chan->par->pci_dev->dev, 122 "Failed to register I2C bus %s.\n", name); 123 chan->par = NULL; 124 } 125 126 return rc; 127} 128 129void nvidia_create_i2c_busses(struct nvidia_par *par) 130{ 131 par->bus = 3; 132 133 par->chan[0].par = par; 134 par->chan[1].par = par; 135 par->chan[2].par = par; 136 137 par->chan[0].ddc_base = 0x3e; 138 nvidia_setup_i2c_bus(&par->chan[0], "nvidia #0"); 139 140 par->chan[1].ddc_base = 0x36; 141 nvidia_setup_i2c_bus(&par->chan[1], "nvidia #1"); 142 143 par->chan[2].ddc_base = 0x50; 144 nvidia_setup_i2c_bus(&par->chan[2], "nvidia #2"); 145} 146 147void nvidia_delete_i2c_busses(struct nvidia_par *par) 148{ 149 if (par->chan[0].par) 150 i2c_del_adapter(&par->chan[0].adapter); 151 par->chan[0].par = NULL; 152 153 if (par->chan[1].par) 154 i2c_del_adapter(&par->chan[1].adapter); 155 par->chan[1].par = NULL; 156 157 if (par->chan[2].par) 158 i2c_del_adapter(&par->chan[2].adapter); 159 par->chan[2].par = NULL; 160 161} 162 163static u8 *nvidia_do_probe_i2c_edid(struct nvidia_i2c_chan *chan) 164{ 165 u8 start = 0x0; 166 struct i2c_msg msgs[] = { 167 { 168 .addr = 0x50, 169 .len = 1, 170 .buf = &start, 171 }, { 172 .addr = 0x50, 173 .flags = I2C_M_RD, 174 .len = EDID_LENGTH, 175 }, 176 }; 177 u8 *buf; 178 179 if (!chan->par) 180 return NULL; 181 182 buf = kmalloc(EDID_LENGTH, GFP_KERNEL); 183 if (!buf) { 184 dev_warn(&chan->par->pci_dev->dev, "Out of memory!\n"); 185 return NULL; 186 } 187 msgs[1].buf = buf; 188 189 if (i2c_transfer(&chan->adapter, msgs, 2) == 2) 190 return buf; 191 dev_dbg(&chan->par->pci_dev->dev, "Unable to read EDID block.\n"); 192 kfree(buf); 193 return NULL; 194} 195 196int nvidia_probe_i2c_connector(struct fb_info *info, int conn, u8 **out_edid) 197{ 198 struct nvidia_par *par = info->par; 199 u8 *edid = NULL; 200 int i; 201 202 for (i = 0; i < 3; i++) { 203 /* Do the real work */ 204 edid = nvidia_do_probe_i2c_edid(&par->chan[conn - 1]); 205 if (edid) 206 break; 207 } 208 209 if (!edid && conn == 1) { 210 /* try to get from firmware */ 211 const u8 *e = fb_firmware_edid(info->device); 212 213 if (e != NULL) 214 edid = kmemdup(e, EDID_LENGTH, GFP_KERNEL); 215 } 216 217 *out_edid = edid; 218 219 return (edid) ? 0 : 1; 220} 221