sh_intc.h revision 45b9deaf14e74543371aa8faea69c14e27b038c6 
1#ifndef __SH_INTC_H
2#define __SH_INTC_H
3
4typedef unsigned char intc_enum;
5
6struct intc_vect {
7	intc_enum enum_id;
8	unsigned short vect;
9};
10
11#define INTC_VECT(enum_id, vect) { enum_id, vect }
12#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
13
14struct intc_group {
15	intc_enum enum_id;
16	intc_enum enum_ids[32];
17};
18
19#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
20
21struct intc_mask_reg {
22	unsigned long set_reg, clr_reg, reg_width;
23	intc_enum enum_ids[32];
24#ifdef CONFIG_SMP
25	unsigned long smp;
26#endif
27};
28
29struct intc_prio_reg {
30	unsigned long set_reg, clr_reg, reg_width, field_width;
31	intc_enum enum_ids[16];
32#ifdef CONFIG_SMP
33	unsigned long smp;
34#endif
35};
36
37struct intc_sense_reg {
38	unsigned long reg, reg_width, field_width;
39	intc_enum enum_ids[16];
40};
41
42#ifdef CONFIG_SMP
43#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
44#else
45#define INTC_SMP(stride, nr)
46#endif
47
48struct intc_desc {
49	struct intc_vect *vectors;
50	unsigned int nr_vectors;
51	struct intc_group *groups;
52	unsigned int nr_groups;
53	struct intc_mask_reg *mask_regs;
54	unsigned int nr_mask_regs;
55	struct intc_prio_reg *prio_regs;
56	unsigned int nr_prio_regs;
57	struct intc_sense_reg *sense_regs;
58	unsigned int nr_sense_regs;
59	char *name;
60	struct intc_mask_reg *ack_regs;
61	unsigned int nr_ack_regs;
62};
63
64#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
65#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups,		\
66	mask_regs, prio_regs, sense_regs)				\
67struct intc_desc symbol __initdata = {					\
68	_INTC_ARRAY(vectors), _INTC_ARRAY(groups),			\
69	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),			\
70	_INTC_ARRAY(sense_regs),					\
71	chipname,							\
72}
73
74#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups,	\
75	mask_regs, prio_regs, sense_regs, ack_regs)			\
76struct intc_desc symbol __initdata = {					\
77	_INTC_ARRAY(vectors), _INTC_ARRAY(groups),			\
78	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),			\
79	_INTC_ARRAY(sense_regs),					\
80	chipname,							\
81	_INTC_ARRAY(ack_regs),						\
82}
83
84void __init register_intc_controller(struct intc_desc *desc);
85int intc_set_priority(unsigned int irq, unsigned int prio);
86
87int reserve_irq_vector(unsigned int irq);
88void reserve_irq_legacy(void);
89
90#endif /* __SH_INTC_H */
91