| /external/llvm/lib/Transforms/Utils/ |
| H A D | BypassSlowDivision.cpp | 84 Instruction *Instr = J; local
85 Value *Dividend = Instr->getOperand(0);
86 Value *Divisor = Instr->getOperand(1);
141 PHINode *QuoPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2);
144 PHINode *RemPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2);
148 // Replace Instr with appropriate phi node
150 Instr->replaceAllUsesWith(QuoPhi);
152 Instr->replaceAllUsesWith(RemPhi);
153 Instr->eraseFromParent();
192 Instruction *Instr local
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| /external/llvm/utils/TableGen/ |
| H A D | InstrInfoEmitter.cpp | 236 const CodeGenInstruction *Instr = NumberedInstructions[i]; local
237 InstrNames.add(Instr->TheDef->getName());
249 const CodeGenInstruction *Instr = NumberedInstructions[i]; local
250 OS << InstrNames.get(Instr->TheDef->getName()) << "U, ";
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| H A D | CodeGenTarget.cpp | 309 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); local
310 assert(Instr && "Missing target independent instruction");
311 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
312 InstrsByEnum.push_back(Instr);
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| H A D | CodeGenDAGPatterns.cpp | 2769 Record *Instr = II->first; local
2771 PatternToMatch(Instr,
2772 Instr->getValueAsListInit("Predicates"),
2776 Instr->getValueAsInt("AddedComplexity"),
2777 Instr->getID()));
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| /external/v8/src/mips/ |
| H A D | constants-mips.h | 172 typedef int32_t Instr; typedef in namespace:v8::internal
570 extern const Instr kPopInstruction;
572 extern const Instr kPushInstruction;
574 extern const Instr kPushRegPattern;
576 extern const Instr kPopRegPattern;
577 extern const Instr kLwRegFpOffsetPattern;
578 extern const Instr kSwRegFpOffsetPattern;
579 extern const Instr kLwRegFpNegOffsetPattern;
580 extern const Instr kSwRegFpNegOffsetPattern;
582 extern const Instr kRtMas
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| /external/llvm/lib/Target/NVPTX/ |
| H A D | VectorElementize.cpp | 102 void createVecShuffle(MachineFunction& F, MachineInstr *Instr,
105 void createVecExtract(MachineFunction& F, MachineInstr *Instr,
108 void createVecInsert(MachineFunction& F, MachineInstr *Instr,
111 void createVecBuild(MachineFunction& F, MachineInstr *Instr,
166 ///Instr is assumed to be a vector instruction. For most vector instructions,
172 unsigned VectorElementize::numCopiesNeeded(MachineInstr *Instr) { argument
175 for (unsigned i=0, e=Instr->getNumOperands(); i!=e; ++i) {
176 MachineOperand oper = Instr->getOperand(i);
186 unsigned regnum = Instr->getOperand(def).getReg();
187 if (ISVECEXTRACT(Instr))
242 createLoadCopy(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
279 createStoreCopy(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
315 createVecShuffle(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
351 createVecExtract(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
375 createVecInsert(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
411 createVecBuild(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
438 createVecDest(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
470 createCopies(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
559 MachineInstr *Instr = &*II; local
599 MachineInstr *Instr = &*II; local
681 MachineInstr *Instr = &*II; local
[all...] |
| /external/llvm/tools/llvm-stress/ |
| H A D | llvm-stress.cpp | 667 Instruction *Instr = *it; local
668 BasicBlock *Curr = Instr->getParent();
669 BasicBlock::iterator Loc= Instr;
671 Instr->moveBefore(Curr->getTerminator());
673 BranchInst::Create(Curr, Next, Instr, Curr->getTerminator());
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAG.h | 251 MachineInstr *Instr; // Alternatively, a MachineInstr. member in class:llvm::SUnit
304 : Node(node), Instr(0), OrigNode(0), NodeNum(nodenum),
318 : Node(0), Instr(instr), OrigNode(0), NodeNum(nodenum),
331 : Node(0), Instr(0), OrigNode(0), NodeNum(~0u),
345 assert(!Instr && "Setting SDNode of SUnit with MachineInstr!");
352 assert(!Instr && "Reading SDNode of SUnit with MachineInstr!");
358 bool isInstr() const { return Instr; }
364 Instr = MI;
371 return Instr;
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| /external/llvm/lib/MC/ |
| H A D | MCDwarf.cpp | 875 const MCCFIInstruction &Instr);
926 const MCCFIInstruction &Instr) {
930 switch (Instr.getOperation()) {
933 const MachineLocation &Dst = Instr.getDestination();
934 const MachineLocation &Src = Instr.getSource();
935 const bool IsRelative = Instr.getOperation() == MCCFIInstruction::RelMove;
1007 unsigned Reg = Instr.getDestination().getReg();
1015 unsigned Reg = Instr.getDestination().getReg();
1025 Streamer.EmitBytes(Instr.getValues(), 0);
1037 const MCCFIInstruction &Instr local
925 EmitCFIInstruction(MCStreamer &Streamer, const MCCFIInstruction &Instr) argument
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2078 const MachineInstr &Instr = *I; local
2080 if (Instr.modifiesRegister(ARM::CPSR, TRI) ||
2081 Instr.readsRegister(ARM::CPSR, TRI))
2155 const MachineInstr &Instr = *I; local
2156 for (unsigned IO = 0, EO = Instr.getNumOperands();
2158 const MachineOperand &MO = Instr.getOperand(IO);
2170 ARMCC::CondCodes CC = (ARMCC::CondCodes)Instr.getOperand(IO-1).getImm();
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| /external/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 3241 MachineInstr *Instr = &*RI; local
3244 isRedundantFlagInstr(CmpInstr, SrcReg, SrcReg2, CmpValue, Instr)) {
3245 Sub = Instr;
3249 if (Instr->modifiesRegister(X86::EFLAGS, TRI) ||
3250 Instr->readsRegister(X86::EFLAGS, TRI)) {
3256 if (!Movr0Inst && (Instr->getOpcode() == X86::MOV8r0 ||
3257 Instr->getOpcode() == X86::MOV16r0 ||
3258 Instr->getOpcode() == X86::MOV32r0 ||
3259 Instr->getOpcode() == X86::MOV64r0) &&
3260 Instr
3285 const MachineInstr &Instr = *I; local
[all...] |
| /external/v8/src/arm/ |
| H A D | constants-arm.h | 116 // General constants are in an anonymous enum in class Instr.
181 // Instr is merely used by the Assembler to distinguish 32bit integers
185 typedef int32_t Instr; typedef in namespace:v8::internal
446 extern const Instr kPopInstruction;
450 extern const Instr kPushRegPattern;
454 extern const Instr kPopRegPattern;
457 extern const Instr kMovLrPc;
459 extern const Instr kLdrPCMask;
460 extern const Instr kLdrPCPattern;
462 extern const Instr kBlxRegMas
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| /external/llvm/bindings/ocaml/llvm/ |
| H A D | llvm_ocaml.c | 1197 CAMLprim value llvm_add_instruction_param_attr(LLVMValueRef Instr, argument
1200 LLVMAddInstrAttribute(Instr, Int_val(index), Int32_val(PA));
1205 CAMLprim value llvm_remove_instruction_param_attr(LLVMValueRef Instr, argument
1208 LLVMRemoveInstrAttribute(Instr, Int_val(index), Int32_val(PA));
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| /external/llvm/lib/VMCore/ |
| H A D | Core.cpp | 1597 Instruction *Instr = unwrap<Instruction>(Inst); local
1598 BasicBlock::iterator I = Instr;
1599 if (++I == Instr->getParent()->end())
1605 Instruction *Instr = unwrap<Instruction>(Inst); local
1606 BasicBlock::iterator I = Instr;
1607 if (I == Instr->getParent()->begin())
1633 unsigned LLVMGetInstructionCallConv(LLVMValueRef Instr) { argument
1634 Value *V = unwrap(Instr);
1642 void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC) { argument
1643 Value *V = unwrap(Instr);
1651 LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribute PA) argument
1658 LLVMRemoveInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribute PA) argument
1665 LLVMSetInstrParamAlignment(LLVMValueRef Instr, unsigned index, unsigned align) argument
1721 LLVMPositionBuilder(LLVMBuilderRef Builder, LLVMBasicBlockRef Block, LLVMValueRef Instr) argument
1728 LLVMPositionBuilderBefore(LLVMBuilderRef Builder, LLVMValueRef Instr) argument
1746 LLVMInsertIntoBuilder(LLVMBuilderRef Builder, LLVMValueRef Instr) argument
1750 LLVMInsertIntoBuilderWithName(LLVMBuilderRef Builder, LLVMValueRef Instr, const char *Name) argument
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