| /external/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterInfo.cpp | 21 ARMRegisterInfo::ARMRegisterInfo(const ARMBaseInstrInfo &tii, argument
23 : ARMBaseRegisterInfo(tii, sti) {
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| H A D | ARMHazardRecognizer.h | 40 const ARMBaseInstrInfo &tii,
44 ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), TII(tii),
39 ARMHazardRecognizer(const InstrItineraryData *ItinData, const ARMBaseInstrInfo &tii, const ARMBaseRegisterInfo &tri, const ARMSubtarget &sti, const ScheduleDAG *DAG) argument
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| H A D | Thumb2RegisterInfo.cpp | 27 Thumb2RegisterInfo::Thumb2RegisterInfo(const ARMBaseInstrInfo &tii, argument
29 : ARMBaseRegisterInfo(tii, sti) {
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| H A D | Thumb1RegisterInfo.cpp | 43 Thumb1RegisterInfo::Thumb1RegisterInfo(const ARMBaseInstrInfo &tii, argument
45 : ARMBaseRegisterInfo(tii, sti) {
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| H A D | ARMBaseRegisterInfo.cpp | 56 ARMBaseRegisterInfo::ARMBaseRegisterInfo(const ARMBaseInstrInfo &tii, argument
58 : ARMGenRegisterInfo(ARM::LR), TII(tii), STI(sti),
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| /external/llvm/lib/Target/MBlaze/ |
| H A D | MBlazeRegisterInfo.cpp | 45 MBlazeRegisterInfo(const MBlazeSubtarget &ST, const TargetInstrInfo &tii) argument
46 : MBlazeGenRegisterInfo(MBlaze::R15), Subtarget(ST), TII(tii) {}
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCHazardRecognizers.cpp | 74 PPCHazardRecognizer970::PPCHazardRecognizer970(const TargetInstrInfo &tii) argument
75 : TII(tii) {
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| H A D | PPCRegisterInfo.cpp | 70 const TargetInstrInfo &tii)
74 Subtarget(ST), TII(tii) {
69 PPCRegisterInfo(const PPCSubtarget &ST, const TargetInstrInfo &tii) argument
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| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.cpp | 32 const TargetInstrInfo &tii)
33 : SparcGenRegisterInfo(SP::I7), Subtarget(st), TII(tii) {
31 SparcRegisterInfo(SparcSubtarget &st, const TargetInstrInfo &tii) argument
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| /external/llvm/lib/CodeGen/ |
| H A D | Spiller.cpp | 58 const TargetInstrInfo *tii; member in class:__anon8734::SpillerBase
68 tii = mf.getTarget().getInstrInfo();
136 tii->loadRegFromStackSlot(*mi->getParent(), miItr, newLI->reg, ss, trc,
149 tii->storeRegToStackSlot(*mi->getParent(), llvm::next(miItr),newLI->reg,
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| H A D | RegAllocPBQP.cpp | 132 const TargetInstrInfo *tii; member in class:__anon8708::RegAllocPBQP
546 tii = tm->getInstrInfo();
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| H A D | BranchFolding.cpp | 176 const TargetInstrInfo *tii,
179 if (!tii) return false;
183 TII = tii;
175 OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, MachineModuleInfo *mmi) argument
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| /external/llvm/lib/Target/CellSPU/ |
| H A D | SPURegisterInfo.cpp | 188 const TargetInstrInfo &tii) :
189 SPUGenRegisterInfo(SPU::R0), Subtarget(subtarget), TII(tii)
187 SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii) argument
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| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430RegisterInfo.cpp | 36 const TargetInstrInfo &tii)
37 : MSP430GenRegisterInfo(MSP430::PCW), TM(tm), TII(tii) {
35 MSP430RegisterInfo(MSP430TargetMachine &tm, const TargetInstrInfo &tii) argument
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| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXRegisterInfo.cpp | 251 NVPTXRegisterInfo::NVPTXRegisterInfo(const TargetInstrInfo &tii, argument
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 41 const HexagonInstrInfo &tii)
44 TII(tii) {
40 HexagonRegisterInfo(HexagonSubtarget &st, const HexagonInstrInfo &tii) argument
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreRegisterInfo.cpp | 40 XCoreRegisterInfo::XCoreRegisterInfo(const TargetInstrInfo &tii) argument
41 : XCoreGenRegisterInfo(XCore::LR), TII(tii) {
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| /external/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 58 const TargetInstrInfo &tii)
63 TM(tm), TII(tii) {
57 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii) argument
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGRRList.cpp | 1620 const TargetInstrInfo *tii,
1625 MF(mf), TII(tii), TRI(tri), TLI(tli), scheduleDAG(NULL) {
1740 const TargetInstrInfo *tii,
1744 tii, tri, tli),
1737 RegReductionPriorityQueue(MachineFunction &mf, bool tracksrp, bool srcorder, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, const TargetLowering *tli) argument
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