Searched refs:EBP (Results 1 - 20 of 20) sorted by relevance

/external/llvm/include/llvm/Support/
H A DSolaris.h31 #undef EBP macro
/external/kernel-headers/original/asm-x86/
H A Dptrace-abi.h11 #define EBP 5 macro
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.h46 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 enumerator in enum:llvm::N86::__anon9011
H A DX86MCTargetDesc.cpp222 case X86::RBP: case X86::EBP: case X86::BP: case X86::BPL: case X86::CH:
223 return N86::EBP;
240 return N86::EBP;
H A DX86MCCodeEmitter.cpp357 // If the base is not EBP/ESP and there is no displacement, use simple
359 // encoding for [EBP] with no displacement means [disp32] so we handle it
361 if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) {
398 BaseRegNo != N86::EBP) {
404 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
/external/qemu/target-i386/
H A Dexec.h42 #define EBP (env->regs[R_EBP]) macro
303 EBP = env->regs[R_EBP];
331 env->regs[R_EBP] = EBP;
H A Dop_helper.c386 stl_kernel(env->tr.base + (0x28 + 5 * 4), EBP);
400 stw_kernel(env->tr.base + (0x12 + 5 * 2), EBP);
452 EBP = new_regs[5];
1430 stq_phys(sm_state + 0x7fd0, EBP);
1453 stl_phys(sm_state + 0x7fe4, EBP);
1556 EBP = ldq_phys(sm_state + 0x7fd0);
1583 EBP = ldl_phys(sm_state + 0x7fe4);
1958 ebp = EBP;
1987 ebp = EBP;
/external/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp78 FramePtr = X86::EBP;
95 case X86::EBP: case X86::RBP: return 6;
553 // FrameIndex with base register with EBP. Add an offset to the offset.
556 // Now add the frame object offset to the offset from EBP.
624 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
661 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
697 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
698 return X86::EBP;
728 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
749 case X86::BPL: case X86::BP: case X86::EBP
[all...]
H A DX86CodeEmitter.cpp522 // If the base is not EBP/ESP and there is no displacement, use simple
524 // encoding for [EBP] with no displacement means [disp32] so we handle it
526 if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) {
559 } else if (DispVal == 0 && BaseRegNo != N86::EBP) {
565 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
H A DX86FrameLowering.cpp357 // The immediate re-push of EBP is unnecessary. At the least, it's an
358 // optimization bug. EBP can be used as a scratch register in certain
402 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
470 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
571 // Encode that we are using EBP/RBP as the frame pointer.
734 // Get the offset of the stack slot for the EBP register, which is
739 // Save EBP/RBP into the appropriate stack slot.
745 // Mark the place where EBP/RBP was saved.
767 // Update EBP with the new base value.
779 // Define the current CFA to use the EBP/RB
[all...]
H A DX86ISelLowering.cpp2628 // (possible EBP)
10253 unsigned FrameReg = Subtarget->is64Bit() ? X86::RBP : X86::EBP;
10274 Subtarget->is64Bit() ? X86::RBP : X86::EBP,
16828 case X86::BP: DestReg = X86::EBP; break;
/external/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h130 ENTRY(EBP) \
148 ENTRY(EBP) \
/external/valgrind/main/VEX/auxprogs/
H A Dgenoffsets.c89 GENOFFSET(X86,x86,EBP);
/external/valgrind/main/coregrind/m_sigframe/
H A Dsigframe-x86-linux.c376 SC2(ebp,EBP);
/external/qemu-pc-bios/bochs/
H A Dbochs.h59 #undef EBP macro
/external/qemu/
H A Dcpu-exec.c33 #undef EBP macro
/external/valgrind/main/VEX/test/
H A Dtest-amd64.c1357 #define REG_EBP EBP
H A Dtest-i386.c1317 #define REG_EBP EBP
/external/strace/
H A Dprocess.c2661 { 4*EBP, "4*EBP" },
/external/valgrind/main/memcheck/
H A Dmc_machine.c684 if (o == GOF(EBP) && is124) return o;

Completed in 1213 milliseconds