Searched refs:Op1 (Results 1 - 25 of 58) sorted by relevance

123

/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp101 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
103 if (Value *V = SimplifyMulInst(Op0, Op1, TD))
109 if (match(Op1, m_AllOnes())) // X * -1 == 0 - X
112 if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) {
164 if (isa<Constant>(Op1)) {
176 if (Value *Op1v = dyn_castNegVal(Op1))
182 Value *Op1C = Op1;
188 BO = dyn_cast<BinaryOperator>(Op1);
220 return BinaryOperator::CreateAnd(Op0, Op1);
227 return BinaryOperator::CreateShl(Op1,
257 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
367 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
432 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
517 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
570 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
595 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
627 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
670 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
741 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstCombineShifts.cpp24 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
32 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
36 if (ConstantInt *CUI = dyn_cast<ConstantInt>(Op1))
44 if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
48 Op1->getName());
312 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1, argument
320 CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) {
325 GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this));
336 if (Op1
[all...]
H A DInstCombineAddSub.cpp496 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
498 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(),
507 if (Value *V = dyn_castNegVal(Op1)) {
515 return BinaryOperator::CreateXor(Op0, Op1);
519 return BinaryOperator::CreateNot(Op1);
524 if (match(Op1, m_Not(m_Value(X))))
531 if (match(Op1, m_LShr(m_Value(X), m_ConstantInt(CI))) &&
536 if (match(Op1, m_AShr(m_Value(X), m_ConstantInt(CI))) &&
543 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
549 if (match(Op1, m_Ad
654 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstCombineAndOrXor.cpp720 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
723 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder);
1019 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1021 if (Value *V = SimplifyAndInst(Op0, Op1, TD))
1033 if (ConstantInt *AndRHS = dyn_cast<ConstantInt>(Op1)) {
1140 if (Value *Op1NotVal = dyn_castNotVal(Op1))
1141 if (Op0->hasOneUse() && Op1->hasOneUse()) {
1151 match(Op1, m_Not(m_And(m_Value(C), m_Value(D)))) &&
1156 if (match(Op1, m_Or(m_Value(A), m_Value(B))) &&
1164 Value *tmpOp1 = Op1;
1448 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
1721 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2044 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2257 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
[all...]
H A DInstCombineCompares.cpp1811 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1816 if (getComplexity(Op0) < getComplexity(Op1)) {
1818 std::swap(Op0, Op1);
1822 if (Value *V = SimplifyICmpInst(I.getPredicate(), Op0, Op1, TD))
1827 if (I.getPredicate() == ICmpInst::ICMP_NE && match(Op1, m_Zero()))
1834 return CmpInst::Create(Instruction::ICmp, I.getPredicate(), V, Op1);
1838 return CmpInst::Create(Instruction::ICmp, I.getPredicate(), V, Op1);
1850 Value *Xor = Builder->CreateXor(Op0, Op1, I.getName()+"tmp");
1854 return BinaryOperator::CreateXor(Op0, Op1);
1857 std::swap(Op0, Op1); // Chang
2225 Value *Op1 = 0, *Op2 = 0; local
2858 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2950 Value *Op1 = 0, *Op2 = 0; local
[all...]
H A DInstructionCombining.cpp193 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(I.getOperand(1)); local
226 if (Op1 && Op1->getOpcode() == Opcode) {
228 Value *B = Op1->getOperand(0);
229 Value *C = Op1->getOperand(1);
268 if (Op1 && Op1->getOpcode() == Opcode) {
270 Value *B = Op1->getOperand(0);
271 Value *C = Op1->getOperand(1);
289 if (Op0 && Op1
378 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); local
544 Value *Op0 = SO, *Op1 = ConstOperand; local
[all...]
/external/llvm/lib/Analysis/
H A DInstructionSimplify.cpp160 if (BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS))
161 if (Op1->getOpcode() == OpcodeToExpand) {
163 Value *A = LHS, *B = Op1->getOperand(0), *C = Op1->getOperand(1);
198 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); local
201 !Op1 || Op1->getOpcode() != OpcodeToExtract)
206 Value *C = Op1->getOperand(0), *D = Op1->getOperand(1);
269 BinaryOperator *Op1 local
592 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
653 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
757 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
882 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
891 SimplifyMulInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
954 SimplifyMulInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
962 SimplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1034 SimplifySDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1042 SimplifySDivInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1050 SimplifyUDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1058 SimplifyUDivInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1064 SimplifyFDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned) argument
1077 SimplifyFDivInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1085 SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1139 SimplifySRemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1147 SimplifySRemInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1155 SimplifyURemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1163 SimplifyURemInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1169 SimplifyFRemInst(Value *Op0, Value *Op1, const Query &, unsigned) argument
1182 SimplifyFRemInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1190 SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1234 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
1250 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1259 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1277 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1287 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1309 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1319 SimplifyAndInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1410 SimplifyAndInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1418 SimplifyOrInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1504 SimplifyOrInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1512 SimplifyXorInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1564 SimplifyXorInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
[all...]
H A DConstantFolding.cpp541 /// SymbolicallyEvaluateBinop - One of Op0/Op1 is a constant expression.
546 Constant *Op1, const TargetData *TD){
561 if (IsConstantOffsetFromGlobal(Op1, GV2, Offs2, *TD) &&
1383 if (ConstantFP *Op1 = dyn_cast<ConstantFP>(Operands[0])) {
1387 (double)Op1->getValueAPF().convertToFloat() :
1388 Op1->getValueAPF().convertToDouble();
1390 if (Op2->getType() != Op1->getType())
1421 if (ConstantInt *Op1 = dyn_cast<ConstantInt>(Operands[0])) {
1436 Res = Op1->getValue().sadd_ov(Op2->getValue(), Overflow);
1439 Res = Op1
545 SymbolicallyEvaluateBinop(unsigned Opc, Constant *Op0, Constant *Op1, const TargetData *TD) argument
[all...]
H A DValueTracking.cpp46 static void ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW, argument
60 llvm::ComputeMaskedBits(Op1, KnownZero2, KnownOne2, TD, Depth+1);
86 llvm::ComputeMaskedBits(Op1, KnownZero2, KnownOne2, TD, Depth+1);
132 static void ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW, argument
137 ComputeMaskedBits(Op1, KnownZero, KnownOne, TD, Depth+1);
146 if (Op0 == Op1) {
163 isKnownNonZero(Op1, TD, Depth));
1226 Value *Op1 = I->getOperand(1); local
1229 ConstantInt *Op1CI = dyn_cast<ConstantInt>(Op1);
1231 // Turn Op0 << Op1 int
[all...]
/external/llvm/include/llvm/Target/
H A DTargetSelectionDAGInfo.h59 SDValue Op1, SDValue Op2,
76 SDValue Op1, SDValue Op2,
92 SDValue Op1, SDValue Op2,
57 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
74 EmitTargetCodeForMemmove(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
90 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
/external/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h60 SDValue Op1, SDValue Op2,
/external/llvm/include/llvm/CodeGen/
H A DFastISel.h184 unsigned Op1, bool Op1IsKill);
214 unsigned Op1, bool Op1IsKill,
261 unsigned Op1, bool Op1IsKill);
269 unsigned Op1, bool Op1IsKill,
302 unsigned Op1, bool Op1IsKill,
311 unsigned Op1, bool Op1IsKill,
H A DSelectionDAG.h527 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, argument
532 Ops.push_back(Op1);
752 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
753 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
755 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
757 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
767 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1);
769 SDValue Op1, SDValue Op2);
771 SDValue Op1, SDValue Op2, SDValue Op3);
783 EVT VT2, SDValue Op1);
[all...]
H A DISDOpcodes.h794 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
800 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
/external/llvm/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp266 SDValue Op0, Op1; local
270 if (!SelectDFormAddr(Op.getNode(), Op, Op0, Op1)
271 && !SelectAFormAddr(Op.getNode(), Op, Op0, Op1))
272 SelectXFormAddr(Op.getNode(), Op, Op0, Op1);
275 if (!SelectDFormAddr(Op.getNode(), Op, Op0, Op1)
276 && !SelectAFormAddr(Op.getNode(), Op, Op0, Op1)) {
278 Op1 = getSmallIPtrImm(0);
285 SelectAddrIdxOnly(Op, Op, Op0, Op1);
291 OutOps.push_back(Op1);
418 const SDValue Op1 local
471 const SDValue Op1 = N.getOperand(1); local
853 SDValue Op1 = N->getOperand(1); local
[all...]
/external/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp192 SDValue Op0, Op1; local
196 if (!SelectADDRrr(Op, Op0, Op1))
197 SelectADDRri(Op, Op0, Op1);
202 OutOps.push_back(Op1);
/external/llvm/lib/Transforms/Scalar/
H A DCorrelatedValuePropagation.cpp149 Constant *Op1 = dyn_cast<Constant>(C->getOperand(1));
150 if (!Op1) return false;
156 C->getOperand(0), Op1, *PI, C->getParent());
162 C->getOperand(0), Op1, *PI, C->getParent());
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp450 SDValue Op1 = Op.getOperand(1); local
454 && Op1.getValueType() == Op2.getValueType() && "Invalid type");
472 assert(MaskTy.getSizeInBits() == Op1.getValueType().getSizeInBits()
489 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1);
496 Op1 = DAG.getNode(ISD::AND, DL, MaskTy, Op1, Mask);
498 SDValue Val = DAG.getNode(ISD::OR, DL, MaskTy, Op1, Op2);
509 SDValue Op1 = Op.getOperand(1); local
526 assert(VT.getSizeInBits() == Op1
[all...]
H A DFastISel.cpp365 unsigned Op1 = getRegForValue(I->getOperand(1)); local
366 if (Op1 == 0) return false;
370 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1,
426 unsigned Op1 = getRegForValue(I->getOperand(1)); local
427 if (Op1 == 0)
437 Op1, Op1IsKill);
1085 unsigned /*Op1*/, bool /*Op1IsKill*/) {
1115 unsigned /*Op1*/, bool /*Op1IsKill*/,
1195 unsigned Op1, bool Op1IsKill) {
1202 .addReg(Op1, Op1IsKil
1192 FastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument
1213 FastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument
1302 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1326 FastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2) argument
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp393 SDValue Op1 = N->getOperand(1); local
398 CurDAG->ComputeMaskedBits(Op1, RKZ, RKO);
405 unsigned Op1Opc = Op1.getOpcode();
415 if (Op1.getOperand(0).getOpcode() != ISD::SHL &&
416 Op1.getOperand(0).getOpcode() != ISD::SRL) {
417 std::swap(Op0, Op1);
423 if (Op1Opc == ISD::AND && Op1.getOperand(0).getOpcode() != ISD::SHL &&
424 Op1.getOperand(0).getOpcode() != ISD::SRL) {
425 std::swap(Op0, Op1);
436 isInt32Immediate(Op1
[all...]
/external/llvm/include/llvm/Analysis/
H A DInstructionSimplify.h90 Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
97 Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
104 Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
/external/llvm/lib/ExecutionEngine/Interpreter/
H A DExecution.cpp1235 GenericValue Op1 = getOperandValue(CE->getOperand(1), SF);
1239 case Instruction::Add: Dest.IntVal = Op0.IntVal + Op1.IntVal; break;
1240 case Instruction::Sub: Dest.IntVal = Op0.IntVal - Op1.IntVal; break;
1241 case Instruction::Mul: Dest.IntVal = Op0.IntVal * Op1.IntVal; break;
1242 case Instruction::FAdd: executeFAddInst(Dest, Op0, Op1, Ty); break;
1243 case Instruction::FSub: executeFSubInst(Dest, Op0, Op1, Ty); break;
1244 case Instruction::FMul: executeFMulInst(Dest, Op0, Op1, Ty); break;
1245 case Instruction::FDiv: executeFDivInst(Dest, Op0, Op1, Ty); break;
1246 case Instruction::FRem: executeFRemInst(Dest, Op0, Op1, Ty); break;
1247 case Instruction::SDiv: Dest.IntVal = Op0.IntVal.sdiv(Op1
[all...]
/external/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp1187 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); local
1189 if (isSrcOp(*Op1) && Op2->isReg()) {
1206 delete Op1;
1217 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); local
1219 if (isDstOp(*Op2) && Op1->isReg()) {
1221 unsigned reg = Op1->getReg();
1236 delete Op1;
1253 X86Operand *Op1 = static_cast<X86Operand*>(Operands[2]); local
1254 if (Op1->isImm() && isa<MCConstantExpr>(Op1
1260 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); local
1272 X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); local
[all...]
/external/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1166 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
1168 bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
1175 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS?
1183 moveToTop(Op1, I);
1184 TOS = Op1;
1206 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) &&
1213 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0);
1231 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0;
1239 if (KillsOp0 && KillsOp1 && Op0 != Op1) {
1264 unsigned Op1
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonPeephole.cpp275 MachineOperand Op1 = MI->getOperand(S1); local
278 ChangeOpInto(MI->getOperand(S2), Op1);

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