PHIElimination.cpp revision 0a3fdd6e11cd351737b4451c05ec5d794e6855cf
1//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass eliminates machine instruction PHI nodes by inserting copy 11// instructions. This destroys SSA information, but is the desired input for 12// some register allocators. 13// 14//===----------------------------------------------------------------------===// 15 16#define DEBUG_TYPE "phielim" 17#include "PHIEliminationUtils.h" 18#include "llvm/CodeGen/LiveVariables.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/CodeGen/MachineDominators.h" 21#include "llvm/CodeGen/MachineInstr.h" 22#include "llvm/CodeGen/MachineInstrBuilder.h" 23#include "llvm/CodeGen/MachineLoopInfo.h" 24#include "llvm/CodeGen/MachineRegisterInfo.h" 25#include "llvm/Target/TargetInstrInfo.h" 26#include "llvm/Function.h" 27#include "llvm/Target/TargetMachine.h" 28#include "llvm/ADT/SmallPtrSet.h" 29#include "llvm/ADT/STLExtras.h" 30#include "llvm/ADT/Statistic.h" 31#include "llvm/Support/Compiler.h" 32#include "llvm/Support/Debug.h" 33#include <algorithm> 34#include <map> 35using namespace llvm; 36 37namespace { 38 class PHIElimination : public MachineFunctionPass { 39 MachineRegisterInfo *MRI; // Machine register information 40 41 public: 42 static char ID; // Pass identification, replacement for typeid 43 PHIElimination() : MachineFunctionPass(ID) { 44 initializePHIEliminationPass(*PassRegistry::getPassRegistry()); 45 } 46 47 virtual bool runOnMachineFunction(MachineFunction &Fn); 48 virtual void getAnalysisUsage(AnalysisUsage &AU) const; 49 50 private: 51 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions 52 /// in predecessor basic blocks. 53 /// 54 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); 55 void LowerAtomicPHINode(MachineBasicBlock &MBB, 56 MachineBasicBlock::iterator AfterPHIsIt); 57 58 /// analyzePHINodes - Gather information about the PHI nodes in 59 /// here. In particular, we want to map the number of uses of a virtual 60 /// register which is used in a PHI node. We map that to the BB the 61 /// vreg is coming from. This is used later to determine when the vreg 62 /// is killed in the BB. 63 /// 64 void analyzePHINodes(const MachineFunction& Fn); 65 66 /// Split critical edges where necessary for good coalescer performance. 67 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, 68 LiveVariables &LV, MachineLoopInfo *MLI); 69 70 typedef std::pair<unsigned, unsigned> BBVRegPair; 71 typedef DenseMap<BBVRegPair, unsigned> VRegPHIUse; 72 73 VRegPHIUse VRegPHIUseCount; 74 75 // Defs of PHI sources which are implicit_def. 76 SmallPtrSet<MachineInstr*, 4> ImpDefs; 77 78 // Map reusable lowered PHI node -> incoming join register. 79 typedef DenseMap<MachineInstr*, unsigned, 80 MachineInstrExpressionTrait> LoweredPHIMap; 81 LoweredPHIMap LoweredPHIs; 82 }; 83} 84 85STATISTIC(NumAtomic, "Number of atomic phis lowered"); 86STATISTIC(NumReused, "Number of reused lowered phis"); 87 88char PHIElimination::ID = 0; 89INITIALIZE_PASS(PHIElimination, "phi-node-elimination", 90 "Eliminate PHI nodes for register allocation", false, false) 91 92char& llvm::PHIEliminationID = PHIElimination::ID; 93 94void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const { 95 AU.addPreserved<LiveVariables>(); 96 AU.addPreserved<MachineDominatorTree>(); 97 AU.addPreserved<MachineLoopInfo>(); 98 MachineFunctionPass::getAnalysisUsage(AU); 99} 100 101bool PHIElimination::runOnMachineFunction(MachineFunction &MF) { 102 MRI = &MF.getRegInfo(); 103 104 bool Changed = false; 105 106 // Split critical edges to help the coalescer 107 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>()) { 108 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); 109 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 110 Changed |= SplitPHIEdges(MF, *I, *LV, MLI); 111 } 112 113 // Populate VRegPHIUseCount 114 analyzePHINodes(MF); 115 116 // Eliminate PHI instructions by inserting copies into predecessor blocks. 117 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 118 Changed |= EliminatePHINodes(MF, *I); 119 120 // Remove dead IMPLICIT_DEF instructions. 121 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(), 122 E = ImpDefs.end(); I != E; ++I) { 123 MachineInstr *DefMI = *I; 124 unsigned DefReg = DefMI->getOperand(0).getReg(); 125 if (MRI->use_nodbg_empty(DefReg)) 126 DefMI->eraseFromParent(); 127 } 128 129 // Clean up the lowered PHI instructions. 130 for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end(); 131 I != E; ++I) 132 MF.DeleteMachineInstr(I->first); 133 134 LoweredPHIs.clear(); 135 ImpDefs.clear(); 136 VRegPHIUseCount.clear(); 137 138 return Changed; 139} 140 141/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 142/// predecessor basic blocks. 143/// 144bool PHIElimination::EliminatePHINodes(MachineFunction &MF, 145 MachineBasicBlock &MBB) { 146 if (MBB.empty() || !MBB.front().isPHI()) 147 return false; // Quick exit for basic blocks without PHIs. 148 149 // Get an iterator to the first instruction after the last PHI node (this may 150 // also be the end of the basic block). 151 MachineBasicBlock::iterator AfterPHIsIt = MBB.SkipPHIsAndLabels(MBB.begin()); 152 153 while (MBB.front().isPHI()) 154 LowerAtomicPHINode(MBB, AfterPHIsIt); 155 156 return true; 157} 158 159/// isSourceDefinedByImplicitDef - Return true if all sources of the phi node 160/// are implicit_def's. 161static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi, 162 const MachineRegisterInfo *MRI) { 163 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) { 164 unsigned SrcReg = MPhi->getOperand(i).getReg(); 165 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 166 if (!DefMI || !DefMI->isImplicitDef()) 167 return false; 168 } 169 return true; 170} 171 172 173 174/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 175/// under the assuption that it needs to be lowered in a way that supports 176/// atomic execution of PHIs. This lowering method is always correct all of the 177/// time. 178/// 179void PHIElimination::LowerAtomicPHINode( 180 MachineBasicBlock &MBB, 181 MachineBasicBlock::iterator AfterPHIsIt) { 182 ++NumAtomic; 183 // Unlink the PHI node from the basic block, but don't delete the PHI yet. 184 MachineInstr *MPhi = MBB.remove(MBB.begin()); 185 186 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2; 187 unsigned DestReg = MPhi->getOperand(0).getReg(); 188 assert(MPhi->getOperand(0).getSubReg() == 0 && "Can't handle sub-reg PHIs"); 189 bool isDead = MPhi->getOperand(0).isDead(); 190 191 // Create a new register for the incoming PHI arguments. 192 MachineFunction &MF = *MBB.getParent(); 193 unsigned IncomingReg = 0; 194 bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI? 195 196 // Insert a register to register copy at the top of the current block (but 197 // after any remaining phi nodes) which copies the new incoming register 198 // into the phi node destination. 199 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 200 if (isSourceDefinedByImplicitDef(MPhi, MRI)) 201 // If all sources of a PHI node are implicit_def, just emit an 202 // implicit_def instead of a copy. 203 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 204 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg); 205 else { 206 // Can we reuse an earlier PHI node? This only happens for critical edges, 207 // typically those created by tail duplication. 208 unsigned &entry = LoweredPHIs[MPhi]; 209 if (entry) { 210 // An identical PHI node was already lowered. Reuse the incoming register. 211 IncomingReg = entry; 212 reusedIncoming = true; 213 ++NumReused; 214 DEBUG(dbgs() << "Reusing %reg" << IncomingReg << " for " << *MPhi); 215 } else { 216 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 217 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 218 } 219 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 220 TII->get(TargetOpcode::COPY), DestReg) 221 .addReg(IncomingReg); 222 } 223 224 // Update live variable information if there is any. 225 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>(); 226 if (LV) { 227 MachineInstr *PHICopy = prior(AfterPHIsIt); 228 229 if (IncomingReg) { 230 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); 231 232 // Increment use count of the newly created virtual register. 233 VI.NumUses++; 234 LV->setPHIJoin(IncomingReg); 235 236 // When we are reusing the incoming register, it may already have been 237 // killed in this block. The old kill will also have been inserted at 238 // AfterPHIsIt, so it appears before the current PHICopy. 239 if (reusedIncoming) 240 if (MachineInstr *OldKill = VI.findKill(&MBB)) { 241 DEBUG(dbgs() << "Remove old kill from " << *OldKill); 242 LV->removeVirtualRegisterKilled(IncomingReg, OldKill); 243 DEBUG(MBB.dump()); 244 } 245 246 // Add information to LiveVariables to know that the incoming value is 247 // killed. Note that because the value is defined in several places (once 248 // each for each incoming block), the "def" block and instruction fields 249 // for the VarInfo is not filled in. 250 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 251 } 252 253 // Since we are going to be deleting the PHI node, if it is the last use of 254 // any registers, or if the value itself is dead, we need to move this 255 // information over to the new copy we just inserted. 256 LV->removeVirtualRegistersKilled(MPhi); 257 258 // If the result is dead, update LV. 259 if (isDead) { 260 LV->addVirtualRegisterDead(DestReg, PHICopy); 261 LV->removeVirtualRegisterDead(DestReg, MPhi); 262 } 263 } 264 265 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node. 266 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 267 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(), 268 MPhi->getOperand(i).getReg())]; 269 270 // Now loop over all of the incoming arguments, changing them to copy into the 271 // IncomingReg register in the corresponding predecessor basic block. 272 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto; 273 for (int i = NumSrcs - 1; i >= 0; --i) { 274 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg(); 275 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg(); 276 277 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 278 "Machine PHI Operands must all be virtual registers!"); 279 280 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source 281 // path the PHI. 282 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB(); 283 284 // If source is defined by an implicit def, there is no need to insert a 285 // copy. 286 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 287 if (DefMI->isImplicitDef()) { 288 ImpDefs.insert(DefMI); 289 continue; 290 } 291 292 // Check to make sure we haven't already emitted the copy for this block. 293 // This can happen because PHI nodes may have multiple entries for the same 294 // basic block. 295 if (!MBBsInsertedInto.insert(&opBlock)) 296 continue; // If the copy has already been emitted, we're done. 297 298 // Find a safe location to insert the copy, this may be the first terminator 299 // in the block (or end()). 300 MachineBasicBlock::iterator InsertPos = 301 findPHICopyInsertPoint(&opBlock, &MBB, SrcReg); 302 303 // Insert the copy. 304 if (!reusedIncoming && IncomingReg) 305 BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(), 306 TII->get(TargetOpcode::COPY), IncomingReg).addReg(SrcReg, 0, SrcSubReg); 307 308 // Now update live variable information if we have it. Otherwise we're done 309 if (!LV) continue; 310 311 // We want to be able to insert a kill of the register if this PHI (aka, the 312 // copy we just inserted) is the last use of the source value. Live 313 // variable analysis conservatively handles this by saying that the value is 314 // live until the end of the block the PHI entry lives in. If the value 315 // really is dead at the PHI copy, there will be no successor blocks which 316 // have the value live-in. 317 318 // Also check to see if this register is in use by another PHI node which 319 // has not yet been eliminated. If so, it will be killed at an appropriate 320 // point later. 321 322 // Is it used by any PHI instructions in this block? 323 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)]; 324 325 // Okay, if we now know that the value is not live out of the block, we can 326 // add a kill marker in this block saying that it kills the incoming value! 327 if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) { 328 // In our final twist, we have to decide which instruction kills the 329 // register. In most cases this is the copy, however, the first 330 // terminator instruction at the end of the block may also use the value. 331 // In this case, we should mark *it* as being the killing block, not the 332 // copy. 333 MachineBasicBlock::iterator KillInst; 334 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator(); 335 if (Term != opBlock.end() && Term->readsRegister(SrcReg)) { 336 KillInst = Term; 337 338 // Check that no other terminators use values. 339#ifndef NDEBUG 340 for (MachineBasicBlock::iterator TI = llvm::next(Term); 341 TI != opBlock.end(); ++TI) { 342 assert(!TI->readsRegister(SrcReg) && 343 "Terminator instructions cannot use virtual registers unless" 344 "they are the first terminator in a block!"); 345 } 346#endif 347 } else if (reusedIncoming || !IncomingReg) { 348 // We may have to rewind a bit if we didn't insert a copy this time. 349 KillInst = Term; 350 while (KillInst != opBlock.begin()) 351 if ((--KillInst)->readsRegister(SrcReg)) 352 break; 353 } else { 354 // We just inserted this copy. 355 KillInst = prior(InsertPos); 356 } 357 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); 358 359 // Finally, mark it killed. 360 LV->addVirtualRegisterKilled(SrcReg, KillInst); 361 362 // This vreg no longer lives all of the way through opBlock. 363 unsigned opBlockNum = opBlock.getNumber(); 364 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum); 365 } 366 } 367 368 // Really delete the PHI instruction now, if it is not in the LoweredPHIs map. 369 if (reusedIncoming || !IncomingReg) 370 MF.DeleteMachineInstr(MPhi); 371} 372 373/// analyzePHINodes - Gather information about the PHI nodes in here. In 374/// particular, we want to map the number of uses of a virtual register which is 375/// used in a PHI node. We map that to the BB the vreg is coming from. This is 376/// used later to determine when the vreg is killed in the BB. 377/// 378void PHIElimination::analyzePHINodes(const MachineFunction& MF) { 379 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); 380 I != E; ++I) 381 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 382 BBI != BBE && BBI->isPHI(); ++BBI) 383 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 384 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(), 385 BBI->getOperand(i).getReg())]; 386} 387 388bool PHIElimination::SplitPHIEdges(MachineFunction &MF, 389 MachineBasicBlock &MBB, 390 LiveVariables &LV, 391 MachineLoopInfo *MLI) { 392 if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad()) 393 return false; // Quick exit for basic blocks without PHIs. 394 395 bool Changed = false; 396 for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end(); 397 BBI != BBE && BBI->isPHI(); ++BBI) { 398 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) { 399 unsigned Reg = BBI->getOperand(i).getReg(); 400 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB(); 401 // We break edges when registers are live out from the predecessor block 402 // (not considering PHI nodes). If the register is live in to this block 403 // anyway, we would gain nothing from splitting. 404 // Avoid splitting backedges of loops. It would introduce small 405 // out-of-line blocks into the loop which is very bad for code placement. 406 if (PreMBB != &MBB && 407 !LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB)) { 408 if (!MLI || 409 !(MLI->getLoopFor(PreMBB) == MLI->getLoopFor(&MBB) && 410 MLI->isLoopHeader(&MBB))) 411 Changed |= PreMBB->SplitCriticalEdge(&MBB, this) != 0; 412 } 413 } 414 } 415 return true; 416} 417