PHIElimination.cpp revision 3d720fbc6ad40bc9287a420f824d244965d24631
1//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass eliminates machine instruction PHI nodes by inserting copy 11// instructions. This destroys SSA information, but is the desired input for 12// some register allocators. 13// 14//===----------------------------------------------------------------------===// 15 16#define DEBUG_TYPE "phielim" 17#include "PHIElimination.h" 18#include "llvm/CodeGen/LiveVariables.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/CodeGen/MachineDominators.h" 21#include "llvm/CodeGen/MachineInstr.h" 22#include "llvm/CodeGen/MachineInstrBuilder.h" 23#include "llvm/CodeGen/MachineRegisterInfo.h" 24#include "llvm/Target/TargetInstrInfo.h" 25#include "llvm/Function.h" 26#include "llvm/Target/TargetMachine.h" 27#include "llvm/ADT/SmallPtrSet.h" 28#include "llvm/ADT/STLExtras.h" 29#include "llvm/ADT/Statistic.h" 30#include "llvm/Support/Compiler.h" 31#include "llvm/Support/Debug.h" 32#include <algorithm> 33#include <map> 34using namespace llvm; 35 36STATISTIC(NumAtomic, "Number of atomic phis lowered"); 37STATISTIC(NumSplits, "Number of critical edges split on demand"); 38STATISTIC(NumReused, "Number of reused lowered phis"); 39 40char PHIElimination::ID = 0; 41static RegisterPass<PHIElimination> 42X("phi-node-elimination", "Eliminate PHI nodes for register allocation"); 43 44const PassInfo *const llvm::PHIEliminationID = &X; 45 46void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const { 47 AU.addPreserved<LiveVariables>(); 48 AU.addPreserved<MachineDominatorTree>(); 49 // rdar://7401784 This would be nice: 50 // AU.addPreservedID(MachineLoopInfoID); 51 MachineFunctionPass::getAnalysisUsage(AU); 52} 53 54bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &MF) { 55 MRI = &MF.getRegInfo(); 56 57 bool Changed = false; 58 59 // Split critical edges to help the coalescer 60 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>()) 61 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 62 Changed |= SplitPHIEdges(MF, *I, *LV); 63 64 // Populate VRegPHIUseCount 65 analyzePHINodes(MF); 66 67 // Eliminate PHI instructions by inserting copies into predecessor blocks. 68 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 69 Changed |= EliminatePHINodes(MF, *I); 70 71 // Remove dead IMPLICIT_DEF instructions. 72 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(), 73 E = ImpDefs.end(); I != E; ++I) { 74 MachineInstr *DefMI = *I; 75 unsigned DefReg = DefMI->getOperand(0).getReg(); 76 if (MRI->use_nodbg_empty(DefReg)) 77 DefMI->eraseFromParent(); 78 } 79 80 // Clean up the lowered PHI instructions. 81 for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end(); 82 I != E; ++I) 83 MF.DeleteMachineInstr(I->first); 84 85 LoweredPHIs.clear(); 86 ImpDefs.clear(); 87 VRegPHIUseCount.clear(); 88 89 return Changed; 90} 91 92/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 93/// predecessor basic blocks. 94/// 95bool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF, 96 MachineBasicBlock &MBB) { 97 if (MBB.empty() || !MBB.front().isPHI()) 98 return false; // Quick exit for basic blocks without PHIs. 99 100 // Get an iterator to the first instruction after the last PHI node (this may 101 // also be the end of the basic block). 102 MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin()); 103 104 while (MBB.front().isPHI()) 105 LowerAtomicPHINode(MBB, AfterPHIsIt); 106 107 return true; 108} 109 110/// isSourceDefinedByImplicitDef - Return true if all sources of the phi node 111/// are implicit_def's. 112static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi, 113 const MachineRegisterInfo *MRI) { 114 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) { 115 unsigned SrcReg = MPhi->getOperand(i).getReg(); 116 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 117 if (!DefMI || !DefMI->isImplicitDef()) 118 return false; 119 } 120 return true; 121} 122 123// FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg 124// when following the CFG edge to SuccMBB. This needs to be after any def of 125// SrcReg, but before any subsequent point where control flow might jump out of 126// the basic block. 127MachineBasicBlock::iterator 128llvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB, 129 MachineBasicBlock &SuccMBB, 130 unsigned SrcReg) { 131 // Handle the trivial case trivially. 132 if (MBB.empty()) 133 return MBB.begin(); 134 135 // Usually, we just want to insert the copy before the first terminator 136 // instruction. However, for the edge going to a landing pad, we must insert 137 // the copy before the call/invoke instruction. 138 if (!SuccMBB.isLandingPad()) 139 return MBB.getFirstTerminator(); 140 141 // Discover any defs/uses in this basic block. 142 SmallPtrSet<MachineInstr*, 8> DefUsesInMBB; 143 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg), 144 RE = MRI->reg_end(); RI != RE; ++RI) { 145 MachineInstr *DefUseMI = &*RI; 146 if (DefUseMI->getParent() == &MBB) 147 DefUsesInMBB.insert(DefUseMI); 148 } 149 150 MachineBasicBlock::iterator InsertPoint; 151 if (DefUsesInMBB.empty()) { 152 // No defs. Insert the copy at the start of the basic block. 153 InsertPoint = MBB.begin(); 154 } else if (DefUsesInMBB.size() == 1) { 155 // Insert the copy immediately after the def/use. 156 InsertPoint = *DefUsesInMBB.begin(); 157 ++InsertPoint; 158 } else { 159 // Insert the copy immediately after the last def/use. 160 InsertPoint = MBB.end(); 161 while (!DefUsesInMBB.count(&*--InsertPoint)) {} 162 ++InsertPoint; 163 } 164 165 // Make sure the copy goes after any phi nodes however. 166 return SkipPHIsAndLabels(MBB, InsertPoint); 167} 168 169/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 170/// under the assuption that it needs to be lowered in a way that supports 171/// atomic execution of PHIs. This lowering method is always correct all of the 172/// time. 173/// 174void llvm::PHIElimination::LowerAtomicPHINode( 175 MachineBasicBlock &MBB, 176 MachineBasicBlock::iterator AfterPHIsIt) { 177 ++NumAtomic; 178 // Unlink the PHI node from the basic block, but don't delete the PHI yet. 179 MachineInstr *MPhi = MBB.remove(MBB.begin()); 180 181 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2; 182 unsigned DestReg = MPhi->getOperand(0).getReg(); 183 bool isDead = MPhi->getOperand(0).isDead(); 184 185 // Create a new register for the incoming PHI arguments. 186 MachineFunction &MF = *MBB.getParent(); 187 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 188 unsigned IncomingReg = 0; 189 bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI? 190 191 // Insert a register to register copy at the top of the current block (but 192 // after any remaining phi nodes) which copies the new incoming register 193 // into the phi node destination. 194 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 195 if (isSourceDefinedByImplicitDef(MPhi, MRI)) 196 // If all sources of a PHI node are implicit_def, just emit an 197 // implicit_def instead of a copy. 198 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 199 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg); 200 else { 201 // Can we reuse an earlier PHI node? This only happens for critical edges, 202 // typically those created by tail duplication. 203 unsigned &entry = LoweredPHIs[MPhi]; 204 if (entry) { 205 // An identical PHI node was already lowered. Reuse the incoming register. 206 IncomingReg = entry; 207 reusedIncoming = true; 208 ++NumReused; 209 DEBUG(dbgs() << "Reusing %reg" << IncomingReg << " for " << *MPhi); 210 } else { 211 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 212 } 213 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC); 214 } 215 216 // Update live variable information if there is any. 217 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>(); 218 if (LV) { 219 MachineInstr *PHICopy = prior(AfterPHIsIt); 220 221 if (IncomingReg) { 222 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); 223 224 // Increment use count of the newly created virtual register. 225 VI.NumUses++; 226 LV->setPHIJoin(IncomingReg); 227 228 // When we are reusing the incoming register, it may already have been 229 // killed in this block. The old kill will also have been inserted at 230 // AfterPHIsIt, so it appears before the current PHICopy. 231 if (reusedIncoming) 232 if (MachineInstr *OldKill = VI.findKill(&MBB)) { 233 DEBUG(dbgs() << "Remove old kill from " << *OldKill); 234 LV->removeVirtualRegisterKilled(IncomingReg, OldKill); 235 DEBUG(MBB.dump()); 236 } 237 238 // Add information to LiveVariables to know that the incoming value is 239 // killed. Note that because the value is defined in several places (once 240 // each for each incoming block), the "def" block and instruction fields 241 // for the VarInfo is not filled in. 242 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 243 } 244 245 // Since we are going to be deleting the PHI node, if it is the last use of 246 // any registers, or if the value itself is dead, we need to move this 247 // information over to the new copy we just inserted. 248 LV->removeVirtualRegistersKilled(MPhi); 249 250 // If the result is dead, update LV. 251 if (isDead) { 252 LV->addVirtualRegisterDead(DestReg, PHICopy); 253 LV->removeVirtualRegisterDead(DestReg, MPhi); 254 } 255 } 256 257 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node. 258 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 259 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(), 260 MPhi->getOperand(i).getReg())]; 261 262 // Now loop over all of the incoming arguments, changing them to copy into the 263 // IncomingReg register in the corresponding predecessor basic block. 264 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto; 265 for (int i = NumSrcs - 1; i >= 0; --i) { 266 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg(); 267 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 268 "Machine PHI Operands must all be virtual registers!"); 269 270 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source 271 // path the PHI. 272 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB(); 273 274 // If source is defined by an implicit def, there is no need to insert a 275 // copy. 276 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 277 if (DefMI->isImplicitDef()) { 278 ImpDefs.insert(DefMI); 279 continue; 280 } 281 282 // Check to make sure we haven't already emitted the copy for this block. 283 // This can happen because PHI nodes may have multiple entries for the same 284 // basic block. 285 if (!MBBsInsertedInto.insert(&opBlock)) 286 continue; // If the copy has already been emitted, we're done. 287 288 // Find a safe location to insert the copy, this may be the first terminator 289 // in the block (or end()). 290 MachineBasicBlock::iterator InsertPos = 291 FindCopyInsertPoint(opBlock, MBB, SrcReg); 292 293 // Insert the copy. 294 if (!reusedIncoming && IncomingReg) 295 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC); 296 297 // Now update live variable information if we have it. Otherwise we're done 298 if (!LV) continue; 299 300 // We want to be able to insert a kill of the register if this PHI (aka, the 301 // copy we just inserted) is the last use of the source value. Live 302 // variable analysis conservatively handles this by saying that the value is 303 // live until the end of the block the PHI entry lives in. If the value 304 // really is dead at the PHI copy, there will be no successor blocks which 305 // have the value live-in. 306 307 // Also check to see if this register is in use by another PHI node which 308 // has not yet been eliminated. If so, it will be killed at an appropriate 309 // point later. 310 311 // Is it used by any PHI instructions in this block? 312 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)]; 313 314 // Okay, if we now know that the value is not live out of the block, we can 315 // add a kill marker in this block saying that it kills the incoming value! 316 if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) { 317 // In our final twist, we have to decide which instruction kills the 318 // register. In most cases this is the copy, however, the first 319 // terminator instruction at the end of the block may also use the value. 320 // In this case, we should mark *it* as being the killing block, not the 321 // copy. 322 MachineBasicBlock::iterator KillInst; 323 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator(); 324 if (Term != opBlock.end() && Term->readsRegister(SrcReg)) { 325 KillInst = Term; 326 327 // Check that no other terminators use values. 328#ifndef NDEBUG 329 for (MachineBasicBlock::iterator TI = llvm::next(Term); 330 TI != opBlock.end(); ++TI) { 331 assert(!TI->readsRegister(SrcReg) && 332 "Terminator instructions cannot use virtual registers unless" 333 "they are the first terminator in a block!"); 334 } 335#endif 336 } else if (reusedIncoming || !IncomingReg) { 337 // We may have to rewind a bit if we didn't insert a copy this time. 338 KillInst = Term; 339 while (KillInst != opBlock.begin()) 340 if ((--KillInst)->readsRegister(SrcReg)) 341 break; 342 } else { 343 // We just inserted this copy. 344 KillInst = prior(InsertPos); 345 } 346 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); 347 348 // Finally, mark it killed. 349 LV->addVirtualRegisterKilled(SrcReg, KillInst); 350 351 // This vreg no longer lives all of the way through opBlock. 352 unsigned opBlockNum = opBlock.getNumber(); 353 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum); 354 } 355 } 356 357 // Really delete the PHI instruction now, if it is not in the LoweredPHIs map. 358 if (reusedIncoming || !IncomingReg) 359 MF.DeleteMachineInstr(MPhi); 360} 361 362/// analyzePHINodes - Gather information about the PHI nodes in here. In 363/// particular, we want to map the number of uses of a virtual register which is 364/// used in a PHI node. We map that to the BB the vreg is coming from. This is 365/// used later to determine when the vreg is killed in the BB. 366/// 367void llvm::PHIElimination::analyzePHINodes(const MachineFunction& MF) { 368 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); 369 I != E; ++I) 370 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 371 BBI != BBE && BBI->isPHI(); ++BBI) 372 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 373 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(), 374 BBI->getOperand(i).getReg())]; 375} 376 377bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF, 378 MachineBasicBlock &MBB, 379 LiveVariables &LV) { 380 if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad()) 381 return false; // Quick exit for basic blocks without PHIs. 382 383 for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end(); 384 BBI != BBE && BBI->isPHI(); ++BBI) { 385 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) { 386 unsigned Reg = BBI->getOperand(i).getReg(); 387 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB(); 388 // We break edges when registers are live out from the predecessor block 389 // (not considering PHI nodes). If the register is live in to this block 390 // anyway, we would gain nothing from splitting. 391 if (!LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB)) 392 SplitCriticalEdge(PreMBB, &MBB); 393 } 394 } 395 return true; 396} 397 398MachineBasicBlock *PHIElimination::SplitCriticalEdge(MachineBasicBlock *A, 399 MachineBasicBlock *B) { 400 assert(A && B && "Missing MBB end point"); 401 402 MachineFunction *MF = A->getParent(); 403 404 // We may need to update A's terminator, but we can't do that if AnalyzeBranch 405 // fails. If A uses a jump table, we won't touch it. 406 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); 407 MachineBasicBlock *TBB = 0, *FBB = 0; 408 SmallVector<MachineOperand, 4> Cond; 409 if (TII->AnalyzeBranch(*A, TBB, FBB, Cond)) 410 return NULL; 411 412 ++NumSplits; 413 414 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock(); 415 MF->insert(llvm::next(MachineFunction::iterator(A)), NMBB); 416 DEBUG(dbgs() << "PHIElimination splitting critical edge:" 417 " BB#" << A->getNumber() 418 << " -- BB#" << NMBB->getNumber() 419 << " -- BB#" << B->getNumber() << '\n'); 420 421 A->ReplaceUsesOfBlockWith(B, NMBB); 422 A->updateTerminator(); 423 424 // Insert unconditional "jump B" instruction in NMBB if necessary. 425 NMBB->addSuccessor(B); 426 if (!NMBB->isLayoutSuccessor(B)) { 427 Cond.clear(); 428 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, B, NULL, Cond); 429 } 430 431 // Fix PHI nodes in B so they refer to NMBB instead of A 432 for (MachineBasicBlock::iterator i = B->begin(), e = B->end(); 433 i != e && i->isPHI(); ++i) 434 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2) 435 if (i->getOperand(ni+1).getMBB() == A) 436 i->getOperand(ni+1).setMBB(NMBB); 437 438 if (LiveVariables *LV=getAnalysisIfAvailable<LiveVariables>()) 439 LV->addNewBlock(NMBB, A, B); 440 441 if (MachineDominatorTree *MDT=getAnalysisIfAvailable<MachineDominatorTree>()) 442 MDT->addNewBlock(NMBB, A); 443 444 return NMBB; 445} 446