ARMJITInfo.cpp revision ea6e03699e9e0cbe6aaf537ac7f4dee443ee42d0
1//===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the JIT interfaces for the ARM target.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "jit"
15#include "ARMJITInfo.h"
16#include "ARMRelocations.h"
17#include "ARMSubtarget.h"
18#include "llvm/Function.h"
19#include "llvm/CodeGen/MachineCodeEmitter.h"
20#include "llvm/Config/alloca.h"
21#include "llvm/Support/Streams.h"
22#include "llvm/System/Memory.h"
23#include <cstdlib>
24using namespace llvm;
25
26void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
27  abort();
28}
29
30/// JITCompilerFunction - This contains the address of the JIT function used to
31/// compile a function lazily.
32static TargetJITInfo::JITCompilerFn JITCompilerFunction;
33
34// Get the ASMPREFIX for the current host.  This is often '_'.
35#ifndef __USER_LABEL_PREFIX__
36#define __USER_LABEL_PREFIX__
37#endif
38#define GETASMPREFIX2(X) #X
39#define GETASMPREFIX(X) GETASMPREFIX2(X)
40#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
41
42// CompilationCallback stub - We can't use a C function with inline assembly in
43// it, because we the prolog/epilog inserted by GCC won't work for us (we need
44// to preserve more context and manipulate the stack directly).  Instead,
45// write our own wrapper, which does things our way, so we have complete
46// control over register saving and restoring.
47extern "C" {
48#if defined(__arm__)
49  void ARMCompilationCallback(void);
50  asm(
51    ".text\n"
52    ".align 2\n"
53    ".globl " ASMPREFIX "ARMCompilationCallback\n"
54    ASMPREFIX "ARMCompilationCallback:\n"
55    // Save caller saved registers since they may contain stuff
56    // for the real target function right now. We have to act as if this
57    // whole compilation callback doesn't exist as far as the caller is
58    // concerned, so we can't just preserve the callee saved regs.
59    "stmdb sp!, {r0, r1, r2, r3, lr}\n"
60    // The LR contains the address of the stub function on entry.
61    // pass it as the argument to the C part of the callback
62    "mov  r0, lr\n"
63    "sub  sp, sp, #4\n"
64    // Call the C portion of the callback
65    "bl   " ASMPREFIX "ARMCompilationCallbackC\n"
66    "add  sp, sp, #4\n"
67    // Restoring the LR to the return address of the function that invoked
68    // the stub and de-allocating the stack space for it requires us to
69    // swap the two saved LR values on the stack, as they're backwards
70    // for what we need since the pop instruction has a pre-determined
71    // order for the registers.
72    //      +--------+
73    //   0  | LR     | Original return address
74    //      +--------+
75    //   1  | LR     | Stub address (start of stub)
76    // 2-5  | R3..R0 | Saved registers (we need to preserve all regs)
77    //      +--------+
78    //
79    //      We need to exchange the values in slots 0 and 1 so we can
80    //      return to the address in slot 1 with the address in slot 0
81    //      restored to the LR.
82    "ldr  r0, [sp,#20]\n"
83    "ldr  r1, [sp,#16]\n"
84    "str  r1, [sp,#20]\n"
85    "str  r0, [sp,#16]\n"
86    // Return to the (newly modified) stub to invoke the real function.
87    // The above twiddling of the saved return addresses allows us to
88    // deallocate everything, including the LR the stub saved, all in one
89    // pop instruction.
90    "ldmia  sp!, {r0, r1, r2, r3, lr, pc}\n"
91      );
92#else  // Not an ARM host
93  void ARMCompilationCallback() {
94    assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n");
95    abort();
96  }
97#endif
98}
99
100/// ARMCompilationCallbackC - This is the target-specific function invoked
101/// by the function stub when we did not know the real target of a call.
102/// This function must locate the start of the stub or call site and pass
103/// it into the JIT compiler function.
104extern "C" void ARMCompilationCallbackC(intptr_t StubAddr) {
105  // Get the address of the compiled code for this function.
106  intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)StubAddr);
107
108  // Rewrite the call target... so that we don't end up here every time we
109  // execute the call. We're replacing the first two instructions of the
110  // stub with:
111  //   ldr pc, [pc,#-4]
112  //   <addr>
113  bool ok = sys::Memory::setRangeWritable ((void*)StubAddr, 8);
114  if (!ok)
115    {
116      cerr << "ERROR: Unable to mark stub writable\n";
117      abort();
118    }
119  *(intptr_t *)StubAddr = 0xe51ff004;
120  *(intptr_t *)(StubAddr+4) = NewVal;
121  ok = sys::Memory::setRangeExecutable ((void*)StubAddr, 8);
122  if (!ok)
123    {
124      cerr << "ERROR: Unable to mark stub executable\n";
125      abort();
126    }
127}
128
129TargetJITInfo::LazyResolverFn
130ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) {
131  JITCompilerFunction = F;
132  return ARMCompilationCallback;
133}
134
135void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
136                                   MachineCodeEmitter &MCE) {
137  unsigned addr = (intptr_t)Fn;
138  // If this is just a call to an external function, emit a branch instead of a
139  // call.  The code is the same except for one bit of the last instruction.
140  if (Fn != (void*)(intptr_t)ARMCompilationCallback) {
141    // branch to the corresponding function addr
142    // the stub is 8-byte size and 4-aligned
143    MCE.startFunctionStub(F, 8, 4);
144    MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4]
145    MCE.emitWordLE(addr);       // addr of function
146  } else {
147    // The compilation callback will overwrite the first two words of this
148    // stub with indirect branch instructions targeting the compiled code.
149    // This stub sets the return address to restart the stub, so that
150    // the new branch will be invoked when we come back.
151    //
152    // branch and link to the compilation callback.
153    // the stub is 16-byte size and 4-byte aligned.
154    MCE.startFunctionStub(F, 16, 4);
155    // Save LR so the callback can determine which stub called it.
156    // The compilation callback is responsible for popping this prior
157    // to returning.
158    MCE.emitWordLE(0xe92d4000); // PUSH {lr}
159    // Set the return address to go back to the start of this stub
160    MCE.emitWordLE(0xe24fe00c); // SUB LR, PC, #12
161    // Invoke the compilation callback
162    MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4]
163    // The address of the compilation callback
164    MCE.emitWordLE((intptr_t)ARMCompilationCallback);
165  }
166
167  return MCE.finishFunctionStub(F);
168}
169
170/// relocate - Before the JIT can run a block of code that has been emitted,
171/// it must rewrite the code to contain the actual addresses of any
172/// referenced global symbols.
173void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
174                          unsigned NumRelocs, unsigned char* GOTBase) {
175  for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
176    void *RelocPos = (char*)Function + MR->getMachineCodeOffset();
177    intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
178    switch ((ARM::RelocationType)MR->getRelocationType()) {
179    case ARM::reloc_arm_relative: {
180      // It is necessary to calculate the correct PC relative value. We
181      // subtract the base addr from the target addr to form a byte offset.
182      ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
183      // If the result is positive, set bit U(23) to 1.
184      if (ResultPtr >= 0)
185        *((unsigned*)RelocPos) |= 1 << 23;
186      else {
187      // otherwise, obtain the absolute value and set
188      // bit U(23) to 0.
189        ResultPtr *= -1;
190        *((unsigned*)RelocPos) &= 0xFF7FFFFF;
191      }
192      // set the immed value calculated
193      *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
194      // set register Rn to PC
195      *((unsigned*)RelocPos) |= 0xF << 16;
196      break;
197    }
198    case ARM::reloc_arm_branch: {
199      // It is necessary to calculate the correct value of signed_immed_24
200      // field. We subtract the base addr from the target addr to form a
201      // byte offset, which must be inside the range -33554432 and +33554428.
202      // Then, we set the signed_immed_24 field of the instruction to bits
203      // [25:2] of the byte offset. More details ARM-ARM p. A4-11.
204      ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
205      ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2;
206      assert(ResultPtr >= -33554432 && ResultPtr <= 33554428);
207      *((unsigned*)RelocPos) |= ResultPtr;
208      break;
209    }
210    }
211  }
212}
213