MSP430ISelDAGToDAG.cpp revision 9cbe2bc74aff10a95b2ee6ed6fb4a47dffee4751 
1//===-- MSP430ISelDAGToDAG.cpp - A dag to dag inst selector for MSP430 ----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines an instruction selector for the MSP430 target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "MSP430.h"
15#include "MSP430ISelLowering.h"
16#include "MSP430TargetMachine.h"
17#include "llvm/DerivedTypes.h"
18#include "llvm/Function.h"
19#include "llvm/Intrinsics.h"
20#include "llvm/CallingConv.h"
21#include "llvm/Constants.h"
22#include "llvm/CodeGen/MachineFrameInfo.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/MachineInstrBuilder.h"
25#include "llvm/CodeGen/MachineRegisterInfo.h"
26#include "llvm/CodeGen/SelectionDAG.h"
27#include "llvm/CodeGen/SelectionDAGISel.h"
28#include "llvm/Target/TargetLowering.h"
29#include "llvm/Support/Compiler.h"
30#include "llvm/Support/Debug.h"
31#include "llvm/Support/ErrorHandling.h"
32#include "llvm/Support/raw_ostream.h"
33using namespace llvm;
34
35/// MSP430DAGToDAGISel - MSP430 specific code to select MSP430 machine
36/// instructions for SelectionDAG operations.
37///
38namespace {
39  class MSP430DAGToDAGISel : public SelectionDAGISel {
40    MSP430TargetLowering &Lowering;
41    const MSP430Subtarget &Subtarget;
42
43  public:
44    MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel)
45      : SelectionDAGISel(TM, OptLevel),
46        Lowering(*TM.getTargetLowering()),
47        Subtarget(*TM.getSubtargetImpl()) { }
48
49    virtual void InstructionSelect();
50
51    virtual const char *getPassName() const {
52      return "MSP430 DAG->DAG Pattern Instruction Selection";
53    }
54
55    virtual bool
56    SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
57                                 std::vector<SDValue> &OutOps);
58
59    // Include the pieces autogenerated from the target description.
60  #include "MSP430GenDAGISel.inc"
61
62  private:
63    SDNode *Select(SDValue Op);
64    bool SelectAddr(SDValue Op, SDValue Addr, SDValue &Base, SDValue &Disp);
65
66  #ifndef NDEBUG
67    unsigned Indent;
68  #endif
69  };
70}  // end anonymous namespace
71
72/// createMSP430ISelDag - This pass converts a legalized DAG into a
73/// MSP430-specific DAG, ready for instruction scheduling.
74///
75FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM,
76                                        CodeGenOpt::Level OptLevel) {
77  return new MSP430DAGToDAGISel(TM, OptLevel);
78}
79
80// FIXME: This is pretty dummy routine and needs to be rewritten in the future.
81bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
82                                    SDValue &Base, SDValue &Disp) {
83  // Try to match frame address first.
84  if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
85    Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i16);
86    Disp = CurDAG->getTargetConstant(0, MVT::i16);
87    return true;
88  }
89
90  switch (Addr.getOpcode()) {
91  case ISD::ADD:
92   // Operand is a result from ADD with constant operand which fits into i16.
93   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
94      uint64_t CVal = CN->getZExtValue();
95      // Offset should fit into 16 bits.
96      if (((CVal << 48) >> 48) == CVal) {
97        SDValue N0 = Addr.getOperand(0);
98        if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(N0))
99          Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i16);
100        else
101          Base = N0;
102
103        Disp = CurDAG->getTargetConstant(CVal, MVT::i16);
104        return true;
105      }
106    }
107    break;
108  case MSP430ISD::Wrapper:
109    SDValue N0 = Addr.getOperand(0);
110    if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
111      Base = CurDAG->getTargetGlobalAddress(G->getGlobal(),
112                                            MVT::i16, G->getOffset());
113      Disp = CurDAG->getTargetConstant(0, MVT::i16);
114      return true;
115    } else if (ExternalSymbolSDNode *E = dyn_cast<ExternalSymbolSDNode>(N0)) {
116      Base = CurDAG->getTargetExternalSymbol(E->getSymbol(), MVT::i16);
117      Disp = CurDAG->getTargetConstant(0, MVT::i16);
118    }
119    break;
120  };
121
122  Base = Addr;
123  Disp = CurDAG->getTargetConstant(0, MVT::i16);
124
125  return true;
126}
127
128
129bool MSP430DAGToDAGISel::
130SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
131                             std::vector<SDValue> &OutOps) {
132  SDValue Op0, Op1;
133  switch (ConstraintCode) {
134  default: return true;
135  case 'm':   // memory
136    if (!SelectAddr(Op, Op, Op0, Op1))
137      return true;
138    break;
139  }
140
141  OutOps.push_back(Op0);
142  OutOps.push_back(Op1);
143  return false;
144}
145
146/// InstructionSelect - This callback is invoked by
147/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
148void MSP430DAGToDAGISel::InstructionSelect() {
149  DEBUG(BB->dump());
150
151  // Codegen the basic block.
152  DEBUG(errs() << "===== Instruction selection begins:\n");
153  DEBUG(Indent = 0);
154  SelectRoot(*CurDAG);
155  DEBUG(errs() << "===== Instruction selection ends:\n");
156
157  CurDAG->RemoveDeadNodes();
158}
159
160SDNode *MSP430DAGToDAGISel::Select(SDValue Op) {
161  SDNode *Node = Op.getNode();
162  DebugLoc dl = Op.getDebugLoc();
163
164  // Dump information about the Node being selected
165  DEBUG(errs().indent(Indent) << "Selecting: ");
166  DEBUG(Node->dump(CurDAG));
167  DEBUG(errs() << "\n");
168  DEBUG(Indent += 2);
169
170  // If we have a custom node, we already have selected!
171  if (Node->isMachineOpcode()) {
172    DEBUG(errs().indent(Indent-2) << "== ";
173          Node->dump(CurDAG);
174          errs() << "\n");
175    DEBUG(Indent -= 2);
176    return NULL;
177  }
178
179  // Few custom selection stuff.
180  switch (Node->getOpcode()) {
181  default: break;
182  case ISD::FrameIndex: {
183    assert(Op.getValueType() == MVT::i16);
184    int FI = cast<FrameIndexSDNode>(Node)->getIndex();
185    SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i16);
186    if (Node->hasOneUse())
187      return CurDAG->SelectNodeTo(Node, MSP430::ADD16ri, MVT::i16,
188                                  TFI, CurDAG->getTargetConstant(0, MVT::i16));
189    return CurDAG->getMachineNode(MSP430::ADD16ri, dl, MVT::i16,
190                                  TFI, CurDAG->getTargetConstant(0, MVT::i16));
191  }
192  }
193
194  // Select the default instruction
195  SDNode *ResNode = SelectCode(Op);
196
197  DEBUG(errs() << std::string(Indent-2, ' ') << "=> ");
198  if (ResNode == NULL || ResNode == Op.getNode())
199    DEBUG(Op.getNode()->dump(CurDAG));
200  else
201    DEBUG(ResNode->dump(CurDAG));
202  DEBUG(errs() << "\n");
203  DEBUG(Indent -= 2);
204
205  return ResNode;
206}
207