PPCJITInfo.cpp revision 892afa9556eabf358ef632f1be0bde1587b3d610
1//===-- PPC32JITInfo.cpp - Implement the JIT interfaces for the PowerPC ---===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the JIT interfaces for the 32-bit PowerPC target. 11// 12//===----------------------------------------------------------------------===// 13 14#define DEBUG_TYPE "jit" 15#include "PPC32JITInfo.h" 16#include "PPC32Relocations.h" 17#include "llvm/CodeGen/MachineCodeEmitter.h" 18#include "llvm/Config/alloca.h" 19using namespace llvm; 20 21static TargetJITInfo::JITCompilerFn JITCompilerFunction; 22 23#define BUILD_ADDIS(RD,RS,IMM16) \ 24 ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535)) 25#define BUILD_ORI(RD,RS,UIMM16) \ 26 ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535)) 27#define BUILD_MTSPR(RS,SPR) \ 28 ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1)) 29#define BUILD_BCCTRx(BO,BI,LINK) \ 30 ((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1)) 31 32// Pseudo-ops 33#define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16) 34#define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9) 35#define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK) 36 37 38static void EmitBranchToAt(void *At, void *To, bool isCall) { 39 intptr_t Addr = (intptr_t)To; 40 41 // FIXME: should special case the short branch case. 42 unsigned *AtI = (unsigned*)At; 43 44 AtI[0] = BUILD_LIS(12, Addr >> 16); // lis r12, hi16(address) 45 AtI[1] = BUILD_ORI(12, 12, Addr); // ori r12, r12, low16(address) 46 AtI[2] = BUILD_MTCTR(12); // mtctr r12 47 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl 48} 49 50static void CompilationCallback() { 51 // Save R3-R31, since we want to restore arguments and nonvolatile regs used 52 // by the compiler. We also save and restore the FP regs, although this is 53 // probably just paranoia (gcc is unlikely to emit code that uses them for 54 // for this function. 55#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) 56 unsigned IntRegs[29]; 57 double FPRegs[13]; 58 __asm__ __volatile__ ( 59 "stmw r3, 0(%0)\n" 60 "stfd f1, 0(%1)\n" "stfd f2, 8(%1)\n" "stfd f3, 16(%1)\n" 61 "stfd f4, 24(%1)\n" "stfd f5, 32(%1)\n" "stfd f6, 40(%1)\n" 62 "stfd f7, 48(%1)\n" "stfd f8, 56(%1)\n" "stfd f9, 64(%1)\n" 63 "stfd f10, 72(%1)\n" "stfd f11, 80(%1)\n" "stfd f12, 88(%1)\n" 64 "stfd f13, 96(%1)\n" :: "b" (IntRegs), "b" (FPRegs) ); 65 /// FIXME: Need to safe and restore the rest of the FP regs! 66#endif 67 68 unsigned *CameFromStub = (unsigned*)__builtin_return_address(0); 69 unsigned *CameFromOrig = (unsigned*)__builtin_return_address(1); 70 unsigned *CCStackPtr = (unsigned*)__builtin_frame_address(0); 71//unsigned *StubStackPtr = (unsigned*)__builtin_frame_address(1); 72 unsigned *OrigStackPtr = (unsigned*)__builtin_frame_address(2); 73 74 // Adjust pointer to the branch, not the return address. 75 --CameFromStub; 76 77 void *Target = JITCompilerFunction(CameFromStub); 78 79 // Check to see if CameFromOrig[-1] is a 'bl' instruction, and if we can 80 // rewrite it to branch directly to the destination. If so, rewrite it so it 81 // does not need to go through the stub anymore. 82 unsigned CameFromOrigInst = CameFromOrig[-1]; 83 if ((CameFromOrigInst >> 26) == 18) { // Direct call. 84 intptr_t Offset = ((intptr_t)Target-(intptr_t)CameFromOrig+4) >> 2; 85 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range? 86 // Clear the original target out. 87 CameFromOrigInst &= (63 << 26) | 3; 88 // Fill in the new target. 89 CameFromOrigInst |= (Offset & ((1 << 24)-1)) << 2; 90 // Replace the call. 91 CameFromOrig[-1] = CameFromOrigInst; 92 } 93 } 94 95 // Locate the start of the stub. If this is a short call, adjust backwards 96 // the short amount, otherwise the full amount. 97 bool isShortStub = (*CameFromStub >> 26) == 18; 98 CameFromStub -= isShortStub ? 2 : 6; 99 100 // Rewrite the stub with an unconditional branch to the target, for any users 101 // who took the address of the stub. 102 EmitBranchToAt(CameFromStub, Target, false); 103 104 // Change the SP so that we pop two stack frames off when we return. 105 *CCStackPtr = (intptr_t)OrigStackPtr; 106 107 // Put the address of the stub and the LR value that originally came into the 108 // stub in a place that is easy to get on the stack after we restore all regs. 109 CCStackPtr[2] = (intptr_t)Target; 110 CCStackPtr[1] = (intptr_t)CameFromOrig; 111 112 // Note, this is not a standard epilog! 113#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) 114 register unsigned *IRR asm ("r2") = IntRegs; 115 register double *FRR asm ("r3") = FPRegs; 116 __asm__ __volatile__ ( 117 "lfd f1, 0(%0)\n" "lfd f2, 8(%0)\n" "lfd f3, 16(%0)\n" 118 "lfd f4, 24(%0)\n" "lfd f5, 32(%0)\n" "lfd f6, 40(%0)\n" 119 "lfd f7, 48(%0)\n" "lfd f8, 56(%0)\n" "lfd f9, 64(%0)\n" 120 "lfd f10, 72(%0)\n" "lfd f11, 80(%0)\n" "lfd f12, 88(%0)\n" 121 "lfd f13, 96(%0)\n" 122 "lmw r3, 0(%1)\n" // Load all integer regs 123 "lwz r0,4(r1)\n" // Get CameFromOrig (LR into stub) 124 "mtlr r0\n" // Put it in the LR register 125 "lwz r0,8(r1)\n" // Get target function pointer 126 "mtctr r0\n" // Put it into the CTR register 127 "lwz r1,0(r1)\n" // Pop two frames off 128 "bctr\n" :: // Return to stub! 129 "b" (FRR), "b" (IRR)); 130#endif 131} 132 133 134 135TargetJITInfo::LazyResolverFn 136PPC32JITInfo::getLazyResolverFunction(JITCompilerFn Fn) { 137 JITCompilerFunction = Fn; 138 return CompilationCallback; 139} 140 141void *PPC32JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) { 142 // If this is just a call to an external function, emit a branch instead of a 143 // call. The code is the same except for one bit of the last instruction. 144 if (Fn != CompilationCallback) { 145 MCE.startFunctionStub(4*4); 146 void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue(); 147 MCE.emitWord(0); 148 MCE.emitWord(0); 149 MCE.emitWord(0); 150 MCE.emitWord(0); 151 EmitBranchToAt(Addr, Fn, false); 152 return MCE.finishFunctionStub(0); 153 } 154 155 MCE.startFunctionStub(4*7); 156 MCE.emitWord(0x9421ffe0); // stwu r1,-32(r1) 157 MCE.emitWord(0x7d6802a6); // mflr r11 158 MCE.emitWord(0x91610028); // stw r11, 40(r1) 159 void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue(); 160 MCE.emitWord(0); 161 MCE.emitWord(0); 162 MCE.emitWord(0); 163 MCE.emitWord(0); 164 EmitBranchToAt(Addr, Fn, true/*is call*/); 165 return MCE.finishFunctionStub(0); 166} 167 168 169void PPC32JITInfo::relocate(void *Function, MachineRelocation *MR, 170 unsigned NumRelocs) { 171 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) { 172 unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4; 173 intptr_t ResultPtr = (intptr_t)MR->getResultPointer(); 174 switch ((PPC::RelocationType)MR->getRelocationType()) { 175 default: assert(0 && "Unknown relocation type!"); 176 case PPC::reloc_pcrel_bx: 177 // PC-relative relocation for b and bl instructions. 178 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2; 179 assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) && 180 "Relocation out of range!"); 181 *RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2; 182 break; 183 case PPC::reloc_absolute_loadhi: // Relocate high bits into addis 184 case PPC::reloc_absolute_la: // Relocate low bits into addi 185 ResultPtr += MR->getConstantVal(); 186 187 if (MR->getRelocationType() == PPC::reloc_absolute_loadhi) { 188 // If the low part will have a carry (really a borrow) from the low 189 // 16-bits into the high 16, add a bit to borrow from. 190 if (((int)ResultPtr << 16) < 0) 191 ResultPtr += 1 << 16; 192 ResultPtr >>= 16; 193 } 194 195 // Do the addition then mask, so the addition does not overflow the 16-bit 196 // immediate section of the instruction. 197 unsigned LowBits = (*RelocPos + ResultPtr) & 65535; 198 unsigned HighBits = *RelocPos & ~65535; 199 *RelocPos = LowBits | HighBits; // Slam into low 16-bits 200 break; 201 } 202 } 203} 204 205void PPC32JITInfo::replaceMachineCodeForFunction(void *Old, void *New) { 206 EmitBranchToAt(Old, New, false); 207} 208