PPCJITInfo.cpp revision d74ea2bbd8bb630331f35ead42d385249bd42af8 
1//===-- PPCJITInfo.cpp - Implement the JIT interfaces for the PowerPC -----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the JIT interfaces for the 32-bit PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "jit"
15#include "PPCJITInfo.h"
16#include "PPCRelocations.h"
17#include "llvm/CodeGen/MachineCodeEmitter.h"
18#include "llvm/Config/alloca.h"
19#include <set>
20using namespace llvm;
21
22static TargetJITInfo::JITCompilerFn JITCompilerFunction;
23
24#define BUILD_ADDIS(RD,RS,IMM16) \
25  ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
26#define BUILD_ORI(RD,RS,UIMM16) \
27  ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
28#define BUILD_MTSPR(RS,SPR)      \
29  ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
30#define BUILD_BCCTRx(BO,BI,LINK) \
31  ((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
32
33// Pseudo-ops
34#define BUILD_LIS(RD,IMM16)    BUILD_ADDIS(RD,0,IMM16)
35#define BUILD_MTCTR(RS)        BUILD_MTSPR(RS,9)
36#define BUILD_BCTR(LINK)       BUILD_BCCTRx(20,0,LINK)
37
38
39static void EmitBranchToAt(void *At, void *To, bool isCall) {
40  intptr_t Addr = (intptr_t)To;
41
42  // FIXME: should special case the short branch case.
43  unsigned *AtI = (unsigned*)At;
44
45  AtI[0] = BUILD_LIS(12, Addr >> 16);   // lis r12, hi16(address)
46  AtI[1] = BUILD_ORI(12, 12, Addr);     // ori r12, r12, low16(address)
47  AtI[2] = BUILD_MTCTR(12);             // mtctr r12
48  AtI[3] = BUILD_BCTR(isCall);          // bctr/bctrl
49}
50
51extern "C" void PPC32CompilationCallback();
52
53#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
54// CompilationCallback stub - We can't use a C function with inline assembly in
55// it, because we the prolog/epilog inserted by GCC won't work for us.  Instead,
56// write our own wrapper, which does things our way, so we have complete control
57// over register saving and restoring.
58asm(
59    ".text\n"
60    ".align 2\n"
61    ".globl _PPC32CompilationCallback\n"
62"_PPC32CompilationCallback:\n"
63    // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
64    // FIXME: need to save v[0-19] for altivec?
65    // Set up a proper stack frame
66    "stwu r1, -208(r1)\n"
67    "mflr r0\n"
68    "stw r0,  216(r1)\n"
69    // Save all int arg registers
70    "stw r10, 204(r1)\n"    "stw r9,  200(r1)\n"
71    "stw r8,  196(r1)\n"    "stw r7,  192(r1)\n"
72    "stw r6,  188(r1)\n"    "stw r5,  184(r1)\n"
73    "stw r4,  180(r1)\n"    "stw r3,  176(r1)\n"
74    // Save all call-clobbered FP regs.
75    "stfd f13, 168(r1)\n"   "stfd f12, 160(r1)\n"
76    "stfd f11, 152(r1)\n"   "stfd f10, 144(r1)\n"
77    "stfd f9,  136(r1)\n"   "stfd f8,  128(r1)\n"
78    "stfd f7,  120(r1)\n"   "stfd f6,  112(r1)\n"
79    "stfd f5,  104(r1)\n"   "stfd f4,   96(r1)\n"
80    "stfd f3,   88(r1)\n"   "stfd f2,   80(r1)\n"
81    "stfd f1,   72(r1)\n"
82    // Arguments to Compilation Callback:
83    // r3 - our lr (address of the call instruction in stub plus 4)
84    // r4 - stub's lr (address of instruction that called the stub plus 4)
85    "mr   r3, r0\n"
86    "lwz  r2, 208(r1)\n" // stub's frame
87    "lwz  r4, 8(r2)\n" // stub's lr
88    "bl _PPC32CompilationCallbackC\n"
89    "mtctr r3\n"
90    // Restore all int arg registers
91    "lwz r10, 204(r1)\n"    "lwz r9,  200(r1)\n"
92    "lwz r8,  196(r1)\n"    "lwz r7,  192(r1)\n"
93    "lwz r6,  188(r1)\n"    "lwz r5,  184(r1)\n"
94    "lwz r4,  180(r1)\n"    "lwz r3,  176(r1)\n"
95    // Restore all FP arg registers
96    "lfd f13, 168(r1)\n"    "lfd f12, 160(r1)\n"
97    "lfd f11, 152(r1)\n"    "lfd f10, 144(r1)\n"
98    "lfd f9,  136(r1)\n"    "lfd f8,  128(r1)\n"
99    "lfd f7,  120(r1)\n"    "lfd f6,  112(r1)\n"
100    "lfd f5,  104(r1)\n"    "lfd f4,   96(r1)\n"
101    "lfd f3,   88(r1)\n"    "lfd f2,   80(r1)\n"
102    "lfd f1,   72(r1)\n"
103    // Pop 3 frames off the stack and branch to target
104    "lwz  r1, 208(r1)\n"
105    "lwz  r2, 8(r1)\n"
106    "mtlr r2\n"
107    "bctr\n"
108    );
109#else
110void PPC32CompilationCallback() {
111  assert(0 && "This is not a power pc, you can't execute this!");
112  abort();
113}
114#endif
115
116extern "C" unsigned *PPC32CompilationCallbackC(unsigned *StubCallAddrPlus4,
117                                               unsigned *OrigCallAddrPlus4) {
118  // Adjust the pointer to the address of the call instruction in the stub
119  // emitted by emitFunctionStub, rather than the instruction after it.
120  unsigned *StubCallAddr = StubCallAddrPlus4 - 1;
121  unsigned *OrigCallAddr = OrigCallAddrPlus4 - 1;
122
123  void *Target = JITCompilerFunction(StubCallAddr);
124
125  // Check to see if *OrigCallAddr is a 'bl' instruction, and if we can rewrite
126  // it to branch directly to the destination.  If so, rewrite it so it does not
127  // need to go through the stub anymore.
128  unsigned OrigCallInst = *OrigCallAddr;
129  if ((OrigCallInst >> 26) == 18) {     // Direct call.
130    intptr_t Offset = ((intptr_t)Target - (intptr_t)OrigCallAddr) >> 2;
131
132    if (Offset >= -(1 << 23) && Offset < (1 << 23)) {   // In range?
133      // Clear the original target out.
134      OrigCallInst &= (63 << 26) | 3;
135      // Fill in the new target.
136      OrigCallInst |= (Offset & ((1 << 24)-1)) << 2;
137      // Replace the call.
138      *OrigCallAddr = OrigCallInst;
139    }
140  }
141
142  // Assert that we are coming from a stub that was created with our
143  // emitFunctionStub.
144  assert((*StubCallAddr >> 26) == 19 && "Call in stub is not indirect!");
145  StubCallAddr -= 6;
146
147  // Rewrite the stub with an unconditional branch to the target, for any users
148  // who took the address of the stub.
149  EmitBranchToAt(StubCallAddr, Target, false);
150
151  // Put the address of the target function to call and the address to return to
152  // after calling the target function in a place that is easy to get on the
153  // stack after we restore all regs.
154  return (unsigned *)Target;
155}
156
157
158
159TargetJITInfo::LazyResolverFn
160PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
161  JITCompilerFunction = Fn;
162  return PPC32CompilationCallback;
163}
164
165void *PPCJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
166  // If this is just a call to an external function, emit a branch instead of a
167  // call.  The code is the same except for one bit of the last instruction.
168  if (Fn != (void*)PPC32CompilationCallback) {
169    MCE.startFunctionStub(4*4);
170    void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
171    MCE.emitWordBE(0);
172    MCE.emitWordBE(0);
173    MCE.emitWordBE(0);
174    MCE.emitWordBE(0);
175    EmitBranchToAt(Addr, Fn, false);
176    return MCE.finishFunctionStub(0);
177  }
178
179  MCE.startFunctionStub(4*7);
180  MCE.emitWordBE(0x9421ffe0);     // stwu    r1,-32(r1)
181  MCE.emitWordBE(0x7d6802a6);     // mflr r11
182  MCE.emitWordBE(0x91610028);     // stw r11, 40(r1)
183  void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
184  MCE.emitWordBE(0);
185  MCE.emitWordBE(0);
186  MCE.emitWordBE(0);
187  MCE.emitWordBE(0);
188  EmitBranchToAt(Addr, Fn, true/*is call*/);
189  return MCE.finishFunctionStub(0);
190}
191
192
193void PPCJITInfo::relocate(void *Function, MachineRelocation *MR,
194                          unsigned NumRelocs, unsigned char* GOTBase) {
195  for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
196    unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
197    intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
198    switch ((PPC::RelocationType)MR->getRelocationType()) {
199    default: assert(0 && "Unknown relocation type!");
200    case PPC::reloc_pcrel_bx:
201      // PC-relative relocation for b and bl instructions.
202      ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
203      assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
204             "Relocation out of range!");
205      *RelocPos |= (ResultPtr & ((1 << 24)-1))  << 2;
206      break;
207    case PPC::reloc_absolute_ptr_high: // Pointer relocations.
208    case PPC::reloc_absolute_ptr_low:
209    case PPC::reloc_absolute_high:     // high bits of ref -> low 16 of instr
210    case PPC::reloc_absolute_low:      // low bits of ref  -> low 16 of instr
211      ResultPtr += MR->getConstantVal();
212
213      // If this is a high-part access, get the high-part.
214      if (MR->getRelocationType() == PPC::reloc_absolute_high ||
215          MR->getRelocationType() == PPC::reloc_absolute_ptr_high) {
216        // If the low part will have a carry (really a borrow) from the low
217        // 16-bits into the high 16, add a bit to borrow from.
218        if (((int)ResultPtr << 16) < 0)
219          ResultPtr += 1 << 16;
220        ResultPtr >>= 16;
221      }
222
223      // Do the addition then mask, so the addition does not overflow the 16-bit
224      // immediate section of the instruction.
225      unsigned LowBits  = (*RelocPos + ResultPtr) & 65535;
226      unsigned HighBits = *RelocPos & ~65535;
227      *RelocPos = LowBits | HighBits;  // Slam into low 16-bits
228      break;
229    }
230  }
231}
232
233void PPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
234  EmitBranchToAt(Old, New, false);
235}
236