131d157ae1ac2cd9c787dc3c1d28e64c682803844Jia Liu//===-- SparcInstrInfo.cpp - Sparc Instruction Information ----------------===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke// The LLVM Compiler Infrastructure 4e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke//===----------------------------------------------------------------------===// 9e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke// 107c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner// This file contains the Sparc implementation of the TargetInstrInfo class. 11e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke// 12e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke//===----------------------------------------------------------------------===// 13e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 147c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner#include "SparcInstrInfo.h" 157c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner#include "Sparc.h" 1659ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "SparcMachineFunctionInfo.h" 1759ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "SparcSubtarget.h" 18e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke#include "llvm/CodeGen/MachineInstrBuilder.h" 19db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner#include "llvm/CodeGen/MachineRegisterInfo.h" 20c25e7581b9b8088910da31702d4ca21c4734c6d7Torok Edwin#include "llvm/Support/ErrorHandling.h" 213e74d6fdd248e20a280f1dff3da9a6c689c2c4c3Evan Cheng#include "llvm/Support/TargetRegistry.h" 2259ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/ADT/STLExtras.h" 2359ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/ADT/SmallVector.h" 2422fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng 254db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#define GET_INSTRINFO_CTOR 2622fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng#include "SparcGenInstrInfo.inc" 2722fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng 281ddf475b6a3d748427546ab8f65a712c8eea3a0fChris Lattnerusing namespace llvm; 29e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 307c90f73a1b06040d971a3dd95a491031ae6238d5Chris LattnerSparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST) 314db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng : SparcGenInstrInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP), 32d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson RI(ST, *this), Subtarget(ST) { 33e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke} 34e785e531f4495068ee46cabd926939eec15a565aBrian Gaeke 355ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// isLoadFromStackSlot - If the specified machine instruction is a direct 365ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// load from a stack slot, return the virtual or physical register number of 375ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// the destination along with the FrameIndex of the loaded stack slot. If 385ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// not, return 0. This predicate must return 0 if the instruction has 395ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// any side effects other than loading from the stack slot. 40cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohmanunsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, 417c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner int &FrameIndex) const { 427c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner if (MI->getOpcode() == SP::LDri || 437c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner MI->getOpcode() == SP::LDFri || 447c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner MI->getOpcode() == SP::LDDFri) { 45d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isFI() && MI->getOperand(2).isImm() && 469a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(2).getImm() == 0) { 478aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(1).getIndex(); 485ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner return MI->getOperand(0).getReg(); 495ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner } 505ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner } 515ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner return 0; 525ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner} 535ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner 545ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// isStoreToStackSlot - If the specified machine instruction is a direct 555ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// store to a stack slot, return the virtual or physical register number of 565ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// the source reg along with the FrameIndex of the loaded stack slot. If 575ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// not, return 0. This predicate must return 0 if the instruction has 585ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner/// any side effects other than storing to the stack slot. 59cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohmanunsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI, 607c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner int &FrameIndex) const { 617c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner if (MI->getOpcode() == SP::STri || 627c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner MI->getOpcode() == SP::STFri || 637c90f73a1b06040d971a3dd95a491031ae6238d5Chris Lattner MI->getOpcode() == SP::STDFri) { 64d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(0).isFI() && MI->getOperand(1).isImm() && 659a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(1).getImm() == 0) { 668aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(0).getIndex(); 675ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner return MI->getOperand(2).getReg(); 685ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner } 695ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner } 705ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner return 0; 715ccc7225db0cb4d738045ade8e8c38d5345ac08aChris Lattner} 72e87146ace88464be4ea4f8869830642c40178f1fChris Lattner 73c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindarajustatic bool IsIntegerCC(unsigned CC) 74c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju{ 75c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return (CC <= SPCC::ICC_VC); 76c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju} 77c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 78c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 79c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindarajustatic SPCC::CondCodes GetOppositeBranchCondition(SPCC::CondCodes CC) 80c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju{ 81c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju switch(CC) { 82c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_NE: return SPCC::ICC_E; 83c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_E: return SPCC::ICC_NE; 84c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_G: return SPCC::ICC_LE; 85c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_LE: return SPCC::ICC_G; 86c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_GE: return SPCC::ICC_L; 87c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_L: return SPCC::ICC_GE; 88c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_GU: return SPCC::ICC_LEU; 89c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_LEU: return SPCC::ICC_GU; 90c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_CC: return SPCC::ICC_CS; 91c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_CS: return SPCC::ICC_CC; 92c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_POS: return SPCC::ICC_NEG; 93c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_NEG: return SPCC::ICC_POS; 94c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_VC: return SPCC::ICC_VS; 95c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::ICC_VS: return SPCC::ICC_VC; 96c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 97c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_U: return SPCC::FCC_O; 98c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_O: return SPCC::FCC_U; 99c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_G: return SPCC::FCC_LE; 100c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_LE: return SPCC::FCC_G; 101c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_UG: return SPCC::FCC_ULE; 102c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_ULE: return SPCC::FCC_UG; 103c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_L: return SPCC::FCC_GE; 104c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_GE: return SPCC::FCC_L; 105c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_UL: return SPCC::FCC_UGE; 106c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_UGE: return SPCC::FCC_UL; 107c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_LG: return SPCC::FCC_UE; 108c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_UE: return SPCC::FCC_LG; 109c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_NE: return SPCC::FCC_E; 110c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju case SPCC::FCC_E: return SPCC::FCC_NE; 111c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 112e4ad58272970ecd850d233862f40a72d15649639Benjamin Kramer llvm_unreachable("Invalid cond code"); 113c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju} 114c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 11555caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman GovindarajuMachineInstr * 11655caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman GovindarajuSparcInstrInfo::emitFrameIndexDebugValue(MachineFunction &MF, 11755caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju int FrameIx, 11855caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju uint64_t Offset, 11955caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju const MDNode *MDPtr, 12055caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju DebugLoc dl) const { 12155caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju MachineInstrBuilder MIB = BuildMI(MF, dl, get(SP::DBG_VALUE)) 12255caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju .addFrameIndex(FrameIx).addImm(0).addImm(Offset).addMetadata(MDPtr); 12355caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju return &*MIB; 12455caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju} 12555caf9c60a6593b232db80eb961cbffb6e15a724Venkatraman Govindaraju 126c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 127c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindarajubool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, 128c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MachineBasicBlock *&TBB, 129c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MachineBasicBlock *&FBB, 130c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju SmallVectorImpl<MachineOperand> &Cond, 131c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju bool AllowModify) const 132c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju{ 133c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 134c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MachineBasicBlock::iterator I = MBB.end(); 135c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MachineBasicBlock::iterator UnCondBrIter = MBB.end(); 136c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju while (I != MBB.begin()) { 137c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju --I; 138c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 139c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (I->isDebugValue()) 140c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju continue; 141c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 142c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju //When we see a non-terminator, we are done 143c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (!isUnpredicatedTerminator(I)) 144c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju break; 145c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 146c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju //Terminator is not a branch 1475a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng if (!I->isBranch()) 148c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return true; 149c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 150c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju //Handle Unconditional branches 151c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (I->getOpcode() == SP::BA) { 152c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju UnCondBrIter = I; 153c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 154c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (!AllowModify) { 155c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju TBB = I->getOperand(0).getMBB(); 156c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju continue; 157c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 158c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 159c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju while (llvm::next(I) != MBB.end()) 160c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju llvm::next(I)->eraseFromParent(); 161c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 162c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju Cond.clear(); 163c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju FBB = 0; 164c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 165c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) { 166c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju TBB = 0; 167c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju I->eraseFromParent(); 168c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju I = MBB.end(); 169c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju UnCondBrIter = MBB.end(); 170c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju continue; 171c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 172c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 173c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju TBB = I->getOperand(0).getMBB(); 174c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju continue; 175c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 176c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 177c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju unsigned Opcode = I->getOpcode(); 178c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (Opcode != SP::BCOND && Opcode != SP::FBCOND) 179c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return true; //Unknown Opcode 180c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 181c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju SPCC::CondCodes BranchCode = (SPCC::CondCodes)I->getOperand(1).getImm(); 182c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 183c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (Cond.empty()) { 184c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MachineBasicBlock *TargetBB = I->getOperand(0).getMBB(); 185c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (AllowModify && UnCondBrIter != MBB.end() && 186c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MBB.isLayoutSuccessor(TargetBB)) { 187c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 188c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju //Transform the code 189c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // 190c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // brCC L1 191c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // ba L2 192c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // L1: 193c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // .. 194c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // L2: 195c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // 196c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // into 197c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // 198c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // brnCC L2 199c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // L1: 200c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // ... 201c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // L2: 202c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju // 203c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju BranchCode = GetOppositeBranchCondition(BranchCode); 204c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MachineBasicBlock::iterator OldInst = I; 205c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(Opcode)) 206c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju .addMBB(UnCondBrIter->getOperand(0).getMBB()).addImm(BranchCode); 207c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(SP::BA)) 208c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju .addMBB(TargetBB); 20980b1ae92922202c197078038c4229045cb1e295fVenkatraman Govindaraju 210c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju OldInst->eraseFromParent(); 211c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju UnCondBrIter->eraseFromParent(); 212c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 213c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju UnCondBrIter = MBB.end(); 214c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju I = MBB.end(); 215c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju continue; 216c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 217c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju FBB = TBB; 218c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju TBB = I->getOperand(0).getMBB(); 219c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju Cond.push_back(MachineOperand::CreateImm(BranchCode)); 220c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju continue; 221c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 222c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju //FIXME: Handle subsequent conditional branches 223c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju //For now, we can't handle multiple conditional branches 224c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return true; 225c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 226c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return false; 227c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju} 228c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 2296ae3626a4fda14e6250ac8d8ff487efb8952cdf7Evan Chengunsigned 2306ae3626a4fda14e6250ac8d8ff487efb8952cdf7Evan ChengSparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, 2316ae3626a4fda14e6250ac8d8ff487efb8952cdf7Evan Cheng MachineBasicBlock *FBB, 2323bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings const SmallVectorImpl<MachineOperand> &Cond, 233c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju DebugLoc DL) const { 234c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 235c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju assert((Cond.size() == 1 || Cond.size() == 0) && 236c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju "Sparc branch conditions should have one component!"); 237c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 238c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (Cond.empty()) { 239c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju assert(!FBB && "Unconditional branch with multiple successors!"); 240c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB); 241c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return 1; 242c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 243c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 244c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju //Conditional branch 245c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju unsigned CC = Cond[0].getImm(); 246c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 247c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (IsIntegerCC(CC)) 248c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); 249c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju else 250c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC); 251c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (!FBB) 252c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return 1; 253c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 254c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju BuildMI(&MBB, DL, get(SP::BA)).addMBB(FBB); 255c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return 2; 256c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju} 257c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 258c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindarajuunsigned SparcInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const 259c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju{ 260c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju MachineBasicBlock::iterator I = MBB.end(); 261c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju unsigned Count = 0; 262c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju while (I != MBB.begin()) { 263c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju --I; 264c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 265c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (I->isDebugValue()) 266c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju continue; 267c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 268c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju if (I->getOpcode() != SP::BA 269c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju && I->getOpcode() != SP::BCOND 270c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju && I->getOpcode() != SP::FBCOND) 271c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju break; // Not a branch 272c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju 273c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju I->eraseFromParent(); 274c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju I = MBB.end(); 275c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju ++Count; 276c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju } 277c1a62834a2ad33a80ca2b1f3a549f4f7806cd320Venkatraman Govindaraju return Count; 2783d7d39ab1549f5ab7a929ec18a3e6481862cf247Rafael Espindola} 279d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 2808e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesenvoid SparcInstrInfo::copyPhysReg(MachineBasicBlock &MBB, 2818e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen MachineBasicBlock::iterator I, DebugLoc DL, 2828e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen unsigned DestReg, unsigned SrcReg, 2838e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen bool KillSrc) const { 2848e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen if (SP::IntRegsRegClass.contains(DestReg, SrcReg)) 2858e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0) 2868e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen .addReg(SrcReg, getKillRegState(KillSrc)); 2878e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen else if (SP::FPRegsRegClass.contains(DestReg, SrcReg)) 2888e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen BuildMI(MBB, I, DL, get(SP::FMOVS), DestReg) 2898e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen .addReg(SrcReg, getKillRegState(KillSrc)); 2908e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen else if (SP::DFPRegsRegClass.contains(DestReg, SrcReg)) 2918e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen BuildMI(MBB, I, DL, get(Subtarget.isV9() ? SP::FMOVD : SP::FpMOVD), DestReg) 2928e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen .addReg(SrcReg, getKillRegState(KillSrc)); 293d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson else 2948e18a1a5cf4423dba9b8c53f2699299c514a9dc2Jakob Stoklund Olesen llvm_unreachable("Impossible reg-to-reg copy"); 295d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson} 296f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 297f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid SparcInstrInfo:: 298f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonstoreRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 299f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned SrcReg, bool isKill, int FI, 300746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 301746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 302c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 303d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (I != MBB.end()) DL = I->getDebugLoc(); 304d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling 305f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // On the order of operands here: think "[FrameIdx + 0] = SrcReg". 306c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper if (RC == &SP::IntRegsRegClass) 307d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, I, DL, get(SP::STri)).addFrameIndex(FI).addImm(0) 308587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)); 309c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper else if (RC == &SP::FPRegsRegClass) 310d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, I, DL, get(SP::STFri)).addFrameIndex(FI).addImm(0) 311587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)); 312c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper else if (RC == &SP::DFPRegsRegClass) 313d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, I, DL, get(SP::STDFri)).addFrameIndex(FI).addImm(0) 314587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)); 315f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson else 316c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Can't store this register to stack slot"); 317f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 318f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 319f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid SparcInstrInfo:: 320f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonloadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 321f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned DestReg, int FI, 322746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 323746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 324c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 325d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (I != MBB.end()) DL = I->getDebugLoc(); 326d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling 327c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper if (RC == &SP::IntRegsRegClass) 328d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, I, DL, get(SP::LDri), DestReg).addFrameIndex(FI).addImm(0); 329c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper else if (RC == &SP::FPRegsRegClass) 330d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, I, DL, get(SP::LDFri), DestReg).addFrameIndex(FI).addImm(0); 331c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper else if (RC == &SP::DFPRegsRegClass) 332d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, I, DL, get(SP::LDDFri), DestReg).addFrameIndex(FI).addImm(0); 333f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson else 334c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Can't load this register from stack slot"); 335f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 336f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 337db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattnerunsigned SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const 338db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner{ 339db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner SparcMachineFunctionInfo *SparcFI = MF->getInfo<SparcMachineFunctionInfo>(); 340db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner unsigned GlobalBaseReg = SparcFI->getGlobalBaseReg(); 341db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner if (GlobalBaseReg != 0) 342db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner return GlobalBaseReg; 343db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner 344db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner // Insert the set of GlobalBaseReg into the first MBB of the function 345db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner MachineBasicBlock &FirstMBB = MF->front(); 346db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner MachineBasicBlock::iterator MBBI = FirstMBB.begin(); 347db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner MachineRegisterInfo &RegInfo = MF->getRegInfo(); 348db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner 349db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner GlobalBaseReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); 350db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner 351db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner 352c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc dl; 353db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner 354db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner BuildMI(FirstMBB, MBBI, dl, get(SP::GETPCX), GlobalBaseReg); 355db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner SparcFI->setGlobalBaseReg(GlobalBaseReg); 356db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner return GlobalBaseReg; 357db486a6d5311944f61b92db9f6074944dbbdb242Chris Lattner} 358