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07-Apr-2009 |
Johnnie Birch <johnnie.l.birch.jr@intel.com> |
This is a contribution of x86-atom targeted assembly for the fast byte-code interpreter engine. This is an initial contribution with minimal optimizations that target the Intel ATOM processor. We expect to continuously improve this code. It is expected that there will be a discussion on the potential merge of this code and similar efforts (i.e. the mterp/x86 directory first included with cupcake). While this code is intended to target ATOM and not a generic X-86 processor, we were able to show the following improvements over the c-portable interpreter using the simulator build:
Build: TARGET_SIMULATOR: true
TARGET_BUILD_TYPE: release
TARGET_PRODUCT: sim
Environment: Intel(R) Core(TM)2 Quad CPU Q9550 @ 2.83GHz
PI = Portable Interpreter
IA = Fast IA Interpreter
Embedded CaffeineMark: (IA-PI)/PI: Average of 70% improvement on overall score
SPECjbb2000*: (IA-PI)/PI: Average of 37% improvement on raw score
SPECjvm98*: (PI/IA) Speedup: Mtrt: 1.2; Jess: 1.34; Compress: 1.57; Db: 1.46; Jack: 1.28
* SPECjbb2000 - 1 warehouse. Noncompliant - modified to run on Dalvik
* SPECjvm98 - Noncompliant - modified to run on Dalivk
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