1/* 2 * This file was generated automatically by gen-mterp.py for 'armv7-a'. 3 * 4 * --> DO NOT EDIT <-- 5 */ 6 7/* File: c/header.c */ 8/* 9 * Copyright (C) 2008 The Android Open Source Project 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); 12 * you may not use this file except in compliance with the License. 13 * You may obtain a copy of the License at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an "AS IS" BASIS, 19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 */ 23 24/* common includes */ 25#include "Dalvik.h" 26#include "interp/InterpDefs.h" 27#include "mterp/Mterp.h" 28#include <math.h> // needed for fmod, fmodf 29#include "mterp/common/FindInterface.h" 30 31/* 32 * Configuration defines. These affect the C implementations, i.e. the 33 * portable interpreter(s) and C stubs. 34 * 35 * Some defines are controlled by the Makefile, e.g.: 36 * WITH_PROFILER 37 * WITH_DEBUGGER 38 * WITH_INSTR_CHECKS 39 * WITH_TRACKREF_CHECKS 40 * EASY_GDB 41 * NDEBUG 42 * 43 * If THREADED_INTERP is not defined, we use a classic "while true / switch" 44 * interpreter. If it is defined, then the tail end of each instruction 45 * handler fetches the next instruction and jumps directly to the handler. 46 * This increases the size of the "Std" interpreter by about 10%, but 47 * provides a speedup of about the same magnitude. 48 * 49 * There's a "hybrid" approach that uses a goto table instead of a switch 50 * statement, avoiding the "is the opcode in range" tests required for switch. 51 * The performance is close to the threaded version, and without the 10% 52 * size increase, but the benchmark results are off enough that it's not 53 * worth adding as a third option. 54 */ 55#define THREADED_INTERP /* threaded vs. while-loop interpreter */ 56 57#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */ 58# define CHECK_BRANCH_OFFSETS 59# define CHECK_REGISTER_INDICES 60#endif 61 62/* 63 * ARM EABI requires 64-bit alignment for access to 64-bit data types. We 64 * can't just use pointers to copy 64-bit values out of our interpreted 65 * register set, because gcc will generate ldrd/strd. 66 * 67 * The __UNION version copies data in and out of a union. The __MEMCPY 68 * version uses a memcpy() call to do the transfer; gcc is smart enough to 69 * not actually call memcpy(). The __UNION version is very bad on ARM; 70 * it only uses one more instruction than __MEMCPY, but for some reason 71 * gcc thinks it needs separate storage for every instance of the union. 72 * On top of that, it feels the need to zero them out at the start of the 73 * method. Net result is we zero out ~700 bytes of stack space at the top 74 * of the interpreter using ARM STM instructions. 75 */ 76#if defined(__ARM_EABI__) 77//# define NO_UNALIGN_64__UNION 78# define NO_UNALIGN_64__MEMCPY 79#endif 80 81//#define LOG_INSTR /* verbose debugging */ 82/* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */ 83 84/* 85 * Keep a tally of accesses to fields. Currently only works if full DEX 86 * optimization is disabled. 87 */ 88#ifdef PROFILE_FIELD_ACCESS 89# define UPDATE_FIELD_GET(_field) { (_field)->gets++; } 90# define UPDATE_FIELD_PUT(_field) { (_field)->puts++; } 91#else 92# define UPDATE_FIELD_GET(_field) ((void)0) 93# define UPDATE_FIELD_PUT(_field) ((void)0) 94#endif 95 96/* 97 * Export another copy of the PC on every instruction; this is largely 98 * redundant with EXPORT_PC and the debugger code. This value can be 99 * compared against what we have stored on the stack with EXPORT_PC to 100 * help ensure that we aren't missing any export calls. 101 */ 102#if WITH_EXTRA_GC_CHECKS > 1 103# define EXPORT_EXTRA_PC() (self->currentPc2 = pc) 104#else 105# define EXPORT_EXTRA_PC() 106#endif 107 108/* 109 * Adjust the program counter. "_offset" is a signed int, in 16-bit units. 110 * 111 * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns". 112 * 113 * We don't advance the program counter until we finish an instruction or 114 * branch, because we do want to have to unroll the PC if there's an 115 * exception. 116 */ 117#ifdef CHECK_BRANCH_OFFSETS 118# define ADJUST_PC(_offset) do { \ 119 int myoff = _offset; /* deref only once */ \ 120 if (pc + myoff < curMethod->insns || \ 121 pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \ 122 { \ 123 char* desc; \ 124 desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \ 125 LOGE("Invalid branch %d at 0x%04x in %s.%s %s\n", \ 126 myoff, (int) (pc - curMethod->insns), \ 127 curMethod->clazz->descriptor, curMethod->name, desc); \ 128 free(desc); \ 129 dvmAbort(); \ 130 } \ 131 pc += myoff; \ 132 EXPORT_EXTRA_PC(); \ 133 } while (false) 134#else 135# define ADJUST_PC(_offset) do { \ 136 pc += _offset; \ 137 EXPORT_EXTRA_PC(); \ 138 } while (false) 139#endif 140 141/* 142 * If enabled, log instructions as we execute them. 143 */ 144#ifdef LOG_INSTR 145# define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__) 146# define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__) 147# define ILOG(_level, ...) do { \ 148 char debugStrBuf[128]; \ 149 snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \ 150 if (curMethod != NULL) \ 151 LOG(_level, LOG_TAG"i", "%-2d|%04x%s\n", \ 152 self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \ 153 else \ 154 LOG(_level, LOG_TAG"i", "%-2d|####%s\n", \ 155 self->threadId, debugStrBuf); \ 156 } while(false) 157void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly); 158# define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly) 159static const char kSpacing[] = " "; 160#else 161# define ILOGD(...) ((void)0) 162# define ILOGV(...) ((void)0) 163# define DUMP_REGS(_meth, _frame, _inOnly) ((void)0) 164#endif 165 166/* get a long from an array of u4 */ 167static inline s8 getLongFromArray(const u4* ptr, int idx) 168{ 169#if defined(NO_UNALIGN_64__UNION) 170 union { s8 ll; u4 parts[2]; } conv; 171 172 ptr += idx; 173 conv.parts[0] = ptr[0]; 174 conv.parts[1] = ptr[1]; 175 return conv.ll; 176#elif defined(NO_UNALIGN_64__MEMCPY) 177 s8 val; 178 memcpy(&val, &ptr[idx], 8); 179 return val; 180#else 181 return *((s8*) &ptr[idx]); 182#endif 183} 184 185/* store a long into an array of u4 */ 186static inline void putLongToArray(u4* ptr, int idx, s8 val) 187{ 188#if defined(NO_UNALIGN_64__UNION) 189 union { s8 ll; u4 parts[2]; } conv; 190 191 ptr += idx; 192 conv.ll = val; 193 ptr[0] = conv.parts[0]; 194 ptr[1] = conv.parts[1]; 195#elif defined(NO_UNALIGN_64__MEMCPY) 196 memcpy(&ptr[idx], &val, 8); 197#else 198 *((s8*) &ptr[idx]) = val; 199#endif 200} 201 202/* get a double from an array of u4 */ 203static inline double getDoubleFromArray(const u4* ptr, int idx) 204{ 205#if defined(NO_UNALIGN_64__UNION) 206 union { double d; u4 parts[2]; } conv; 207 208 ptr += idx; 209 conv.parts[0] = ptr[0]; 210 conv.parts[1] = ptr[1]; 211 return conv.d; 212#elif defined(NO_UNALIGN_64__MEMCPY) 213 double dval; 214 memcpy(&dval, &ptr[idx], 8); 215 return dval; 216#else 217 return *((double*) &ptr[idx]); 218#endif 219} 220 221/* store a double into an array of u4 */ 222static inline void putDoubleToArray(u4* ptr, int idx, double dval) 223{ 224#if defined(NO_UNALIGN_64__UNION) 225 union { double d; u4 parts[2]; } conv; 226 227 ptr += idx; 228 conv.d = dval; 229 ptr[0] = conv.parts[0]; 230 ptr[1] = conv.parts[1]; 231#elif defined(NO_UNALIGN_64__MEMCPY) 232 memcpy(&ptr[idx], &dval, 8); 233#else 234 *((double*) &ptr[idx]) = dval; 235#endif 236} 237 238/* 239 * If enabled, validate the register number on every access. Otherwise, 240 * just do an array access. 241 * 242 * Assumes the existence of "u4* fp". 243 * 244 * "_idx" may be referenced more than once. 245 */ 246#ifdef CHECK_REGISTER_INDICES 247# define GET_REGISTER(_idx) \ 248 ( (_idx) < curMethod->registersSize ? \ 249 (fp[(_idx)]) : (assert(!"bad reg"),1969) ) 250# define SET_REGISTER(_idx, _val) \ 251 ( (_idx) < curMethod->registersSize ? \ 252 (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) ) 253# define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx)) 254# define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 255# define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx)) 256# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 257# define GET_REGISTER_WIDE(_idx) \ 258 ( (_idx) < curMethod->registersSize-1 ? \ 259 getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) ) 260# define SET_REGISTER_WIDE(_idx, _val) \ 261 ( (_idx) < curMethod->registersSize-1 ? \ 262 putLongToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969) ) 263# define GET_REGISTER_FLOAT(_idx) \ 264 ( (_idx) < curMethod->registersSize ? \ 265 (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) ) 266# define SET_REGISTER_FLOAT(_idx, _val) \ 267 ( (_idx) < curMethod->registersSize ? \ 268 (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) ) 269# define GET_REGISTER_DOUBLE(_idx) \ 270 ( (_idx) < curMethod->registersSize-1 ? \ 271 getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) ) 272# define SET_REGISTER_DOUBLE(_idx, _val) \ 273 ( (_idx) < curMethod->registersSize-1 ? \ 274 putDoubleToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969.0) ) 275#else 276# define GET_REGISTER(_idx) (fp[(_idx)]) 277# define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val)) 278# define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)]) 279# define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val)) 280# define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx)) 281# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 282# define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx)) 283# define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val)) 284# define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)])) 285# define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val)) 286# define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx)) 287# define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val)) 288#endif 289 290/* 291 * Get 16 bits from the specified offset of the program counter. We always 292 * want to load 16 bits at a time from the instruction stream -- it's more 293 * efficient than 8 and won't have the alignment problems that 32 might. 294 * 295 * Assumes existence of "const u2* pc". 296 */ 297#define FETCH(_offset) (pc[(_offset)]) 298 299/* 300 * Extract instruction byte from 16-bit fetch (_inst is a u2). 301 */ 302#define INST_INST(_inst) ((_inst) & 0xff) 303 304/* 305 * Replace the opcode (used when handling breakpoints). _opcode is a u1. 306 */ 307#define INST_REPLACE_OP(_inst, _opcode) (((_inst) & 0xff00) | _opcode) 308 309/* 310 * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2). 311 */ 312#define INST_A(_inst) (((_inst) >> 8) & 0x0f) 313#define INST_B(_inst) ((_inst) >> 12) 314 315/* 316 * Get the 8-bit "vAA" 8-bit register index from the instruction word. 317 * (_inst is u2) 318 */ 319#define INST_AA(_inst) ((_inst) >> 8) 320 321/* 322 * The current PC must be available to Throwable constructors, e.g. 323 * those created by dvmThrowException(), so that the exception stack 324 * trace can be generated correctly. If we don't do this, the offset 325 * within the current method won't be shown correctly. See the notes 326 * in Exception.c. 327 * 328 * This is also used to determine the address for precise GC. 329 * 330 * Assumes existence of "u4* fp" and "const u2* pc". 331 */ 332#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc) 333 334/* 335 * Determine if we need to switch to a different interpreter. "_current" 336 * is either INTERP_STD or INTERP_DBG. It should be fixed for a given 337 * interpreter generation file, which should remove the outer conditional 338 * from the following. 339 * 340 * If we're building without debug and profiling support, we never switch. 341 */ 342#if defined(WITH_PROFILER) || defined(WITH_DEBUGGER) 343#if defined(WITH_JIT) 344# define NEED_INTERP_SWITCH(_current) ( \ 345 (_current == INTERP_STD) ? \ 346 dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() ) 347#else 348# define NEED_INTERP_SWITCH(_current) ( \ 349 (_current == INTERP_STD) ? \ 350 dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() ) 351#endif 352#else 353# define NEED_INTERP_SWITCH(_current) (false) 354#endif 355 356/* 357 * Check to see if "obj" is NULL. If so, throw an exception. Assumes the 358 * pc has already been exported to the stack. 359 * 360 * Perform additional checks on debug builds. 361 * 362 * Use this to check for NULL when the instruction handler calls into 363 * something that could throw an exception (so we have already called 364 * EXPORT_PC at the top). 365 */ 366static inline bool checkForNull(Object* obj) 367{ 368 if (obj == NULL) { 369 dvmThrowException("Ljava/lang/NullPointerException;", NULL); 370 return false; 371 } 372#ifdef WITH_EXTRA_OBJECT_VALIDATION 373 if (!dvmIsValidObject(obj)) { 374 LOGE("Invalid object %p\n", obj); 375 dvmAbort(); 376 } 377#endif 378#ifndef NDEBUG 379 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) { 380 /* probable heap corruption */ 381 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj); 382 dvmAbort(); 383 } 384#endif 385 return true; 386} 387 388/* 389 * Check to see if "obj" is NULL. If so, export the PC into the stack 390 * frame and throw an exception. 391 * 392 * Perform additional checks on debug builds. 393 * 394 * Use this to check for NULL when the instruction handler doesn't do 395 * anything else that can throw an exception. 396 */ 397static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc) 398{ 399 if (obj == NULL) { 400 EXPORT_PC(); 401 dvmThrowException("Ljava/lang/NullPointerException;", NULL); 402 return false; 403 } 404#ifdef WITH_EXTRA_OBJECT_VALIDATION 405 if (!dvmIsValidObject(obj)) { 406 LOGE("Invalid object %p\n", obj); 407 dvmAbort(); 408 } 409#endif 410#ifndef NDEBUG 411 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) { 412 /* probable heap corruption */ 413 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj); 414 dvmAbort(); 415 } 416#endif 417 return true; 418} 419 420/* File: cstubs/stubdefs.c */ 421/* this is a standard (no debug support) interpreter */ 422#define INTERP_TYPE INTERP_STD 423#define CHECK_DEBUG_AND_PROF() ((void)0) 424# define CHECK_TRACKED_REFS() ((void)0) 425#if defined(WITH_JIT) 426#define CHECK_JIT() (0) 427#define ABORT_JIT_TSELECT() ((void)0) 428#endif 429 430/* 431 * In the C mterp stubs, "goto" is a function call followed immediately 432 * by a return. 433 */ 434 435#define GOTO_TARGET_DECL(_target, ...) \ 436 void dvmMterp_##_target(MterpGlue* glue, ## __VA_ARGS__); 437 438#define GOTO_TARGET(_target, ...) \ 439 void dvmMterp_##_target(MterpGlue* glue, ## __VA_ARGS__) { \ 440 u2 ref, vsrc1, vsrc2, vdst; \ 441 u2 inst = FETCH(0); \ 442 const Method* methodToCall; \ 443 StackSaveArea* debugSaveArea; 444 445#define GOTO_TARGET_END } 446 447/* 448 * Redefine what used to be local variable accesses into MterpGlue struct 449 * references. (These are undefined down in "footer.c".) 450 */ 451#define retval glue->retval 452#define pc glue->pc 453#define fp glue->fp 454#define curMethod glue->method 455#define methodClassDex glue->methodClassDex 456#define self glue->self 457#define debugTrackedRefStart glue->debugTrackedRefStart 458 459/* ugh */ 460#define STUB_HACK(x) x 461 462 463/* 464 * Opcode handler framing macros. Here, each opcode is a separate function 465 * that takes a "glue" argument and returns void. We can't declare 466 * these "static" because they may be called from an assembly stub. 467 */ 468#define HANDLE_OPCODE(_op) \ 469 void dvmMterp_##_op(MterpGlue* glue) { \ 470 u2 ref, vsrc1, vsrc2, vdst; \ 471 u2 inst = FETCH(0); 472 473#define OP_END } 474 475/* 476 * Like the "portable" FINISH, but don't reload "inst", and return to caller 477 * when done. 478 */ 479#define FINISH(_offset) { \ 480 ADJUST_PC(_offset); \ 481 CHECK_DEBUG_AND_PROF(); \ 482 CHECK_TRACKED_REFS(); \ 483 return; \ 484 } 485 486 487/* 488 * The "goto label" statements turn into function calls followed by 489 * return statements. Some of the functions take arguments, which in the 490 * portable interpreter are handled by assigning values to globals. 491 */ 492 493#define GOTO_exceptionThrown() \ 494 do { \ 495 dvmMterp_exceptionThrown(glue); \ 496 return; \ 497 } while(false) 498 499#define GOTO_returnFromMethod() \ 500 do { \ 501 dvmMterp_returnFromMethod(glue); \ 502 return; \ 503 } while(false) 504 505#define GOTO_invoke(_target, _methodCallRange) \ 506 do { \ 507 dvmMterp_##_target(glue, _methodCallRange); \ 508 return; \ 509 } while(false) 510 511#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \ 512 do { \ 513 dvmMterp_invokeMethod(glue, _methodCallRange, _methodToCall, \ 514 _vsrc1, _vdst); \ 515 return; \ 516 } while(false) 517 518/* 519 * As a special case, "goto bail" turns into a longjmp. Use "bail_switch" 520 * if we need to switch to the other interpreter upon our return. 521 */ 522#define GOTO_bail() \ 523 dvmMterpStdBail(glue, false); 524#define GOTO_bail_switch() \ 525 dvmMterpStdBail(glue, true); 526 527/* 528 * Periodically check for thread suspension. 529 * 530 * While we're at it, see if a debugger has attached or the profiler has 531 * started. If so, switch to a different "goto" table. 532 */ 533#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \ 534 if (dvmCheckSuspendQuick(self)) { \ 535 EXPORT_PC(); /* need for precise GC */ \ 536 dvmCheckSuspendPending(self); \ 537 } \ 538 if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \ 539 ADJUST_PC(_pcadj); \ 540 glue->entryPoint = _entryPoint; \ 541 LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \ 542 self->threadId, (_entryPoint), (_pcadj)); \ 543 GOTO_bail_switch(); \ 544 } \ 545 } 546 547/* File: c/opcommon.c */ 548/* forward declarations of goto targets */ 549GOTO_TARGET_DECL(filledNewArray, bool methodCallRange); 550GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange); 551GOTO_TARGET_DECL(invokeSuper, bool methodCallRange); 552GOTO_TARGET_DECL(invokeInterface, bool methodCallRange); 553GOTO_TARGET_DECL(invokeDirect, bool methodCallRange); 554GOTO_TARGET_DECL(invokeStatic, bool methodCallRange); 555GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange); 556GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange); 557GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall, 558 u2 count, u2 regs); 559GOTO_TARGET_DECL(returnFromMethod); 560GOTO_TARGET_DECL(exceptionThrown); 561 562/* 563 * =========================================================================== 564 * 565 * What follows are opcode definitions shared between multiple opcodes with 566 * minor substitutions handled by the C pre-processor. These should probably 567 * use the mterp substitution mechanism instead, with the code here moved 568 * into common fragment files (like the asm "binop.S"), although it's hard 569 * to give up the C preprocessor in favor of the much simpler text subst. 570 * 571 * =========================================================================== 572 */ 573 574#define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \ 575 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 576 vdst = INST_A(inst); \ 577 vsrc1 = INST_B(inst); \ 578 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 579 SET_REGISTER##_totype(vdst, \ 580 GET_REGISTER##_fromtype(vsrc1)); \ 581 FINISH(1); 582 583#define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \ 584 _tovtype, _tortype) \ 585 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 586 { \ 587 /* spec defines specific handling for +/- inf and NaN values */ \ 588 _fromvtype val; \ 589 _tovtype intMin, intMax, result; \ 590 vdst = INST_A(inst); \ 591 vsrc1 = INST_B(inst); \ 592 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 593 val = GET_REGISTER##_fromrtype(vsrc1); \ 594 intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \ 595 intMax = ~intMin; \ 596 result = (_tovtype) val; \ 597 if (val >= intMax) /* +inf */ \ 598 result = intMax; \ 599 else if (val <= intMin) /* -inf */ \ 600 result = intMin; \ 601 else if (val != val) /* NaN */ \ 602 result = 0; \ 603 else \ 604 result = (_tovtype) val; \ 605 SET_REGISTER##_tortype(vdst, result); \ 606 } \ 607 FINISH(1); 608 609#define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \ 610 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 611 vdst = INST_A(inst); \ 612 vsrc1 = INST_B(inst); \ 613 ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \ 614 SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \ 615 FINISH(1); 616 617/* NOTE: the comparison result is always a signed 4-byte integer */ 618#define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \ 619 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 620 { \ 621 int result; \ 622 u2 regs; \ 623 _varType val1, val2; \ 624 vdst = INST_AA(inst); \ 625 regs = FETCH(1); \ 626 vsrc1 = regs & 0xff; \ 627 vsrc2 = regs >> 8; \ 628 ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 629 val1 = GET_REGISTER##_type(vsrc1); \ 630 val2 = GET_REGISTER##_type(vsrc2); \ 631 if (val1 == val2) \ 632 result = 0; \ 633 else if (val1 < val2) \ 634 result = -1; \ 635 else if (val1 > val2) \ 636 result = 1; \ 637 else \ 638 result = (_nanVal); \ 639 ILOGV("+ result=%d\n", result); \ 640 SET_REGISTER(vdst, result); \ 641 } \ 642 FINISH(2); 643 644#define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \ 645 HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \ 646 vsrc1 = INST_A(inst); \ 647 vsrc2 = INST_B(inst); \ 648 if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \ 649 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 650 ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \ 651 branchOffset); \ 652 ILOGV("> branch taken"); \ 653 if (branchOffset < 0) \ 654 PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \ 655 FINISH(branchOffset); \ 656 } else { \ 657 ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \ 658 FINISH(2); \ 659 } 660 661#define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \ 662 HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \ 663 vsrc1 = INST_AA(inst); \ 664 if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \ 665 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 666 ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \ 667 ILOGV("> branch taken"); \ 668 if (branchOffset < 0) \ 669 PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \ 670 FINISH(branchOffset); \ 671 } else { \ 672 ILOGV("|if-%s v%d,-", (_opname), vsrc1); \ 673 FINISH(2); \ 674 } 675 676#define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \ 677 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 678 vdst = INST_A(inst); \ 679 vsrc1 = INST_B(inst); \ 680 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 681 SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \ 682 FINISH(1); 683 684#define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \ 685 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 686 { \ 687 u2 srcRegs; \ 688 vdst = INST_AA(inst); \ 689 srcRegs = FETCH(1); \ 690 vsrc1 = srcRegs & 0xff; \ 691 vsrc2 = srcRegs >> 8; \ 692 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \ 693 if (_chkdiv != 0) { \ 694 s4 firstVal, secondVal, result; \ 695 firstVal = GET_REGISTER(vsrc1); \ 696 secondVal = GET_REGISTER(vsrc2); \ 697 if (secondVal == 0) { \ 698 EXPORT_PC(); \ 699 dvmThrowException("Ljava/lang/ArithmeticException;", \ 700 "divide by zero"); \ 701 GOTO_exceptionThrown(); \ 702 } \ 703 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \ 704 if (_chkdiv == 1) \ 705 result = firstVal; /* division */ \ 706 else \ 707 result = 0; /* remainder */ \ 708 } else { \ 709 result = firstVal _op secondVal; \ 710 } \ 711 SET_REGISTER(vdst, result); \ 712 } else { \ 713 /* non-div/rem case */ \ 714 SET_REGISTER(vdst, \ 715 (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \ 716 } \ 717 } \ 718 FINISH(2); 719 720#define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \ 721 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 722 { \ 723 u2 srcRegs; \ 724 vdst = INST_AA(inst); \ 725 srcRegs = FETCH(1); \ 726 vsrc1 = srcRegs & 0xff; \ 727 vsrc2 = srcRegs >> 8; \ 728 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \ 729 SET_REGISTER(vdst, \ 730 _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \ 731 } \ 732 FINISH(2); 733 734#define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \ 735 HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \ 736 vdst = INST_A(inst); \ 737 vsrc1 = INST_B(inst); \ 738 vsrc2 = FETCH(1); \ 739 ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \ 740 (_opname), vdst, vsrc1, vsrc2); \ 741 if (_chkdiv != 0) { \ 742 s4 firstVal, result; \ 743 firstVal = GET_REGISTER(vsrc1); \ 744 if ((s2) vsrc2 == 0) { \ 745 EXPORT_PC(); \ 746 dvmThrowException("Ljava/lang/ArithmeticException;", \ 747 "divide by zero"); \ 748 GOTO_exceptionThrown(); \ 749 } \ 750 if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \ 751 /* won't generate /lit16 instr for this; check anyway */ \ 752 if (_chkdiv == 1) \ 753 result = firstVal; /* division */ \ 754 else \ 755 result = 0; /* remainder */ \ 756 } else { \ 757 result = firstVal _op (s2) vsrc2; \ 758 } \ 759 SET_REGISTER(vdst, result); \ 760 } else { \ 761 /* non-div/rem case */ \ 762 SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \ 763 } \ 764 FINISH(2); 765 766#define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \ 767 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \ 768 { \ 769 u2 litInfo; \ 770 vdst = INST_AA(inst); \ 771 litInfo = FETCH(1); \ 772 vsrc1 = litInfo & 0xff; \ 773 vsrc2 = litInfo >> 8; /* constant */ \ 774 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \ 775 (_opname), vdst, vsrc1, vsrc2); \ 776 if (_chkdiv != 0) { \ 777 s4 firstVal, result; \ 778 firstVal = GET_REGISTER(vsrc1); \ 779 if ((s1) vsrc2 == 0) { \ 780 EXPORT_PC(); \ 781 dvmThrowException("Ljava/lang/ArithmeticException;", \ 782 "divide by zero"); \ 783 GOTO_exceptionThrown(); \ 784 } \ 785 if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \ 786 if (_chkdiv == 1) \ 787 result = firstVal; /* division */ \ 788 else \ 789 result = 0; /* remainder */ \ 790 } else { \ 791 result = firstVal _op ((s1) vsrc2); \ 792 } \ 793 SET_REGISTER(vdst, result); \ 794 } else { \ 795 SET_REGISTER(vdst, \ 796 (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \ 797 } \ 798 } \ 799 FINISH(2); 800 801#define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \ 802 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \ 803 { \ 804 u2 litInfo; \ 805 vdst = INST_AA(inst); \ 806 litInfo = FETCH(1); \ 807 vsrc1 = litInfo & 0xff; \ 808 vsrc2 = litInfo >> 8; /* constant */ \ 809 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \ 810 (_opname), vdst, vsrc1, vsrc2); \ 811 SET_REGISTER(vdst, \ 812 _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \ 813 } \ 814 FINISH(2); 815 816#define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \ 817 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 818 vdst = INST_A(inst); \ 819 vsrc1 = INST_B(inst); \ 820 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 821 if (_chkdiv != 0) { \ 822 s4 firstVal, secondVal, result; \ 823 firstVal = GET_REGISTER(vdst); \ 824 secondVal = GET_REGISTER(vsrc1); \ 825 if (secondVal == 0) { \ 826 EXPORT_PC(); \ 827 dvmThrowException("Ljava/lang/ArithmeticException;", \ 828 "divide by zero"); \ 829 GOTO_exceptionThrown(); \ 830 } \ 831 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \ 832 if (_chkdiv == 1) \ 833 result = firstVal; /* division */ \ 834 else \ 835 result = 0; /* remainder */ \ 836 } else { \ 837 result = firstVal _op secondVal; \ 838 } \ 839 SET_REGISTER(vdst, result); \ 840 } else { \ 841 SET_REGISTER(vdst, \ 842 (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \ 843 } \ 844 FINISH(1); 845 846#define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \ 847 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 848 vdst = INST_A(inst); \ 849 vsrc1 = INST_B(inst); \ 850 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 851 SET_REGISTER(vdst, \ 852 _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \ 853 FINISH(1); 854 855#define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \ 856 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 857 { \ 858 u2 srcRegs; \ 859 vdst = INST_AA(inst); \ 860 srcRegs = FETCH(1); \ 861 vsrc1 = srcRegs & 0xff; \ 862 vsrc2 = srcRegs >> 8; \ 863 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 864 if (_chkdiv != 0) { \ 865 s8 firstVal, secondVal, result; \ 866 firstVal = GET_REGISTER_WIDE(vsrc1); \ 867 secondVal = GET_REGISTER_WIDE(vsrc2); \ 868 if (secondVal == 0LL) { \ 869 EXPORT_PC(); \ 870 dvmThrowException("Ljava/lang/ArithmeticException;", \ 871 "divide by zero"); \ 872 GOTO_exceptionThrown(); \ 873 } \ 874 if ((u8)firstVal == 0x8000000000000000ULL && \ 875 secondVal == -1LL) \ 876 { \ 877 if (_chkdiv == 1) \ 878 result = firstVal; /* division */ \ 879 else \ 880 result = 0; /* remainder */ \ 881 } else { \ 882 result = firstVal _op secondVal; \ 883 } \ 884 SET_REGISTER_WIDE(vdst, result); \ 885 } else { \ 886 SET_REGISTER_WIDE(vdst, \ 887 (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \ 888 } \ 889 } \ 890 FINISH(2); 891 892#define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \ 893 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 894 { \ 895 u2 srcRegs; \ 896 vdst = INST_AA(inst); \ 897 srcRegs = FETCH(1); \ 898 vsrc1 = srcRegs & 0xff; \ 899 vsrc2 = srcRegs >> 8; \ 900 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 901 SET_REGISTER_WIDE(vdst, \ 902 _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \ 903 } \ 904 FINISH(2); 905 906#define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \ 907 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 908 vdst = INST_A(inst); \ 909 vsrc1 = INST_B(inst); \ 910 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 911 if (_chkdiv != 0) { \ 912 s8 firstVal, secondVal, result; \ 913 firstVal = GET_REGISTER_WIDE(vdst); \ 914 secondVal = GET_REGISTER_WIDE(vsrc1); \ 915 if (secondVal == 0LL) { \ 916 EXPORT_PC(); \ 917 dvmThrowException("Ljava/lang/ArithmeticException;", \ 918 "divide by zero"); \ 919 GOTO_exceptionThrown(); \ 920 } \ 921 if ((u8)firstVal == 0x8000000000000000ULL && \ 922 secondVal == -1LL) \ 923 { \ 924 if (_chkdiv == 1) \ 925 result = firstVal; /* division */ \ 926 else \ 927 result = 0; /* remainder */ \ 928 } else { \ 929 result = firstVal _op secondVal; \ 930 } \ 931 SET_REGISTER_WIDE(vdst, result); \ 932 } else { \ 933 SET_REGISTER_WIDE(vdst, \ 934 (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\ 935 } \ 936 FINISH(1); 937 938#define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \ 939 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 940 vdst = INST_A(inst); \ 941 vsrc1 = INST_B(inst); \ 942 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 943 SET_REGISTER_WIDE(vdst, \ 944 _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \ 945 FINISH(1); 946 947#define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \ 948 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 949 { \ 950 u2 srcRegs; \ 951 vdst = INST_AA(inst); \ 952 srcRegs = FETCH(1); \ 953 vsrc1 = srcRegs & 0xff; \ 954 vsrc2 = srcRegs >> 8; \ 955 ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 956 SET_REGISTER_FLOAT(vdst, \ 957 GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \ 958 } \ 959 FINISH(2); 960 961#define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \ 962 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 963 { \ 964 u2 srcRegs; \ 965 vdst = INST_AA(inst); \ 966 srcRegs = FETCH(1); \ 967 vsrc1 = srcRegs & 0xff; \ 968 vsrc2 = srcRegs >> 8; \ 969 ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 970 SET_REGISTER_DOUBLE(vdst, \ 971 GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \ 972 } \ 973 FINISH(2); 974 975#define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \ 976 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 977 vdst = INST_A(inst); \ 978 vsrc1 = INST_B(inst); \ 979 ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 980 SET_REGISTER_FLOAT(vdst, \ 981 GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \ 982 FINISH(1); 983 984#define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \ 985 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 986 vdst = INST_A(inst); \ 987 vsrc1 = INST_B(inst); \ 988 ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 989 SET_REGISTER_DOUBLE(vdst, \ 990 GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \ 991 FINISH(1); 992 993#define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \ 994 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 995 { \ 996 ArrayObject* arrayObj; \ 997 u2 arrayInfo; \ 998 EXPORT_PC(); \ 999 vdst = INST_AA(inst); \ 1000 arrayInfo = FETCH(1); \ 1001 vsrc1 = arrayInfo & 0xff; /* array ptr */ \ 1002 vsrc2 = arrayInfo >> 8; /* index */ \ 1003 ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 1004 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \ 1005 if (!checkForNull((Object*) arrayObj)) \ 1006 GOTO_exceptionThrown(); \ 1007 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \ 1008 LOGV("Invalid array access: %p %d (len=%d)\n", \ 1009 arrayObj, vsrc2, arrayObj->length); \ 1010 dvmThrowException("Ljava/lang/ArrayIndexOutOfBoundsException;", \ 1011 NULL); \ 1012 GOTO_exceptionThrown(); \ 1013 } \ 1014 SET_REGISTER##_regsize(vdst, \ 1015 ((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)]); \ 1016 ILOGV("+ AGET[%d]=0x%x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \ 1017 } \ 1018 FINISH(2); 1019 1020#define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \ 1021 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 1022 { \ 1023 ArrayObject* arrayObj; \ 1024 u2 arrayInfo; \ 1025 EXPORT_PC(); \ 1026 vdst = INST_AA(inst); /* AA: source value */ \ 1027 arrayInfo = FETCH(1); \ 1028 vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \ 1029 vsrc2 = arrayInfo >> 8; /* CC: index */ \ 1030 ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 1031 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \ 1032 if (!checkForNull((Object*) arrayObj)) \ 1033 GOTO_exceptionThrown(); \ 1034 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \ 1035 dvmThrowException("Ljava/lang/ArrayIndexOutOfBoundsException;", \ 1036 NULL); \ 1037 GOTO_exceptionThrown(); \ 1038 } \ 1039 ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\ 1040 ((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)] = \ 1041 GET_REGISTER##_regsize(vdst); \ 1042 } \ 1043 FINISH(2); 1044 1045/* 1046 * It's possible to get a bad value out of a field with sub-32-bit stores 1047 * because the -quick versions always operate on 32 bits. Consider: 1048 * short foo = -1 (sets a 32-bit register to 0xffffffff) 1049 * iput-quick foo (writes all 32 bits to the field) 1050 * short bar = 1 (sets a 32-bit register to 0x00000001) 1051 * iput-short (writes the low 16 bits to the field) 1052 * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001) 1053 * This can only happen when optimized and non-optimized code has interleaved 1054 * access to the same field. This is unlikely but possible. 1055 * 1056 * The easiest way to fix this is to always read/write 32 bits at a time. On 1057 * a device with a 16-bit data bus this is sub-optimal. (The alternative 1058 * approach is to have sub-int versions of iget-quick, but now we're wasting 1059 * Dalvik instruction space and making it less likely that handler code will 1060 * already be in the CPU i-cache.) 1061 */ 1062#define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \ 1063 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1064 { \ 1065 InstField* ifield; \ 1066 Object* obj; \ 1067 EXPORT_PC(); \ 1068 vdst = INST_A(inst); \ 1069 vsrc1 = INST_B(inst); /* object ptr */ \ 1070 ref = FETCH(1); /* field ref */ \ 1071 ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \ 1072 obj = (Object*) GET_REGISTER(vsrc1); \ 1073 if (!checkForNull(obj)) \ 1074 GOTO_exceptionThrown(); \ 1075 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \ 1076 if (ifield == NULL) { \ 1077 ifield = dvmResolveInstField(curMethod->clazz, ref); \ 1078 if (ifield == NULL) \ 1079 GOTO_exceptionThrown(); \ 1080 } \ 1081 SET_REGISTER##_regsize(vdst, \ 1082 dvmGetField##_ftype(obj, ifield->byteOffset)); \ 1083 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \ 1084 (u8) GET_REGISTER##_regsize(vdst)); \ 1085 UPDATE_FIELD_GET(&ifield->field); \ 1086 } \ 1087 FINISH(2); 1088 1089#define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \ 1090 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1091 { \ 1092 Object* obj; \ 1093 vdst = INST_A(inst); \ 1094 vsrc1 = INST_B(inst); /* object ptr */ \ 1095 ref = FETCH(1); /* field offset */ \ 1096 ILOGV("|iget%s-quick v%d,v%d,field@+%u", \ 1097 (_opname), vdst, vsrc1, ref); \ 1098 obj = (Object*) GET_REGISTER(vsrc1); \ 1099 if (!checkForNullExportPC(obj, fp, pc)) \ 1100 GOTO_exceptionThrown(); \ 1101 SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \ 1102 ILOGV("+ IGETQ %d=0x%08llx", ref, \ 1103 (u8) GET_REGISTER##_regsize(vdst)); \ 1104 } \ 1105 FINISH(2); 1106 1107#define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \ 1108 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1109 { \ 1110 InstField* ifield; \ 1111 Object* obj; \ 1112 EXPORT_PC(); \ 1113 vdst = INST_A(inst); \ 1114 vsrc1 = INST_B(inst); /* object ptr */ \ 1115 ref = FETCH(1); /* field ref */ \ 1116 ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \ 1117 obj = (Object*) GET_REGISTER(vsrc1); \ 1118 if (!checkForNull(obj)) \ 1119 GOTO_exceptionThrown(); \ 1120 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \ 1121 if (ifield == NULL) { \ 1122 ifield = dvmResolveInstField(curMethod->clazz, ref); \ 1123 if (ifield == NULL) \ 1124 GOTO_exceptionThrown(); \ 1125 } \ 1126 dvmSetField##_ftype(obj, ifield->byteOffset, \ 1127 GET_REGISTER##_regsize(vdst)); \ 1128 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \ 1129 (u8) GET_REGISTER##_regsize(vdst)); \ 1130 UPDATE_FIELD_PUT(&ifield->field); \ 1131 } \ 1132 FINISH(2); 1133 1134#define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \ 1135 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1136 { \ 1137 Object* obj; \ 1138 vdst = INST_A(inst); \ 1139 vsrc1 = INST_B(inst); /* object ptr */ \ 1140 ref = FETCH(1); /* field offset */ \ 1141 ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \ 1142 (_opname), vdst, vsrc1, ref); \ 1143 obj = (Object*) GET_REGISTER(vsrc1); \ 1144 if (!checkForNullExportPC(obj, fp, pc)) \ 1145 GOTO_exceptionThrown(); \ 1146 dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \ 1147 ILOGV("+ IPUTQ %d=0x%08llx", ref, \ 1148 (u8) GET_REGISTER##_regsize(vdst)); \ 1149 } \ 1150 FINISH(2); 1151 1152#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \ 1153 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \ 1154 { \ 1155 StaticField* sfield; \ 1156 vdst = INST_AA(inst); \ 1157 ref = FETCH(1); /* field ref */ \ 1158 ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \ 1159 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \ 1160 if (sfield == NULL) { \ 1161 EXPORT_PC(); \ 1162 sfield = dvmResolveStaticField(curMethod->clazz, ref); \ 1163 if (sfield == NULL) \ 1164 GOTO_exceptionThrown(); \ 1165 } \ 1166 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \ 1167 ILOGV("+ SGET '%s'=0x%08llx", \ 1168 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \ 1169 UPDATE_FIELD_GET(&sfield->field); \ 1170 } \ 1171 FINISH(2); 1172 1173#define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \ 1174 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \ 1175 { \ 1176 StaticField* sfield; \ 1177 vdst = INST_AA(inst); \ 1178 ref = FETCH(1); /* field ref */ \ 1179 ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \ 1180 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \ 1181 if (sfield == NULL) { \ 1182 EXPORT_PC(); \ 1183 sfield = dvmResolveStaticField(curMethod->clazz, ref); \ 1184 if (sfield == NULL) \ 1185 GOTO_exceptionThrown(); \ 1186 } \ 1187 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \ 1188 ILOGV("+ SPUT '%s'=0x%08llx", \ 1189 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \ 1190 UPDATE_FIELD_PUT(&sfield->field); \ 1191 } \ 1192 FINISH(2); 1193 1194 1195/* File: cstubs/enddefs.c */ 1196 1197/* undefine "magic" name remapping */ 1198#undef retval 1199#undef pc 1200#undef fp 1201#undef curMethod 1202#undef methodClassDex 1203#undef self 1204#undef debugTrackedRefStart 1205 1206/* File: armv5te/debug.c */ 1207#include <inttypes.h> 1208 1209/* 1210 * Dump the fixed-purpose ARM registers, along with some other info. 1211 * 1212 * This function MUST be compiled in ARM mode -- THUMB will yield bogus 1213 * results. 1214 * 1215 * This will NOT preserve r0-r3/ip. 1216 */ 1217void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3) 1218{ 1219 register uint32_t rPC asm("r4"); 1220 register uint32_t rFP asm("r5"); 1221 register uint32_t rGLUE asm("r6"); 1222 register uint32_t rINST asm("r7"); 1223 register uint32_t rIBASE asm("r8"); 1224 register uint32_t r9 asm("r9"); 1225 register uint32_t r10 asm("r10"); 1226 1227 extern char dvmAsmInstructionStart[]; 1228 1229 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3); 1230 printf(" : rPC=%08x rFP=%08x rGLUE=%08x rINST=%08x\n", 1231 rPC, rFP, rGLUE, rINST); 1232 printf(" : rIBASE=%08x r9=%08x r10=%08x\n", rIBASE, r9, r10); 1233 1234 MterpGlue* glue = (MterpGlue*) rGLUE; 1235 const Method* method = glue->method; 1236 printf(" + self is %p\n", dvmThreadSelf()); 1237 //printf(" + currently in %s.%s %s\n", 1238 // method->clazz->descriptor, method->name, method->shorty); 1239 //printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart); 1240 //printf(" + next handler for 0x%02x = %p\n", 1241 // rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64); 1242} 1243 1244/* 1245 * Dump the StackSaveArea for the specified frame pointer. 1246 */ 1247void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea) 1248{ 1249 StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp); 1250 printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea); 1251#ifdef EASY_GDB 1252 printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n", 1253 saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc, 1254 saveArea->method, saveArea->xtra.currentPc); 1255#else 1256 printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n", 1257 saveArea->prevFrame, saveArea->savedPc, 1258 saveArea->method, saveArea->xtra.currentPc, 1259 *(u4*)fp); 1260#endif 1261} 1262 1263/* 1264 * Does the bulk of the work for common_printMethod(). 1265 */ 1266void dvmMterpPrintMethod(Method* method) 1267{ 1268 /* 1269 * It is a direct (non-virtual) method if it is static, private, 1270 * or a constructor. 1271 */ 1272 bool isDirect = 1273 ((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) || 1274 (method->name[0] == '<'); 1275 1276 char* desc = dexProtoCopyMethodDescriptor(&method->prototype); 1277 1278 printf("<%c:%s.%s %s> ", 1279 isDirect ? 'D' : 'V', 1280 method->clazz->descriptor, 1281 method->name, 1282 desc); 1283 1284 free(desc); 1285} 1286 1287