1%verify "executed"
2%verify "basic lt, gt, eq"
3%verify "hi equal, lo <=>"
4%verify "lo equal, hi <=>"
5    /*
6     * Compare two 64-bit values.  Puts 0, 1, or -1 into the destination
7     * register based on the results of the comparison.
8     */
9    /* cmp-long vAA, vBB, vCC */
10    movzbl    2(rPC),%ecx              # ecx<- BB
11    SPILL(rPC)
12    movzbl    3(rPC),rPC               # rPC<- CC
13    GET_VREG_WORD(%eax,%ecx,1)         # eax<- v[BB+1]
14    GET_VREG_WORD(%ecx,%ecx,0)         # ecx<- v[BB+0]
15    movzbl    rINST_HI,rINST_FULL      # rINST_FULL<- AA
16    cmpl      4(rFP,rPC,4),%eax
17    jl        .L${opcode}_smaller
18    jg        .L${opcode}_bigger
19    sub       (rFP,rPC,4),%ecx
20    ja        .L${opcode}_bigger
21    jb        .L${opcode}_smaller
22    UNSPILL(rPC)
23    jmp       .L${opcode}_finish
24%break
25
26.L${opcode}_bigger:
27    UNSPILL(rPC)
28    movl      $$1,%ecx
29    jmp       .L${opcode}_finish
30.L${opcode}_smaller:
31    UNSPILL(rPC)
32    movl      $$-1,%ecx
33.L${opcode}_finish:
34    SET_VREG(%ecx,rINST_FULL)
35    FETCH_INST_WORD(2)
36    ADVANCE_PC(2)
37    GOTO_NEXT
38