1%default {"result":"","special":""}
2    /*
3     * 32-bit binary div/rem operation.  Handles special case of op0=minint and
4     * op1=-1.
5     */
6    /* div/rem/2addr vA, vB */
7    movzx    rINST_HI,%ecx          # eax<- BA
8    sarl     $$4,%ecx               # ecx<- B
9    GET_VREG(%ecx,%ecx)             # eax<- vBB
10    movzbl   rINST_HI,rINST_FULL    # rINST_FULL<- BA
11    andb     $$0xf,rINST_LO         # rINST_FULL<- A
12    GET_VREG(%eax,rINST_FULL)       # eax<- vBB
13    SPILL(rPC)
14    cmpl     $$0,%ecx
15    je       common_errDivideByZero
16    cmpl     $$-1,%ecx
17    jne      .L${opcode}_continue_div2addr
18    cmpl     $$0x80000000,%eax
19    jne      .L${opcode}_continue_div2addr
20    movl     $special,$result
21    jmp      .L${opcode}_finish_div2addr
22
23%break
24.L${opcode}_continue_div2addr:
25    cltd
26    idivl   %ecx
27.L${opcode}_finish_div2addr:
28    SET_VREG($result,rINST_FULL)
29    UNSPILL(rPC)
30    FETCH_INST_WORD(1)
31    ADVANCE_PC(1)
32    GOTO_NEXT
33