1/*
2 * TWDriverRate.h
3 *
4 * Copyright(c) 1998 - 2009 Texas Instruments. All rights reserved.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 *  * Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 *  * Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in
15 *    the documentation and/or other materials provided with the
16 *    distribution.
17 *  * Neither the name Texas Instruments nor the names of its
18 *    contributors may be used to endorse or promote products derived
19 *    from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef TWDRIVERRATE_H
35#define TWDRIVERRATE_H
36
37/** \file  TWDriverRate.h
38 *  \brief TWDriver Rate APIs
39 *
40 *  \see
41 */
42
43/** \enum ERate
44 * \brief Rate Types
45 *
46 * \par Description
47 * Driver's TX Control Frame Rate Format Type
48 *
49 * \sa
50 */
51typedef enum
52{
53    DRV_RATE_AUTO       = 0,				/**< Auto							*/
54    DRV_RATE_1M         = 1,				/**< 1M								*/
55    DRV_RATE_2M         = 2,				/**< 2M								*/
56    DRV_RATE_5_5M       = 3,				/**< 5.5M							*/
57    DRV_RATE_11M        = 4,				/**< 11M							*/
58    DRV_RATE_22M        = 5,				/**< 22M							*/
59    DRV_RATE_6M         = 6,				/**< 6M								*/
60    DRV_RATE_9M         = 7,				/**< 9M								*/
61    DRV_RATE_12M        = 8,				/**< 12M							*/
62    DRV_RATE_18M        = 9,				/**< 18M							*/
63    DRV_RATE_24M        = 10,				/**< 24M							*/
64    DRV_RATE_36M        = 11,				/**< 36M							*/
65    DRV_RATE_48M        = 12,				/**< 48M							*/
66    DRV_RATE_54M        = 13,				/**< 54M							*/
67    DRV_RATE_MCS_0      = 14,				/**< 6.5M or  7.2					*/
68    DRV_RATE_MCS_1      = 15,				/**< 13.0M or 14.4					*/
69    DRV_RATE_MCS_2      = 16,				/**< 19.5M or 21.7 					*/
70    DRV_RATE_MCS_3      = 17,				/**< 26.0M or 28.9 					*/
71    DRV_RATE_MCS_4      = 18,				/**< 39.0M or 43.3 					*/
72    DRV_RATE_MCS_5      = 19,				/**< 52.0M or 57.8 					*/
73    DRV_RATE_MCS_6      = 20,				/**< 58.5M or 65.0 					*/
74    DRV_RATE_MCS_7      = 21,				/**< 65.0M or 72.2 					*/
75    DRV_RATE_MAX        = DRV_RATE_MCS_7,	/**< Maximum Driver's Rate Type 	*/
76    DRV_RATE_INVALID    = 0xFF				/**< Invalid Driver's Rate Type 	*/
77
78} ERate;
79
80#define RATE_TO_MASK(R)  (1 << ((R) - 1))
81
82/** \enum ERateMask
83 * \brief Driver rate mask
84 *
85 * \par Description
86 *
87 * \sa
88 */
89typedef enum
90{
91    DRV_RATE_MASK_AUTO          = DRV_RATE_AUTO,                  /**< 0x000000	*/
92    DRV_RATE_MASK_1_BARKER      = RATE_TO_MASK(DRV_RATE_1M),      /**< 0x000001	*/
93    DRV_RATE_MASK_2_BARKER      = RATE_TO_MASK(DRV_RATE_2M),      /**< 0x000002	*/
94    DRV_RATE_MASK_5_5_CCK       = RATE_TO_MASK(DRV_RATE_5_5M),    /**< 0x000004	*/
95    DRV_RATE_MASK_11_CCK        = RATE_TO_MASK(DRV_RATE_11M),     /**< 0x000008	*/
96    DRV_RATE_MASK_22_PBCC       = RATE_TO_MASK(DRV_RATE_22M),     /**< 0x000010	*/
97    DRV_RATE_MASK_6_OFDM        = RATE_TO_MASK(DRV_RATE_6M),      /**< 0x000020	*/
98    DRV_RATE_MASK_9_OFDM        = RATE_TO_MASK(DRV_RATE_9M),      /**< 0x000040	*/
99    DRV_RATE_MASK_12_OFDM       = RATE_TO_MASK(DRV_RATE_12M),     /**< 0x000080	*/
100    DRV_RATE_MASK_18_OFDM       = RATE_TO_MASK(DRV_RATE_18M),     /**< 0x000100	*/
101    DRV_RATE_MASK_24_OFDM       = RATE_TO_MASK(DRV_RATE_24M),     /**< 0x000200	*/
102    DRV_RATE_MASK_36_OFDM       = RATE_TO_MASK(DRV_RATE_36M),     /**< 0x000400	*/
103    DRV_RATE_MASK_48_OFDM       = RATE_TO_MASK(DRV_RATE_48M),     /**< 0x000800	*/
104    DRV_RATE_MASK_54_OFDM       = RATE_TO_MASK(DRV_RATE_54M),     /**< 0x001000	*/
105    DRV_RATE_MASK_MCS_0_OFDM    = RATE_TO_MASK(DRV_RATE_MCS_0),   /**< 0x002000	*/
106    DRV_RATE_MASK_MCS_1_OFDM    = RATE_TO_MASK(DRV_RATE_MCS_1),   /**< 0x004000	*/
107    DRV_RATE_MASK_MCS_2_OFDM    = RATE_TO_MASK(DRV_RATE_MCS_2),   /**< 0x008000	*/
108    DRV_RATE_MASK_MCS_3_OFDM    = RATE_TO_MASK(DRV_RATE_MCS_3),   /**< 0x010000	*/
109    DRV_RATE_MASK_MCS_4_OFDM    = RATE_TO_MASK(DRV_RATE_MCS_4),   /**< 0x020000	*/
110    DRV_RATE_MASK_MCS_5_OFDM    = RATE_TO_MASK(DRV_RATE_MCS_5),   /**< 0x040000	*/
111    DRV_RATE_MASK_MCS_6_OFDM    = RATE_TO_MASK(DRV_RATE_MCS_6),   /**< 0x080000	*/
112    DRV_RATE_MASK_MCS_7_OFDM    = RATE_TO_MASK(DRV_RATE_MCS_7)    /**< 0x100000	*/
113
114} ERateMask;
115
116#define PBCC_BIT        0x00000080 /* BIT_7 */
117
118#endif /* #define TWDRIVERRATE_H */
119