| b78c76f88ea42e7a3b295c210ca9ee86e7290043 |
|
01-Oct-2010 |
buzbee <buzbee@google.com> |
GC Card marking fix for SPUT_OBJECT - use correct object head
Change-Id: I8b84a4f1e1690f5b62de7404ea6ede00317848bb
|
| d82097f6b409c5cd48568e54eb701604c3cceb18 |
|
27-Sep-2010 |
buzbee <buzbee@google.com> |
Change GC card making to use object head, bug fix for volatile sput obj
This CL changes the way we mark GC card to consistently use the object
head (previously, we marked somewhere in the object - often the head, but
not always). Also, previously a coding error caused us to skip the card
mark for OP_APUT_OBJECT_VOLATILES. Fixed here.
Change-Id: I133ef6395c51a0466c9708209b08e79c3083aff2
|
| 4934b377d9cf5df6f80da7caab4f2178c6cec307 |
|
21-Sep-2010 |
Ben Cheng <bccheng@android.com> |
Several fixes for JIT and self-verification under corner cases.
1) Fix the self-verification mode to handle backward chaining cell
properly when a single-step instruction is in the middle of the cyclic
portion of the trace. Then found issue 2 when changing the JIT
threshold to 1.
2) When the code cache is full, the VM may stop making forward progress
and bounces back and forth between the debug and fast intepreters as the
translation request is constantly rejected. The fix is to stay in the
debug interpreter until the corner case condition is cleared. Then found
issue 3.
3) Under self-verification mode, the code cache reset request may get
delayed indefinitely due to spurious indication that a thread is
running JIT'ed code. Trivial fix - make sure the inJitCodeCache flag is
cleared.
(cherry-picked from dalvik-dev)
Change-Id: Ic0b9952c0ae545f68f7eb2ae06a82a634ab62e9e
|
| 0d615c3ce5bf97ae65b9347ee77968f38620d5e8 |
|
18-Aug-2010 |
Andy McFadden <fadden@android.com> |
Always support debugging and profiling.
This eliminates the use of the WITH_DEBUGGER and WITH_PROFILER
conditional compilation flags. We've never shipped a device without
these features, and it's unlikely we ever will. They're not worth
the code clutter they cause.
As usual, since I can't test the x86-atom code I left that alone and
added an item to the TODO list.
Bug 2923442.
Change-Id: I335ebd5193bc86f7641513b1b41c0378839be1fe
|
| 7a2697d327936e20ef5484f7819e2e4bf91c891f |
|
07-Jun-2010 |
Ben Cheng <bccheng@android.com> |
Implement method inlining for getters/setters
Changes include:
1) Force the trace that ends with an invoke instruction to include
the next instruction if it is a move-result (because both need
to be turned into no-ops if callee is inlined).
2) Interpreter entry point/trace builder changes so that return
target won't automatically be considered as trace starting points
(to avoid duplicate traces that include the move result
instructions).
3) Codegen changes to handle getters/setters invoked from both
monomorphic and polymorphic callsites.
4) Extend/fix self-verification to form identical trace regions and
handle traces with inlined callees.
5) Apply touchups to the method based parsing - still not in use.
Change-Id: I116b934df01bf9ada6d5a25187510e352bccd13c
|
| 919eb063ce4542d3698e10e20aba9a2dfbdd0f82 |
|
12-Jul-2010 |
buzbee <buzbee@google.com> |
Interpreter & JIT support for write barriers
In this iteration, cards are marked on either the store address or
the object head (whichever leads to faster code). In all cases,
though, card marks are deferred until after the associated store
has completed.
Change-Id: I633d6e8c3bebdb80bde92efb4fa6fc7cc84f60fc
|
| 0890e5bf0b2a502ca1030e9773fabc16ef1b5981 |
|
18-Jun-2010 |
Andy McFadden <fadden@android.com> |
Fiddle with SMP_DMB.
This changes it from a macro that takes an argument to a simpler
macro that is named explicitly by the 8 instructions that want it.
Change-Id: Ie17a9722823d590851776b6b9b057eadf22fa6a8
|
| c35a2ef53d0cccd6f924eeba36633220ec67c32e |
|
17-Jun-2010 |
Andy McFadden <fadden@android.com> |
Add opcodes for volatile field accesses
This adds instructions for {i,s}{get,put}{,-object}-volatile, for a
total of eight new instructions.
On SMP systems, these instructions will be substituted in for existing
field access instructions, either by dexopt or during just-in-time
verification. Unlike the wide-volatile instructions, these will not be
used at all when the VM is not built for SMP.
(Ideally we'd omit the volatile instruction implementations entirely on
non-SMP builds, but that requires a little work in gen-mterp.py.)
The change defines and implements the opcodes and support methods, but
does not cause them to be used.
Also, changed dvmQuasiAtomicRead64's argument to be const.
Change-Id: I9e44fe881e87f27aa41f6c6e898ec4402cb5493e
|
| 6e10b9aaa72425a4825a25f0043533d0c6fdbba4 |
|
15-Jun-2010 |
Andy McFadden <fadden@android.com> |
Atomic op cleanup.
Replaced VM-local macros for barrier and CAS calls with the actual
versions provided by cutils.
ATOMIC_CMP_SWAP(addr,old,new) --> android_atomic_release_cas(old,new,addr)
MEM_BARRIER --> ANDROID_MEMBAR_FULL
Renamed android_quasiatomic* to dvmQuasiAtomic*.
Didn't change how anything works, just the names.
Change-Id: I8c68f28e1f7c9cb832183e0918d097dfe6a2cac8
|
| 7365493ad8d360c1dcf9cd8b6eee62747af01cae |
|
09-Jun-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove repeated newlines at the end of files.
Change-Id: I1e3d103a7b932ef21acedb6438c0f26b315df28f
|
| de75089fb7216d19e9c22cce4dc62a49513477d3 |
|
09-Jun-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove trailing whitespace.
Change-Id: I95534bb2b88eaf48f2329282041118cd034c812b
|
| b48a4d53bc3349b5c99f8b87a396e7374e2d335c |
|
02-Jun-2010 |
Dave Butcher <david.butcher@arm.com> |
Fix for use of UNPREDICTABLE register combination
Use of the LDRD instruction form LDRD Rt, Rt2, [Rn, Rm] has restrictions
on the register combinations - specifically if Rt or Rt2 is equal to Rn or
Rm the behaviour is defined as 'UNPREDICTABLE'.
Change-Id: I19834783865e07897cc7012367e698447f023ce6
|
| 8ba2708ea118381f2df5ca55b9bad2ae4c050504 |
|
21-May-2010 |
Andy McFadden <fadden@android.com> |
Added EXPORT_PC to "throw" instruction.
For bug 2700761.
Change-Id: I889e59ea35d9cadd99fc884e5b1301a4cf103f93
|
| fbdcfb9ea9e2a78f295834424c3f24986ea45dac |
|
29-May-2010 |
Brian Carlstrom <bdc@google.com> |
Merge remote branch 'goog/dalvik-dev' into dalvik-dev-to-master
Change-Id: I0c0edb3ebf0d5e040d6bbbf60269fab0deb70ef9
|
| bd0472480c6e876198fe19c4ffa22350c0ce57da |
|
13-May-2010 |
Bill Buzbee <buzbee@google.com> |
JIT: Fix for [Issue 2675245] FRF40 monkey crash in jit-cache
The JIT's chaining mechanism suffered from a narrow window that
could result in i-cache inconsistency. One of the forms of chaining
cell consisted of a two 16-bit thumb instruction sequence. If a thread were
interrupted between the execution of those two instructions *and*
another thread picked that moment to convert that cell's
chained/unchained state, then bad things happen.
This CL alters the chain/unchain model somewhat to avoid this case.
Chainable chaining cells grow by 4 bytes each, and instead of rewriting
a 32-bit cell to chain/unchain, we switch between chained and unchained
state by [re]writing the first 16-bits of the cell as either a 16-bit
Thumb unconditional branch (unchained mode) or the first half of a
32-bit Thumb branch. The 2nd 16-bits of the cell will never change once
the cell moves from its inital state - thus avoiding the possibility of it
becoming inconsistent.
This adds a trivial execution penalty on the slow path, but will add
about a kByte of memory usage to a typical process.
Change-Id: Id8b99802e11386cfbab23da6abae10e2d9fc4065
|
| 978738d2cbf9d08fa78c65762eaac3351ab76b9a |
|
13-May-2010 |
Ben Cheng <bccheng@android.com> |
Add counters to track JIT inline cache hit rate and code cache patch counts.
Also did some WITH_JIT_TUNING cleanup.
Change-Id: I8bb2d681a06b0f2af1f976a007326825a88cea38
|
| c95e0fbce4f77b2b08eb48205e405793de0d4248 |
|
29-Apr-2010 |
Andy McFadden <fadden@android.com> |
Rework common_periodicChecks.
The function was rewritten to optimize the common path. The control flow
now matches the C version, which tests for debugger/profiler even if the
previous test for suspension came up true.
This also adds a minor optimization on the test for debugger attachment,
allowing us to skip a load from memory if the process is simply not
debuggable. (The optimization isn't yet enabled because a similar change
must be made to the x86 asm code.)
The VM apparently hadn't been built without debugging/profiling support
for a while, so this fixes those places (necessary to be able to test
all forms of the new code).
Bug 2634642.
Change-Id: I096b58c961bb73ee0d128ba776d68dbf29bba924
|
| 7a44e4ee0782d24b4c6090be1f0a3c66f971f2c1 |
|
29-Apr-2010 |
Andy McFadden <fadden@android.com> |
Use unsigned compare for stack overflow.
When checking for stack overflow we're using a comparison that is treating
the pointers as signed values. If we manage to get a stack straddling
0x80000000, this will not work correctly.
Bug 2613607.
Change-Id: I5d178db86e93a3bb1e6a417e88d7cb1770d285bb
|
| d5adae17d71e86a1a5f3ae7825054e3249fb7879 |
|
27-Mar-2010 |
Ben Cheng <bccheng@android.com> |
Improve JIT self verifier test coverage to follow single-step instructions.
Bug: 2549326
Change-Id: I01412d4aac1379b61c90fe6e59c534b33be93f66
|
| 861b33855aff080278ea5125e4372a2d4bf8aef5 |
|
06-Mar-2010 |
Andy McFadden <fadden@android.com> |
Make wide-volatile loads and stores atomic.
This implements the four wide-volatile instructions added in a previous
change, and modifies the verifier to substitute the opcodes into the
instruction stream when appropriate.
For mterp, the ARM wide get/put instructions now have conditional code
that replaces ldrd/strd with a call to the quasiatomic functions. The
C version does essentially the same thing. ARMv4T lacks ldrd/stdrd, and
uses separate implementations for the wide field accesses, so those were
updated as well. x86 will just use stubs.
The JIT should punt these to the interpreter.
Change-Id: Ife88559ed1a698c3267d43c454896f6b12081c0f
Also:
- We don't seem to be using the negative widths in the instruction
table. Not sure they're useful anymore.
- Tabs -> spaces in x86-atom throw-verification-error impl.
|
| 51ae442fa9ed49e081e58e5127d1805789dbb196 |
|
13-Mar-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Minor cleanup - enum size fix, remove useless code, control consistency.
Change-Id: Id8c16303efd25683ad4b04a85e0d2a059b5ec3be
|
| 86717f79d9b018f4d69cc991075fa36611f234e5 |
|
06-Mar-2010 |
Ben Cheng <bccheng@android.com> |
Collect more JIT stats in the assert build.
New stuff includes breakdown of callsite types (ie monomorphic vs polymorphic
vs monoporphic resolved to native), total time spent in JIT'ing, and average
JIT time per compilation.
Example output:
D/dalvikvm( 840): 4042 compilations using 1976 + 329108 bytes
D/dalvikvm( 840): Compiler arena uses 10 blocks (8100 bytes each)
D/dalvikvm( 840): Compiler work queue length is 0/36
D/dalvikvm( 840): size if 8192, entries used is 4137
D/dalvikvm( 840): JIT: 4137 traces, 8192 slots, 1099 chains, 40 thresh, Non-blocking
D/dalvikvm( 840): JIT: Lookups: 1128780 hits, 168564 misses; 179520 normal, 6 punt
D/dalvikvm( 840): JIT: noChainExit: 528464 IC miss, 194708 interp callsite, 0 switch overflow
D/dalvikvm( 840): JIT: Invoke: 507 mono, 988 poly, 72 native, 1038 return
D/dalvikvm( 840): JIT: Total compilation time: 2342 ms
D/dalvikvm( 840): JIT: Avg unit compilation time: 579 us
D/dalvikvm( 840): JIT: 3357 Translation chains, 97 interp stubs
D/dalvikvm( 840): dalvik.vm.jit.op = 0-2,4-5,7-8,a-c,e-16,19-1a,1c-23,26,28-29,2b-2f,31-3d,44-4b,4d-51,60,62-63,68-69,70-72,76-78,7b,81-82,84,87,89,8d-93,95-98,a1,a3,a6,a8-a9,b0-b3,b5-b6,bb-bf,c6-c8,d0,d2-d6,d8,da-e2,ee-f0,f2-fb,
D/dalvikvm( 840): Code size stats: 50666/105126 (compiled/total Dalvik), 329108 (native)
|
| 5387824f19033ed51a945fbc8c2b574998404b3d |
|
05-Mar-2010 |
Andy McFadden <fadden@android.com> |
Add instructions for volatile wide fields.
This adds four new instructions for accessing volatile wide fields (long
and double). The JLS requires that such accesses are atomic, but the
VM doesn't otherwise make guarantees about the atomicity of reads and
writes on 64-bit fields.
There are no behavioral changes. This just adds definitions for the new
instructions and a couple of tests. The current implementation is just
the non-volatile form of the instructions or a C stub, but since we're
not generating them it doesn't really matter yet.
Also:
- bumped Dalvik version to 1.3.0
- added a note to the x86-atom TODO list
For bug 1633591.
|
| 40094c16d9727cc1e047a7d4bddffe04dd566211 |
|
25-Feb-2010 |
Ben Cheng <bccheng@android.com> |
Tweak the interpreter entries and 2nd level trace filter to capture more traces.
Real changes:
1) Add a new entry point from JIT to the interpreter to request hot traces w/o
doing chaining.
2) Increase the granularity of the secondary profile filter to match 64-byte
chunks using 64 entries.
The remaining are just cosmetic changes.
|
| 668628abe05cb30f86bd02c824f7219a7e20b82c |
|
16-Feb-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Monitor exit, possible fix for Issue 2396073
Two problems with monitor-exit:
1. The Jit code wasn't checking for exception thrown following
unlocks of fat locks using dvmUnlockObject().
2. The mterp interpreter unlock code branched to handle exceptions
thrown during dvmUnlockObject() with the wrong dalvik PC (the
dPC of the unlock, rather than the instruction following the unlock).
Similar issue with the x86 interpreter fixed. Also, deleted armv7-a
MONITOR_ENTER template, which turned out to be identical to the armv5te
one.
|
| 6bbdd6b005ec5cb567ec9576190a7cd784248c5c |
|
16-Feb-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Monitor exit, possible fix for Issue 2396073
Two problems with monitor-exit:
1. The Jit code wasn't checking for exception thrown following
unlocks of fat locks using dvmUnlockObject().
2. The mterp interpreter unlock code branched to handle exceptions
thrown during dvmUnlockObject() with the wrong dalvik PC (the
dPC of the unlock, rather than the instruction following the unlock).
Similar issue with the x86 interpreter fixed. Also, deleted armv7-a
MONITOR_ENTER template, which turned out to be identical to the armv5te
one.
|
| 94e79ebaa340e8ba3bb4d13f5e908fef6d9d5eed |
|
05-Feb-2010 |
Ben Cheng <bccheng@android.com> |
Enable JIT parameters to be initialized in an architecture dependent way.
The search for optimial value is still ongoing. The current settings are:
v5 v7
JIT profile table 512 2048
JIT code cache 512K 1M
JIT threshold 200 40
|
| 7b133ef7c84e68c3c4042176d830ea5b52e84139 |
|
05-Feb-2010 |
Ben Cheng <bccheng@android.com> |
Enable JIT parameters to be initialized in an architecture dependent way.
The search for optimial value is still ongoing. The current settings are:
v5 v7
JIT profile table 512 2048
JIT code cache 512K 1M
JIT threshold 200 40
|
| c3b92b26df6416d3179e865adccb283ee4170ab1 |
|
27-Jan-2010 |
Ben Cheng <bccheng@android.com> |
Fix performance issues related to chaining and unchaining.
1) Patching requests for predicted chaining cells (used by virtual/interface
methods) are now batched in a queue and processed when the VM is paused for GC.
2) When the code cache is full the reset operation is also conducted at the
end of GC pauses so this totally eliminates the need for the compiler thread
to issue suspend-all requests. This is a very rare event and when happening it
takes less than 5ms to finish.
3) Change the initial value of the branch in a predicted chaining cell from 0
(ie lsl r0, r0, #0) to 0xe7fe (ie branch to self) so that initializing a
predicted chaining cell doesn't need to suspend all threads. Together with 1)
seeing 20% speedup on some benchmarks.
4) Add TestCompability.c where defining "TEST_VM_IN_ECLAIR := true" in
buildspec.mk will activate dummy symbols needed to run libdvm.so in older
releases.
Bug: 2397689
Bug: 2396513
Bug: 2331313
|
| 4fbba1f95b3e27bdc5f5572bb0420b5f928aa54e |
|
03-Feb-2010 |
Andy McFadden <fadden@android.com> |
Fix stack overflow edge case.
When a stack overflows, Dalvik allows the stack to expand into a
"reserved" area, so that it has enough room to create and initialize the
StackOverflowError object. While the stack is expanded we also do the
search for an appropriate "catch" block, which may require resolving
some exception classes.
As it happens, things go badly when the "catch" resolution throws an
exception. The VM tries to shrink the stack back down after the second
exception is finished, rather than waiting for the initial SOE to
finish. Since we still have some additional frames on the stack, we're
still occupying the "reserved" area, and the VM aborts when it detects
the situation.
This changes the stack cleanup to wait until the SOE is being dealt
with.
For bug 2398031.
|
| 6999d84e2c55dc4a46a6c311b55bd5811336d9c4 |
|
27-Jan-2010 |
Ben Cheng <bccheng@android.com> |
Fix performance issues related to chaining and unchaining.
1) Patching requests for predicted chaining cells (used by virtual/interface
methods) are now batched in a queue and processed when the VM is paused for GC.
2) When the code cache is full the reset operation is also conducted at the
end of GC pauses so this totally eliminates the need for the compiler thread
to issue suspend-all requests. This is a very rare event and when happening it
takes less than 5ms to finish.
3) Change the initial value of the branch in a predicted chaining cell from 0
(ie lsl r0, r0, #0) to 0xe7fe (ie branch to self) so that initializing a
predicted chaining cell doesn't need to suspend all threads. Together with 1)
seeing 20% speedup on some benchmarks.
4) Add TestCompability.c where defining "TEST_VM_IN_ECLAIR := true" in
buildspec.mk will activate dummy symbols needed to run libdvm.so in older
releases.
Bug: 2397689
Bug: 2396513
Bug: 2331313
|
| 964a7b06a9134947b5985c7f712d18d57ed665d2 |
|
28-Jan-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Rework delayed start plus misc. cleanup
Defer initialization of jit to support upcoming feature to wait until
first screen is painted to start in order to avoid wasting effort on
jit'ng initialization code. Timed delay in place for the moment.
To change the on/off state, call dvmSuspendAllThreads(), update the
value of gDvmJit.pJitTable and then dvmResumeAllThreads().
Each time a thread goes through the heavyweight check suspend path, returns
from a monitor lock/unlock or returns from a JNI call, it will refresh
its on/off state.
Also:
Recognize and handle failure to increase size of JitTable.
Avoid repeated lock/unlock of JitTable modification mutex during resize
Make all work order enqueue actions non-blocking, which includes adding
a non-blocking mutex lock: dvmTryLockMutex().
Fix bug Jeff noticed where we were using a half-word form of a Thumb2
instruction rather than the byte form.
Minor comment changes.
|
| 7a0bcd0de6c4da6499a088a18d1750e51204c2a6 |
|
23-Jan-2010 |
Ben Cheng <bccheng@android.com> |
Tighten the safe points for code cache resets to happen.
Add a new flag in the Thread struct to track the whereabout of the top frame
in each Java thread. It is not safe to blow away the code cache if any thread
is in the JIT'ed land.
|
| 9797a237b48e880c33e2a2f497f48fb6f67c7a16 |
|
12-Jan-2010 |
Bill Buzbee <buzbee@google.com> |
Performance tweak for Jit lookup & adjust table sizes for better performance
Also, move setting of Jit table parameters to architecture-specific init
funciton.
|
| b1d8044ee3a7503b94eb54459f3077d7200cd675 |
|
17-Dec-2009 |
Bill Buzbee <buzbee@google.com> |
Jit: Briefly delay start of Jit'ng in attempt to avoid compiling init code
Via subjective manual side-by-side testing of jit vs. no-jit, the mterp
version looked like it tended to reach first screen on application launch
very slightly before the Jit version. This change adds an old and
commonly-used Jit trick to delay jit startup in an attempt to avoid wasting
effort compiling initialization code.
Also, deletes some code no longer in use.
|
| b0a0541b59d1126ff77c88de742b4a74579fe296 |
|
19-Nov-2009 |
Andy McFadden <fadden@android.com> |
Add execute-inline/range instruction.
Like "execute-inline", this is an instruction generated by dexopt that
replaces a method invoke instruction. It's useful for small, frequently
called methods in the core libs.
As with execute-inline, we allow at most 4 arguments, but with /range
we're no longer limited to the low 16 registers.
Also: marked execute-inline as being able to throw an exception.
Needed: native x86 implementation; support in JIT.
For bug 2268232.
|
| 96516932f1557d8f48a8b2dbbb885af01a11ef6e |
|
29-Oct-2009 |
Andy McFadden <fadden@android.com> |
Change the way breakpoints work.
This replaces the breakpoint mechanism with a more efficient approach.
We now insert breakpoint instructions into the bytecode stream instead of
maintaining a table. This requires mapping DEX files as private instead
of shared, which allows copy-on-write to work. mprotect() is used to
guard the pages against inadvertent writes.
Unused opcode EC is now OP_BREAKPOINT. It's not recognized by dexdump or
any interpreter except portdbg, but it can be encountered by the bytecode
verifier (the debugger can request breakpoints in unverified code).
Breakpoint changes are blocked while the verifier runs to avoid races.
This eliminates method->debugBreakpointCount, which is no longer needed.
(Also, it clashed with LinearAlloc's read-only mode.)
The deferred verification error mechanism was using a code-copying
approach to modify the bytecode stream. That has been changed to use
the same copy-on-write modification mechanism.
Also, normalized all PAGE_SIZE/PAGESIZE references to a single
SYSTEM_PAGE_SIZE define.
Simple Fibonacci computation test times (opal-eng):
JIT, no debugger: 10.6ms
Fast interp, no debugger: 36ms
Portable interp, no debugger: 43.8ms
ORIG debug interp, no breakpoints set: 458ms
ORIG debug interp, breakpoint set nearby: 697ms
NEW debug interp, no breakpoints set: 341ms
NEW debug interp, breakpoints set nearby: 341ms
Where "nearby" means there's a breakpoint in the method doing the
computation that isn't actually hit -- the VM had an optimization where
it flagged methods with breakpoints and skipped some of the processing
when possible.
The bottom line is that code should run noticeably faster while a
debugger is attached.
|
| 72e93344b4d1ffc71e9c832ec23de0657e5b04a5 |
|
13-Nov-2009 |
Jean-Baptiste Queru <jbq@google.com> |
eclair snapshot
|
| d726991ba52466cde88e37aba4de2395b62477fa |
|
10-Nov-2009 |
Bill Buzbee <buzbee@google.com> |
Jit stress mode: translate everything we can and self verify.
This represents a general clean-up of some existing command-line
options: -Xjitthreshold:num and -Xjitblocking. The jit threshold
controls how quickly we treat a Dalvik address as a potential trace
head. Normally this is set around 200 (and the range is 0..255, where
0 is in effect 256 and 1 means begin trace selection on first visit).
-Xjitblocking forces the system to pause execution whenever a translation
request is made and resume when that translation is complete. Normally
the system make a request but continues execution (to avoid jitter).
Additionally, if WITH_SELF_VERIFICATION is defined, we force blocking
to be true, and set the threshold to 1. And finally, we treat
threshold==1 as a special case and disable the 2nd-level trace-building
filter - which causes the system to immediately start trace selection.
|
| 9a8c75adb2abf551d06dbf757bff558c1feded08 |
|
08-Nov-2009 |
Bill Buzbee <buzbee@google.com> |
Introduce "just interpret" chainable pseudo-translation.
This is the first step towards enabling translation & self-cosim stress modes.
When trace selection begins, the trace head address is pinned and
remains in a limbo state until the translation is complete. Previously,
if the trace selected aborted for any reason, the trace head would remain
forever in limbo. This was not a correctness problem, but caused some
small performance anomolies and made life more difficult for self-cosimulation
mode.
This CL introduces a pseudo-translation that simply routes control to
the interpreter. When we detect that a trace selection attempt has
failed, the trace head is associated with this fully-chainable
pseudo-translation. This also has the benefit for self-cosimulation that
we are guaranteed forward progress.
|
| ccd6c0102d1f898aaea1c94761167fdd083b5275 |
|
15-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Make the traige process for self-verification found divergence easier.
1. Automatically replay the code compilation with verbose mode turned on for
the offending compilation.
3. Mark the registers with divergence explicitly.
2. Print accurate operand names using the dataflow attributes. Constant values
are still printed for reference only.
3. Fixed a few correctness/style issues in self-verification code.
|
| 30f1f463b132c7b6daf2de825c5fa44ce356ca13 |
|
12-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Set the debug interpreter entry point properly on the self-verification path.
Also fix the encoding for SFP/DFP register names to make self-verification
happy on FP benchmarks.
|
| 9c147b84ff7fe2c39228742b06a9ef180d39b48f |
|
08-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Fix various bugs found when debugger is attached to the VM.
See b/2161257 for details.
|
| 6ed1a0f396a1857c31b486d3e93ee2dbeb49a6cd |
|
11-Sep-2009 |
Andy McFadden <fadden@android.com> |
Display additional information on stack overflow.
This required passing an additional argument into dvmHandleStackOverflow,
which is called directly from mterp. Fortunately the method being
called is sitting in a register for both ARM and x86, so this is a
fairly simple change.
For internal bug 2110533.
|
| d5ab726b65d7271be261864c7e224fb90bfe06e0 |
|
25-Aug-2009 |
Andy McFadden <fadden@android.com> |
Another round of scary indirect ref changes.
This change adds a not-really-working implementation to Jni.c, with
various changes #ifdefed throughout the code. The ifdef is currently
disabled, so the old behavior should continue. Eventually the old
version will be stripped out and the ifdefs removed.
This renames the stack's "localRefTop" field, which nudged a bunch of
code. The name wasn't really right before (it's the *bottom* of the
local references), and it's even less right now. This and one other
mterp-visible constant were changed, which caused some ripples through
mterp and the JIT, but the ifdeffing was limited to one in
asm-constants.h (and the constant is the same both ways, so toggling the
ifdef won't require rebuilding asm sources).
Some comments and arg names in ReferenceTable were updated for the
correct orientation of bottom vs. top.
Some adjustments were made to the JNI code, e.g. dvmCallMethod now needs
to understand if it needs to convert reference arguments from
local/global refs to pointers (it's called from various places
throughout the VM).
|
| 97319a8a234e9fe1cf90ca39aa6eca37d729afd5 |
|
13-Aug-2009 |
Jeff Hao <jeffhao@google.com> |
New changes to enable self verification mode.
|
| 48f1824fd36241067e7bed2302cc00b2d880be7f |
|
20-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
New threshold mechanism for trace selections. Intended to reduce number of junk traces.
|
| 5162c5fbc20b7ba7791e79c640ac51b9fcd7937a |
|
20-Jun-2009 |
Andy McFadden <fadden@android.com> |
Use paired immediates for large constants.
The double-to-int and double-to-long instructions were loading constants
from .word directives, which wastes space in the CPU data cache. This
replaces a single LDR with a pair of data operations.
We don't actually use the double-to-long handler (the ARM EABI lib
does the right thing), and double-to-int is handled by VFP on newer
devices, but on older devices this may help a smidgeon. Mostly it just
looks nicer when you don't have .words lying around.
Also picks up a change that should be in the armv7-a generated file but
got lost in all of today's various mergings (float compare tweak).
|
| a5069fb7eb2da846ff1fc2c903ebd8ce9fa3647f |
|
20-Jun-2009 |
Andy McFadden <fadden@android.com> |
Added ARMv6T2 experiment.
These adds replacements for handlers that benefit from the use of new
instructions introduced in ARMv6T2 (notably UBFX, unsigned bit-field
extraction). This also adds an "armv7-a" mterp config file.
The benchmark improvement was tiny, so there's no real motivation to
convince the build system to use them.
This also includes an interleave fix for binop2addr.
|
| 8fd923e066208c4bbebe5677cac4d11a629bac1b |
|
19-Jun-2009 |
Andy McFadden <fadden@android.com> |
Improve interleave on VFP compare.
Improves FloatOps/FloatOpsD from 229/230ns to 228/229ns, an exciting
half-percentage-point gain.
|
| 5abc6e77ff476217f0871d800977ef50fc000d00 |
|
19-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
Neglected to rebuild template/out/* and mterp/out* in #4536
|
| 6e963e1cfbaeac377fed3ba8d5715c1dccfc1a57 |
|
18-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
Trace profiling support for the jit
|
| d8125c62642bd71df7485a85f787a1c6e2124c48 |
|
13-Jun-2009 |
Andy McFadden <fadden@android.com> |
Added a VFP utility function for future use.
|
| 968d32c2b6160c19c2308793dca6d747cbfea8fe |
|
12-Jun-2009 |
Andy McFadden <fadden@android.com> |
Rename vfp to arm-vfp.
|
| 2717622484eb0f7ad537275f7260b2f93324eda2 |
|
09-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
Makes the primary Jit table growable. Also includes a change suggested earlier by Dan to use a pre-defined mask in the hash function. Reduce the default JitTable size from 2048 entries to 512 entries.
Update per Ben's comments.
|
| 445194bc141dc67e2f678aa1bbd5e59ca66254e5 |
|
08-Jun-2009 |
Andy McFadden <fadden@android.com> |
Correct instruction width for move-wide/16.
We were advancing the PC by 2 code units instead of 3, which made the VM
crash whenever the instruction was used.
|
| 46cd5b63c29d3284a9ff3e0d0711fb136f409313 |
|
06-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
Support for stopping all threads in a Jit environment.
|
| 1da12167d913efde56ec3b40491524b051679f2c |
|
06-Jun-2009 |
Andy McFadden <fadden@android.com> |
Swap the meaning of r7 and r8.
This swaps rIBASE and rINST, so that we can access rINST with 16-bit
THUMB instructions.
|
| ba4fc8bfc1bccae048403bd1cea3b869dca61dd7 |
|
01-Jun-2009 |
Ben Cheng <bccheng@android.com> |
Initial port of the Dalvik JIT enging to the internal repository.
Fixed files with trailing spaces.
Addressed review comments from Dan.
Addressed review comments from fadden.
Addressed review comments from Dan x 2.
Addressed review comments from Dan x 3.
|
| 38214bbeeb2980609919978f17b009d896023491 |
|
30-May-2009 |
Andy McFadden <fadden@android.com> |
Move stuff around in an attempt to make VFP faster.
No effect on floating-point benchmarks. I suspect I've just moving
instructions from one delay slot to another, but I feel a little better
because the delay is in the VFP co-processor instead of the ARM CPU.
|
| a80b76553c2b9f33c4063ae8c69c5362d961de81 |
|
19-May-2009 |
Andy McFadden <fadden@android.com> |
Added basic VFP support to Dalvik interpreter.
This adds opcode handlers for all instructions that have a VFP equivalent
or (for the compare operations) near-equivalent.
The inclusion of VFP is keyed off of TARGET_ARCH_VERSION, so enabling
this requires setting "TARGET_ARCH_VERSION=armv5te-vfp" in a buildspec.
|