Searched refs:r7 (Results 1 - 25 of 27) sorted by relevance

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/dalvik/vm/compiler/template/armv5te/
H A DTEMPLATE_SAVE_STATE.S4 * Top of stack + 4: r7 value to save
7 * r7 - the value of regMap
10 * with their original values (note that this means r0 and r7 must take
15 stmia r0!, {r7} @ save regMap
16 ldr r7, [r13, #0] @ recover r0 value
17 stmia r0!, {r7} @ save r0
18 ldr r7, [r13, #4] @ recover r7 value
20 pop {r0, r7} @ recover r0, r7
[all...]
H A DTEMPLATE_INVOKE_METHOD_PREDICTED_CHAIN.S31 ldr r7, .LdvmICHitCount
32 ldreq r10, [r7, #0]
34 streq r10, [r7, #0]
37 ldr r7, [r3, #offClassObject_vtable] @ r7 <- this->class->vtable
48 * r7 <- this->class->vtable
H A DTEMPLATE_STRING_INDEXOF.S18 ldr r7, [r0, #STRING_FIELDOFF_OFFSET]
27 * r7: offset
33 add r0, r0, r7, lsl #1
35 /* Save a copy of starting data in r7 */
36 mov r7, r0
56 * r7: original start of string
96 sub r0, r7
101 sub r0, r7
106 sub r0, r7
110 sub r0, r7
[all...]
H A DTEMPLATE_STRING_COMPARETO.S25 ldr r7, [r2, #STRING_FIELDOFF_COUNT]
34 * count: r7/r10
39 subs r11, r7, r10
40 movls r10, r7
59 * r3, r4, r7, r8, r9, r12 available for loading string data
72 ldrh r7, [r2, #2]!
75 subeqs r0, r7, r8
85 ldrh r7, [r2, #2]!
90 subeqs r0, r7, r8
122 mov r7, r1
[all...]
H A Dheader.S65 r7 rINST first 16-bit code unit of current instruction
77 #define rINST r7
H A DTEMPLATE_INVOKE_METHOD_CHAIN.S9 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
15 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
H A DTEMPLATE_INVOKE_METHOD_NO_OPT.S7 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
13 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
H A DTEMPLATE_INVOKE_METHOD_NATIVE.S2 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
7 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
/dalvik/vm/compiler/template/armv5te-vfp/
H A DTEMPLATE_SAVE_STATE.S4 * Top of stack + 4: r7 value to save
7 * r7 - the value of regMap
10 * with their original values (note that this means r0 and r7 must take
15 stmia r0!, {r7} @ save regMap
16 ldr r7, [r13, #0] @ recover r0 value
17 stmia r0!, {r7} @ save r0
18 ldr r7, [r13, #4] @ recover r7 value
22 pop {r0, r7} @ recover r0, r7
[all...]
/dalvik/vm/arch/arm/
H A DCallEABI.S137 .save {r4, r5, r6, r7, r8, r9, ip, lr}
138 stmfd sp!, {r4, r5, r6, r7, r8, r9, ip, lr}
184 @ Stick argv in r7 and advance it past the argv values that will be
191 mov r7, r9
193 addcc r7, r7, #8 @ skip past 2 words, for r2 and r3
195 addcs r7, r7, #4 @ skip past 1 word, for r2
208 ldrcc ip, [r7], #4 @ ip = *r7
[all...]
/dalvik/vm/compiler/template/out/
H A DCompilerTemplateAsm-armv5te-vfp.S72 r7 rINST first 16-bit code unit of current instruction
84 #define rINST r7
235 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
241 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
297 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
303 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
370 ldr r7, .LdvmICHitCount
371 ldreq r10, [r7, #
[all...]
H A DCompilerTemplateAsm-armv7-a-neon.S72 r7 rINST first 16-bit code unit of current instruction
84 #define rINST r7
235 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
241 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
297 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
303 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
370 ldr r7, .LdvmICHitCount
371 ldreq r10, [r7, #
[all...]
H A DCompilerTemplateAsm-armv7-a.S72 r7 rINST first 16-bit code unit of current instruction
84 #define rINST r7
235 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
241 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
297 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
303 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
370 ldr r7, .LdvmICHitCount
371 ldreq r10, [r7, #
[all...]
H A DCompilerTemplateAsm-armv5te.S72 r7 rINST first 16-bit code unit of current instruction
84 #define rINST r7
235 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
241 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
297 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
303 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
370 ldr r7, .LdvmICHitCount
371 ldreq r10, [r7, #
[all...]
/dalvik/vm/arch/sh/
H A DCallSH4ABI.S32 * @param r7 int argc
65 ## r12 ... status of r6, and r7
67 ## bit 1 << 1 : if r7 is available, it contains 1.
127 mov.l @r3+, r7 /* put one arg in r7 */
128 mov #2, r0 /* r7 is not available now. */
146 mov.l @r3+, r6 /* put one arg in r6 and r7 */
147 mov.l @r3+, r7
148 mov #3, r0 /* r6 and r7 are not available now. */
/dalvik/vm/mterp/armv5te/
H A Dheader.S60 r7 rINST first 16-bit code unit of current instruction
72 #define rINST r7
/dalvik/vm/compiler/codegen/arm/Thumb2/
H A DGen.c175 * r7 -> temp to hold new lock value [unlock only]
269 opRegRegImm(cUnit, kOpAnd, r7, r2,
277 storeWordDisp(cUnit, r1, offsetof(Object, lock), r7);
287 LOAD_FUNC_ADDR(cUnit, r7, (int)dvmUnlockObject);
292 opReg(cUnit, kOpBlx, r7);
317 * mov r7, #-1
321 * sub r7, op1lo, op2lo (treat as unsigned)
324 * mov(hi) r7, #-1
325 * mov(!hi) r7, #1
327 * neg r7
[all...]
H A DFactory.c25 static int coreTemps[] = {r0, r1, r2, r3, r4PC, r7, r8, r9, r10, r11, r12};
/dalvik/vm/compiler/codegen/arm/
H A DCodegenDriver.c514 int regIndex = r7; /* Preserved across call */
554 * Using fixed registers here, and counting on r4 and r7 being
559 dvmCompilerLockTemp(cUnit, regIndex); // r7
949 opRegRegImm(cUnit, kOpSub, r7, rFP,
956 storeMultiple(cUnit, r7, regMask);
979 * r7: &newFP[0]
990 opRegRegImm(cUnit, kOpSub, r7, rFP,
1015 storeMultiple(cUnit, r7, regMask);
1029 storeMultiple(cUnit, r7, regMask);
1045 storeMultiple(cUnit, r7, regMas
[all...]
H A DArmLIR.h28 * r7 (rINST) is scratch for Jit
38 * Preserved across C calls: r4, r5, r6, r7, r8, r10, r11
50 * r4, r7 for temps
54 * r4, r7 for temps
222 r7 = 7, enumerator in enum:NativeRegisterPool
H A DRallocUtil.c38 * r4, r7: Temp for translations
47 * r4, r7: Temp for translations
485 dvmCompilerClobber(cUnit, r7);
/dalvik/vm/compiler/codegen/arm/Thumb/
H A DFactory.c25 static int coreTemps[] = {r0, r1, r2, r3, r4PC, r7};
/dalvik/vm/mterp/out/
H A DInterpAsm-armv4t.S67 r7 rINST first 16-bit code unit of current instruction
79 #define rINST r7
H A DInterpAsm-armv5te-vfp.S67 r7 rINST first 16-bit code unit of current instruction
79 #define rINST r7
H A DInterpAsm-armv5te.S67 r7 rINST first 16-bit code unit of current instruction
79 #define rINST r7

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