Searched refs:Reg2 (Results 1 - 13 of 13) sorted by relevance
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrBuilder.h | 84 unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2) { 86 .addReg(Reg2, getKillRegState(isKill2)); 83 addRegReg(const MachineInstrBuilder &MIB, unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2) argument
|
/external/llvm/lib/CodeGen/ |
H A D | TargetInstrInfoImpl.cpp | 79 unsigned Reg2 = MI->getOperand(Idx2).getReg(); local 87 Reg0 = Reg2; 88 } else if (HasDef && Reg0 == Reg2 && 101 .addReg(Reg2, getKillRegState(Reg2IsKill)) 105 .addReg(Reg2, getKillRegState(Reg2IsKill)) 112 MI->getOperand(Idx1).setReg(Reg2);
|
H A D | AggressiveAntiDepBreaker.h | 101 // UnionGroups - Union Reg1's and Reg2's groups to form a new 104 unsigned UnionGroups(unsigned Reg1, unsigned Reg2);
|
H A D | AggressiveAntiDepBreaker.cpp | 80 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) argument 87 unsigned Group2 = GetGroup(Reg2);
|
H A D | StrongPHIElimination.cpp | 441 void StrongPHIElimination::unionRegs(unsigned Reg1, unsigned Reg2) { argument 443 Node *Node2 = RegNodeMap[Reg2]->getLeader();
|
/external/llvm/include/llvm/MC/ |
H A D | MCRegisterInfo.h | 85 bool contains(unsigned Reg1, unsigned Reg2) const { 86 return contains(Reg1) && contains(Reg2);
|
/external/llvm/lib/Target/X86/ |
H A D | X86InstrBuilder.h | 117 unsigned Reg2, bool isKill2) { 119 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0); 115 addRegReg(const MachineInstrBuilder &MIB, unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2) argument
|
H A D | X86FastISel.cpp | 1472 unsigned Reg2 = getRegForValue(Op2); local 1474 if (Reg1 == 0 || Reg2 == 0) 1490 .addReg(Reg1).addReg(Reg2);
|
/external/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 620 CodeGenRegister *Reg2 = i1->second; local 622 if (Reg1 == Reg2) 624 const CodeGenRegister::SubRegMap &SRM2 = Reg2->getSubRegs(); 631 if (Reg2 == Reg3) 714 CodeGenRegister *Reg2 = getReg(RegList[i2]); local 715 CodeGenRegister::Set &Overlaps2 = Map[Reg2]; 716 const CodeGenRegister::SuperRegList &Supers2 = Reg2->getSuperRegs(); 717 // Reg overlaps Reg2 which implies it overlaps supers(Reg2). 718 Overlaps.insert(Reg2); [all...] |
/external/llvm/include/llvm/Target/ |
H A D | TargetRegisterInfo.h | 86 bool contains(unsigned Reg1, unsigned Reg2) const { 87 return MC->contains(Reg1, Reg2);
|
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 127 unsigned Reg2 = MI->getOperand(2).getReg(); local 147 unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 151 .addReg(Reg2, getKillRegState(Reg2IsKill)) 158 MI->getOperand(0).setReg(Reg2); 160 MI->getOperand(1).setReg(Reg2);
|
/external/llvm/lib/Target/ARM/ |
H A D | Thumb2SizeReduction.cpp | 607 unsigned Reg2 = MI->getOperand(2).getReg(); local 608 if (Entry.LowRegs2 && !isARMLowRegister(Reg2))
|
/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 1776 unsigned Reg2 = State.AllocateReg(IntRegs, IntRegsSize); local 1777 if (Reg2 == Mips::A1 || Reg2 == Mips::A3) 2298 unsigned Reg2 = AddLiveIn(DAG.getMachineFunction(), local 2300 SDValue ArgValue2 = DAG.getCopyFromReg(Chain, dl, Reg2, RegVT);
|
Completed in 233 milliseconds