Searched refs:getRegister (Results 1 - 25 of 36) sorted by relevance

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/external/llvm/lib/Target/Alpha/
H A DAlphaISelDAGToDAG.cpp196 return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
203 return CurDAG->getRegister(GlobalRetAddr, TLI.getPointerTy()).getNode();
290 T, CurDAG->getRegister(Alpha::F31, T),
291 CurDAG->getRegister(Alpha::F31, T));
294 T, CurDAG->getRegister(Alpha::F31, T),
295 CurDAG->getRegister(Alpha::F31, T));
334 CurDAG->getRegister(Alpha::F31, MVT::f64));
351 CurDAG->getRegister(Alpha::R31, MVT::i64),
/external/llvm/lib/Target/MBlaze/
H A DMBlazeISelDAGToDAG.cpp168 Base = CurDAG->getRegister(MBlaze::R0, CN->getValueType(0));
184 return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
228 SDValue R20Reg = CurDAG->getRegister(MBlaze::R20, MVT::i32);
235 SDValue GPReg = CurDAG->getRegister(MBlaze::R15, MVT::i32);
H A DMBlazeISelLowering.cpp811 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
963 StackPtr = DAG.getRegister(StackReg, getPointerTy());
1052 SDValue DReg = DAG.getRegister(Reg, MVT::i32);
/external/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp70 return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
133 R2 = CurDAG->getRegister(SP::G0, MVT::i32);
159 TopPart = CurDAG->getRegister(SP::G0, MVT::i32);
162 CurDAG->getRegister(SP::G0, MVT::i32)), 0);
H A DSparcISelLowering.cpp437 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
454 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
487 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
497 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
528 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
579 Ops.push_back(DAG.getRegister(Reg, RegsToPass[i].second.getValueType()));
1013 DAG.getRegister(SP::I6, MVT::i32),
/external/llvm/include/llvm/MC/
H A DMCWin64EH.h59 unsigned getRegister() const { return Register; } function in class:llvm::MCWin64EHInstruction
H A DMCRegisterInfo.h67 /// getRegister - Return the specified register in the class.
69 unsigned getRegister(unsigned i) const { function in class:llvm::MCRegisterClass
/external/llvm/lib/MC/
H A DMCWin64EH.cpp73 b2 |= (inst.getRegister() & 0x0F) << 4;
102 b2 |= (inst.getRegister() & 0x0F) << 4;
112 b2 |= (inst.getRegister() & 0x0F) << 4;
175 frame = (frameInst.getRegister() & 0x0F) |
/external/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.cpp107 return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
127 Base = CurDAG->getRegister(GPReg, ValTy);
136 Base = CurDAG->getRegister(GPReg, ValTy);
316 Node->getValueType(0), CurDAG->getRegister(SrcReg, MVT::i32));
H A DMipsISelLowering.cpp1462 SDValue GP = DAG.getRegister(Mips::GP, MVT::i32);
2122 Callee = DAG.getRegister(Mips::T9, MVT::i32);
2147 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
2214 SDValue Store = DAG.getStore(Chain, dl, DAG.getRegister(Reg, MVT::i32),
2459 Chain, DAG.getRegister(Mips::RA, MVT::i32), Flag);
2462 Chain, DAG.getRegister(Mips::RA, MVT::i32));
/external/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp629 Offset = CurDAG->getRegister(0, MVT::i32);
646 Offset = CurDAG->getRegister(0, MVT::i32);
663 Offset = CurDAG->getRegister(0, MVT::i32);
771 Offset = CurDAG->getRegister(0, MVT::i32);
790 Offset = CurDAG->getRegister(0, MVT::i32);
822 Offset = CurDAG->getRegister(0, MVT::i32);
836 Offset = CurDAG->getRegister(0, MVT::i32);
863 Offset = CurDAG->getRegister(0, MVT::i32);
948 Offset = CurDAG->getRegister(0, MVT::i32);
1386 CurDAG->getRegister(
[all...]
/external/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp398 AM12.Base.Reg = CurDAG->getRegister(0, VT);
441 AM.Base.Reg = CurDAG->getRegister(0, VT);
489 AM12.Base.Reg = CurDAG->getRegister(0, VT);
493 AM12.IndexReg = CurDAG->getRegister(0, VT);
533 AM.Base.Reg = CurDAG->getRegister(0, VT);
537 AM.IndexReg = CurDAG->getRegister(0, VT);
559 AM.Base.Reg = CurDAG->getRegister(0, VT);
566 AM.IndexReg = CurDAG->getRegister(0, VT);
H A DSystemZISelLowering.cpp484 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
/external/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp260 Segment = CurDAG->getRegister(0, MVT::i32);
599 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
602 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
661 AM.setBaseReg(CurDAG->getRegister(X86::RIP, MVT::i64));
723 AM.Base_Reg = CurDAG->getRegister(X86::RIP, MVT::i64);
1149 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
1151 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
1160 AM.Base_Reg = CurDAG->getRegister(0, VT);
1164 AM.IndexReg = CurDAG->getRegister(0, VT);
1227 SDValue T = CurDAG->getRegister(
[all...]
/external/llvm/include/llvm/Target/
H A DTargetRegisterInfo.h73 /// getRegister - Return the specified register in the class.
75 unsigned getRegister(unsigned i) const { function in class:llvm::TargetRegisterClass
76 return MC->getRegister(i);
/external/llvm/lib/Target/PTX/
H A DPTXISelDAGToDAG.cpp133 SDValue Pred = CurDAG->getRegister(PTX::NoRegister, MVT::i1);
171 SDValue Pred = CurDAG->getRegister(PTX::NoRegister, MVT::i1);
H A DPTXInstrInfo.cpp321 SDValue predReg = DAG->getRegister(PTX::NoRegister, MVT::i1);
330 SDValue predReg = DAG->getRegister(PTX::NoRegister, MVT::i1);
H A DPTXISelLowering.cpp328 SDValue OutReg = DAG.getRegister(Reg, RegVT);
/external/llvm/utils/TableGen/
H A DCodeGenInstruction.h305 Record *getRegister() const { assert(isReg()); return R; } function in struct:llvm::CodeGenInstAlias::ResultOperand
/external/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h394 SDValue getRegister(unsigned Reg, EVT VT);
401 getRegister(Reg, N.getValueType()), N);
410 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
424 SDValue Ops[] = { Chain, getRegister(Reg, VT) };
434 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
/external/llvm/lib/CodeGen/
H A DExecutionDepsFix.cpp476 for (const unsigned *AI = TRI->getOverlaps(RC->getRegister(i)); *AI; ++AI)
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp258 AM.Base.Reg = CurDAG->getRegister(0, VT);
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp908 Base = DAG.getRegister(PPCSubTarget.isPPC64() ? PPC::X0 : PPC::R0,
957 Base = DAG.getRegister(PPCSubTarget.isPPC64() ? PPC::X0 : PPC::R0,
1023 Base = DAG.getRegister(PPCSubTarget.isPPC64() ? PPC::X0 : PPC::R0,
1209 DAG.getRegister(PPC::X2, MVT::i64));
2491 StackPtr = DAG.getRegister(PPC::X1, MVT::i64);
2493 StackPtr = DAG.getRegister(PPC::R1, MVT::i32);
2683 Ops.push_back(DAG.getRegister(isPPC64 ? PPC::CTR8 : PPC::CTR, PtrVT));
2698 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
2947 SDValue StackPtr = DAG.getRegister(PPC::R1, MVT::i32);
3112 StackPtr = DAG.getRegister(PP
[all...]
H A DPPCISelDAGToDAG.cpp251 return CurDAG->getRegister(GlobalBaseReg,
696 SDValue CR7Reg = CurDAG->getRegister(PPC::CR7, MVT::i32);
/external/llvm/lib/Target/CellSPU/
H A DSPUISelLowering.cpp1235 SDValue ArgVal = DAG.getRegister(VReg, MVT::v16i8);
1297 SDValue StackPtr = DAG.getRegister(SPU::R1, MVT::i32);
1423 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
1923 DAG.getRegister(SPU::R1, PtrVT),
2186 DAG.getRegister(SPU::R1, PtrVT),

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