1// RUN: %clang_cc1 %s -emit-llvm -o - -triple=i686-apple-darwin9 | FileCheck %s
2
3int atomic(void) {
4  // non-sensical test for sync functions
5  int old;
6  int val = 1;
7  char valc = 1;
8  _Bool valb = 0;
9  unsigned int uval = 1;
10  int cmp = 0;
11
12  old = __sync_fetch_and_add(&val, 1);
13  // CHECK: atomicrmw add i32* %val, i32 1 seq_cst
14
15  old = __sync_fetch_and_sub(&valc, 2);
16  // CHECK: atomicrmw sub i8* %valc, i8 2 seq_cst
17
18  old = __sync_fetch_and_min(&val, 3);
19  // CHECK: atomicrmw min i32* %val, i32 3 seq_cst
20
21  old = __sync_fetch_and_max(&val, 4);
22  // CHECK: atomicrmw max i32* %val, i32 4 seq_cst
23
24  old = __sync_fetch_and_umin(&uval, 5u);
25  // CHECK: atomicrmw umin i32* %uval, i32 5 seq_cst
26
27  old = __sync_fetch_and_umax(&uval, 6u);
28  // CHECK: atomicrmw umax i32* %uval, i32 6 seq_cst
29
30  old = __sync_lock_test_and_set(&val, 7);
31  // CHECK: atomicrmw xchg i32* %val, i32 7 seq_cst
32
33  old = __sync_swap(&val, 8);
34  // CHECK: atomicrmw xchg i32* %val, i32 8 seq_cst
35
36  old = __sync_val_compare_and_swap(&val, 4, 1976);
37  // CHECK: cmpxchg i32* %val, i32 4, i32 1976 seq_cst
38
39  old = __sync_bool_compare_and_swap(&val, 4, 1976);
40  // CHECK: cmpxchg i32* %val, i32 4, i32 1976 seq_cst
41
42  old = __sync_fetch_and_and(&val, 0x9);
43  // CHECK: atomicrmw and i32* %val, i32 9 seq_cst
44
45  old = __sync_fetch_and_or(&val, 0xa);
46  // CHECK: atomicrmw or i32* %val, i32 10 seq_cst
47
48  old = __sync_fetch_and_xor(&val, 0xb);
49  // CHECK: atomicrmw xor i32* %val, i32 11 seq_cst
50
51  old = __sync_add_and_fetch(&val, 1);
52  // CHECK: atomicrmw add i32* %val, i32 1 seq_cst
53
54  old = __sync_sub_and_fetch(&val, 2);
55  // CHECK: atomicrmw sub i32* %val, i32 2 seq_cst
56
57  old = __sync_and_and_fetch(&valc, 3);
58  // CHECK: atomicrmw and i8* %valc, i8 3 seq_cst
59
60  old = __sync_or_and_fetch(&valc, 4);
61  // CHECK: atomicrmw or i8* %valc, i8 4 seq_cst
62
63  old = __sync_xor_and_fetch(&valc, 5);
64  // CHECK: atomicrmw xor i8* %valc, i8 5 seq_cst
65
66  __sync_val_compare_and_swap((void **)0, (void *)0, (void *)0);
67  // CHECK: cmpxchg i32* null, i32 0, i32 0 seq_cst
68
69  if ( __sync_val_compare_and_swap(&valb, 0, 1)) {
70    // CHECK: cmpxchg i8* %valb, i8 0, i8 1 seq_cst
71    old = 42;
72  }
73
74  __sync_bool_compare_and_swap((void **)0, (void *)0, (void *)0);
75  // CHECK: cmpxchg i32* null, i32 0, i32 0 seq_cst
76
77  __sync_lock_release(&val);
78  // CHECK: store atomic {{.*}} release, align 4
79
80  __sync_synchronize ();
81  // CHECK: fence seq_cst
82
83  return old;
84}
85
86// CHECK: @release_return
87void release_return(int *lock) {
88  // Ensure this is actually returning void all the way through.
89  return __sync_lock_release(lock);
90  // CHECK: store atomic {{.*}} release, align 4
91}
92
93
94// rdar://8461279 - Atomics with address spaces.
95// CHECK: @addrspace
96void addrspace(int  __attribute__((address_space(256))) * P) {
97  __sync_bool_compare_and_swap(P, 0, 1);
98  // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst
99
100  __sync_val_compare_and_swap(P, 0, 1);
101  // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst
102
103  __sync_xor_and_fetch(P, 123);
104  // CHECK: atomicrmw xor i32 addrspace(256)*{{.*}}, i32 123 seq_cst
105}
106