1#ifndef __ASM_IO_APIC_H
2#define __ASM_IO_APIC_H
3
4#include <asm/types.h>
5#include <asm/mpspec.h>
6#include <asm/apicdef.h>
7
8/*
9 * Intel IO-APIC support for SMP and UP systems.
10 *
11 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
12 */
13
14/*
15 * The structure of the IO-APIC:
16 */
17union IO_APIC_reg_00 {
18	u32	raw;
19	struct {
20		u32	__reserved_2	: 14,
21			LTS		:  1,
22			delivery_type	:  1,
23			__reserved_1	:  8,
24			ID		:  8;
25	} __attribute__ ((packed)) bits;
26};
27
28union IO_APIC_reg_01 {
29	u32	raw;
30	struct {
31		u32	version		:  8,
32			__reserved_2	:  7,
33			PRQ		:  1,
34			entries		:  8,
35			__reserved_1	:  8;
36	} __attribute__ ((packed)) bits;
37};
38
39union IO_APIC_reg_02 {
40	u32	raw;
41	struct {
42		u32	__reserved_2	: 24,
43			arbitration	:  4,
44			__reserved_1	:  4;
45	} __attribute__ ((packed)) bits;
46};
47
48union IO_APIC_reg_03 {
49	u32	raw;
50	struct {
51		u32	boot_DT		:  1,
52			__reserved_1	: 31;
53	} __attribute__ ((packed)) bits;
54};
55
56enum ioapic_irq_destination_types {
57	dest_Fixed = 0,
58	dest_LowestPrio = 1,
59	dest_SMI = 2,
60	dest__reserved_1 = 3,
61	dest_NMI = 4,
62	dest_INIT = 5,
63	dest__reserved_2 = 6,
64	dest_ExtINT = 7
65};
66
67struct IO_APIC_route_entry {
68	__u32	vector		:  8,
69		delivery_mode	:  3,	/* 000: FIXED
70					 * 001: lowest prio
71					 * 111: ExtINT
72					 */
73		dest_mode	:  1,	/* 0: physical, 1: logical */
74		delivery_status	:  1,
75		polarity	:  1,
76		irr		:  1,
77		trigger		:  1,	/* 0: edge, 1: level */
78		mask		:  1,	/* 0: enabled, 1: disabled */
79		__reserved_2	: 15;
80
81	union {		struct { __u32
82					__reserved_1	: 24,
83					physical_dest	:  4,
84					__reserved_2	:  4;
85			} physical;
86
87			struct { __u32
88					__reserved_1	: 24,
89					logical_dest	:  8;
90			} logical;
91	} dest;
92
93} __attribute__ ((packed));
94
95#ifdef CONFIG_X86_IO_APIC
96
97/*
98 * # of IO-APICs and # of IRQ routing registers
99 */
100extern int nr_ioapics;
101extern int nr_ioapic_registers[MAX_IO_APICS];
102
103/*
104 * MP-BIOS irq configuration table structures:
105 */
106
107/* I/O APIC entries */
108extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
109
110/* # of MP IRQ source entries */
111extern int mp_irq_entries;
112
113/* MP IRQ source entries */
114extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
115
116/* non-0 if default (table-less) MP configuration */
117extern int mpc_default_type;
118
119/* Older SiS APIC requires we rewrite the index register */
120extern int sis_apic_bug;
121
122/* 1 if "noapic" boot option passed */
123extern int skip_ioapic_setup;
124
125static inline void disable_ioapic_setup(void)
126{
127	skip_ioapic_setup = 1;
128}
129
130static inline int ioapic_setup_disabled(void)
131{
132	return skip_ioapic_setup;
133}
134
135/*
136 * If we use the IO-APIC for IRQ routing, disable automatic
137 * assignment of PCI IRQ's.
138 */
139#define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
140
141#ifdef CONFIG_ACPI
142extern int io_apic_get_unique_id (int ioapic, int apic_id);
143extern int io_apic_get_version (int ioapic);
144extern int io_apic_get_redir_entries (int ioapic);
145extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low);
146extern int timer_uses_ioapic_pin_0;
147#endif /* CONFIG_ACPI */
148
149extern int (*ioapic_renumber_irq)(int ioapic, int irq);
150
151#else  /* !CONFIG_X86_IO_APIC */
152#define io_apic_assign_pci_irqs 0
153#endif
154
155#endif
156