TargetInstrInfoImpl.cpp revision d62e06c53b8b7e555617dc9b24b98c007d63de5d 
1//===-- TargetInstrInfoImpl.cpp - Target Instruction Information ----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the TargetInstrInfoImpl class, it just provides default
11// implementations of various methods.
12//
13//===----------------------------------------------------------------------===//
14
15#include "llvm/Target/TargetInstrInfo.h"
16#include "llvm/ADT/SmallVector.h"
17#include "llvm/CodeGen/MachineFrameInfo.h"
18#include "llvm/CodeGen/MachineInstr.h"
19#include "llvm/CodeGen/MachineInstrBuilder.h"
20#include "llvm/CodeGen/PseudoSourceValue.h"
21using namespace llvm;
22
23// commuteInstruction - The default implementation of this method just exchanges
24// operand 1 and 2.
25MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI,
26                                                      bool NewMI) const {
27  assert(MI->getOperand(1).isReg() && MI->getOperand(2).isReg() &&
28         "This only knows how to commute register operands so far");
29  unsigned Reg1 = MI->getOperand(1).getReg();
30  unsigned Reg2 = MI->getOperand(2).getReg();
31  bool Reg1IsKill = MI->getOperand(1).isKill();
32  bool Reg2IsKill = MI->getOperand(2).isKill();
33  bool ChangeReg0 = false;
34  if (MI->getOperand(0).getReg() == Reg1) {
35    // Must be two address instruction!
36    assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) &&
37           "Expecting a two-address instruction!");
38    Reg2IsKill = false;
39    ChangeReg0 = true;
40  }
41
42  if (NewMI) {
43    // Create a new instruction.
44    unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg();
45    bool Reg0IsDead = MI->getOperand(0).isDead();
46    MachineFunction &MF = *MI->getParent()->getParent();
47    return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
48      .addReg(Reg0, true, false, false, Reg0IsDead)
49      .addReg(Reg2, false, false, Reg2IsKill)
50      .addReg(Reg1, false, false, Reg1IsKill);
51  }
52
53  if (ChangeReg0)
54    MI->getOperand(0).setReg(Reg2);
55  MI->getOperand(2).setReg(Reg1);
56  MI->getOperand(1).setReg(Reg2);
57  MI->getOperand(2).setIsKill(Reg1IsKill);
58  MI->getOperand(1).setIsKill(Reg2IsKill);
59  return MI;
60}
61
62/// CommuteChangesDestination - Return true if commuting the specified
63/// instruction will also changes the destination operand. Also return the
64/// current operand index of the would be new destination register by
65/// reference. This can happen when the commutable instruction is also a
66/// two-address instruction.
67bool TargetInstrInfoImpl::CommuteChangesDestination(MachineInstr *MI,
68                                                    unsigned &OpIdx) const{
69  assert(MI->getOperand(1).isReg() && MI->getOperand(2).isReg() &&
70         "This only knows how to commute register operands so far");
71  if (MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) {
72    // Must be two address instruction!
73    assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) &&
74           "Expecting a two-address instruction!");
75    OpIdx = 2;
76    return true;
77  }
78  return false;
79}
80
81
82bool TargetInstrInfoImpl::PredicateInstruction(MachineInstr *MI,
83                            const SmallVectorImpl<MachineOperand> &Pred) const {
84  bool MadeChange = false;
85  const TargetInstrDesc &TID = MI->getDesc();
86  if (!TID.isPredicable())
87    return false;
88
89  for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) {
90    if (TID.OpInfo[i].isPredicate()) {
91      MachineOperand &MO = MI->getOperand(i);
92      if (MO.isReg()) {
93        MO.setReg(Pred[j].getReg());
94        MadeChange = true;
95      } else if (MO.isImm()) {
96        MO.setImm(Pred[j].getImm());
97        MadeChange = true;
98      } else if (MO.isMBB()) {
99        MO.setMBB(Pred[j].getMBB());
100        MadeChange = true;
101      }
102      ++j;
103    }
104  }
105  return MadeChange;
106}
107
108void TargetInstrInfoImpl::reMaterialize(MachineBasicBlock &MBB,
109                                        MachineBasicBlock::iterator I,
110                                        unsigned DestReg,
111                                        const MachineInstr *Orig) const {
112  MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
113  MI->getOperand(0).setReg(DestReg);
114  MBB.insert(I, MI);
115}
116
117unsigned
118TargetInstrInfoImpl::GetFunctionSizeInBytes(const MachineFunction &MF) const {
119  unsigned FnSize = 0;
120  for (MachineFunction::const_iterator MBBI = MF.begin(), E = MF.end();
121       MBBI != E; ++MBBI) {
122    const MachineBasicBlock &MBB = *MBBI;
123    for (MachineBasicBlock::const_iterator I = MBB.begin(),E = MBB.end();
124         I != E; ++I)
125      FnSize += GetInstSizeInBytes(I);
126  }
127  return FnSize;
128}
129
130/// foldMemoryOperand - Attempt to fold a load or store of the specified stack
131/// slot into the specified machine instruction for the specified operand(s).
132/// If this is possible, a new instruction is returned with the specified
133/// operand folded, otherwise NULL is returned. The client is responsible for
134/// removing the old instruction and adding the new one in the instruction
135/// stream.
136MachineInstr*
137TargetInstrInfo::foldMemoryOperand(MachineFunction &MF,
138                                   MachineInstr* MI,
139                                   const SmallVectorImpl<unsigned> &Ops,
140                                   int FrameIndex) const {
141  unsigned Flags = 0;
142  for (unsigned i = 0, e = Ops.size(); i != e; ++i)
143    if (MI->getOperand(Ops[i]).isDef())
144      Flags |= MachineMemOperand::MOStore;
145    else
146      Flags |= MachineMemOperand::MOLoad;
147
148  // Ask the target to do the actual folding.
149  MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FrameIndex);
150  if (!NewMI) return 0;
151
152  assert((!(Flags & MachineMemOperand::MOStore) ||
153          NewMI->getDesc().mayStore()) &&
154         "Folded a def to a non-store!");
155  assert((!(Flags & MachineMemOperand::MOLoad) ||
156          NewMI->getDesc().mayLoad()) &&
157         "Folded a use to a non-load!");
158  const MachineFrameInfo &MFI = *MF.getFrameInfo();
159  assert(MFI.getObjectOffset(FrameIndex) != -1);
160  MachineMemOperand MMO(PseudoSourceValue::getFixedStack(FrameIndex),
161                        Flags,
162                        MFI.getObjectOffset(FrameIndex),
163                        MFI.getObjectSize(FrameIndex),
164                        MFI.getObjectAlignment(FrameIndex));
165  NewMI->addMemOperand(MF, MMO);
166
167  return NewMI;
168}
169
170/// foldMemoryOperand - Same as the previous version except it allows folding
171/// of any load and store from / to any address, not just from a specific
172/// stack slot.
173MachineInstr*
174TargetInstrInfo::foldMemoryOperand(MachineFunction &MF,
175                                   MachineInstr* MI,
176                                   const SmallVectorImpl<unsigned> &Ops,
177                                   MachineInstr* LoadMI) const {
178  assert(LoadMI->getDesc().canFoldAsLoad() && "LoadMI isn't foldable!");
179#ifndef NDEBUG
180  for (unsigned i = 0, e = Ops.size(); i != e; ++i)
181    assert(MI->getOperand(Ops[i]).isUse() && "Folding load into def!");
182#endif
183
184  // Ask the target to do the actual folding.
185  MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, LoadMI);
186  if (!NewMI) return 0;
187
188  // Copy the memoperands from the load to the folded instruction.
189  for (std::list<MachineMemOperand>::iterator I = LoadMI->memoperands_begin(),
190       E = LoadMI->memoperands_end(); I != E; ++I)
191    NewMI->addMemOperand(MF, *I);
192
193  return NewMI;
194}
195