95b0899ad3412596baa600b22ea2ecd7dd1acc43 |
04-Apr-2012 |
Evgeniy Stepanov <eugenis@google.com> |
Support building Dalvik with AddressSanitizer. Change-Id: I007c5080081a4a66b39fa6b539afd8f00fd8ce0f
rmv5te/debug.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
|
3185a41fe8b3223003a07685c1acdf44bfe148d0 |
30-Jan-2012 |
buzbee <buzbee@google.com> |
x86 mterp debug/profile fix (issue 5938080) When profiling or debugging is active, the Dalvik vm calls out to a helper function to handle any pending debug/profile activities before and after native invokes. The assembly code in footer.s was passing arguments to these routines in the wrong oder. Issue 5938080 Change-Id: I425eb2bfbee504a70eda8b382f4cf7340e458241
/gotoTargets.cpp
ut/InterpAsm-x86.S
ut/InterpC-allstubs.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
86/footer.S
|
f36ff048fa354bcc7597a187002728106a8b9346 |
18-Jan-2012 |
Ben Cheng <bccheng@google.com> |
Bug fix for control-flow construction involving nested loops. Bug: 5884080 Change-Id: Ic2f42abae3e71f9c0729984902396f92902184a3
ommon/asm-constants.h
|
c1a4ab9c313d8a3d12007f2dbef7b5a6fa4ac2ef |
06-Jan-2012 |
Steve Block <steveblock@google.com> |
Rename (IF_)LOGE(_IF) to (IF_)ALOGE(_IF) DO NOT MERGE See https://android-git.corp.google.com/g/#/c/157220 Also fix an occurrence of LOGW missed in an earlier change. Bug: 5449033 Change-Id: I2e3b23839e6dcd09015d6402280e9300c75e3406
terp.cpp
/OP_UNUSED_FF.cpp
/gotoTargets.cpp
/header.cpp
ommon/asm-constants.h
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
e8e1ddccd616e8226b7cc1e4e9fdb327429249e8 |
06-Jan-2012 |
Steve Block <steveblock@google.com> |
Rename (IF_)LOGW(_IF) to (IF_)ALOGW(_IF) DO NOT MERGE See https://android-git.corp.google.com/g/157065 Bug: 5449033 Change-Id: Ia5d301248024df26c2a29dabdfe738e39ec87c82
/gotoTargets.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
4308417beec548c2b2c06ecec4f7f4a965b09fb2 |
04-Jan-2012 |
Steve Block <steveblock@google.com> |
Rename (IF_)LOGI(_IF) to (IF_)ALOGI(_IF) DO NOT MERGE See https://android-git.corp.google.com/g/156801 Bug: 5449033 Change-Id: Ic558031c75b3702d90eb78bd730501ae5d3c077b
terp.cpp
|
ab35b50311951feea3782151dd5422ee944685c2 |
05-Jan-2012 |
Elliott Hughes <enh@google.com> |
Remove unsupported experimental opcodes. External developers were starting to try to get themselves into trouble with this stuff... Change-Id: I2b03bfeaa8c98b6a994bc7924fc8dcf4e4d4f6cb
rmv5te/ALT_OP_DISPATCH_FF.S
rmv5te/OP_CHECK_CAST_JUMBO.S
rmv5te/OP_CONST_CLASS_JUMBO.S
rmv5te/OP_DISPATCH_FF.S
rmv5te/OP_FILLED_NEW_ARRAY_JUMBO.S
rmv5te/OP_IGET_BOOLEAN_JUMBO.S
rmv5te/OP_IGET_BYTE_JUMBO.S
rmv5te/OP_IGET_CHAR_JUMBO.S
rmv5te/OP_IGET_JUMBO.S
rmv5te/OP_IGET_OBJECT_JUMBO.S
rmv5te/OP_IGET_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_IGET_SHORT_JUMBO.S
rmv5te/OP_IGET_VOLATILE_JUMBO.S
rmv5te/OP_IGET_WIDE_JUMBO.S
rmv5te/OP_IGET_WIDE_VOLATILE_JUMBO.S
rmv5te/OP_INSTANCE_OF_JUMBO.S
rmv5te/OP_INVOKE_DIRECT_JUMBO.S
rmv5te/OP_INVOKE_INTERFACE_JUMBO.S
rmv5te/OP_INVOKE_OBJECT_INIT_JUMBO.S
rmv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
rmv5te/OP_INVOKE_STATIC_JUMBO.S
rmv5te/OP_INVOKE_SUPER_JUMBO.S
rmv5te/OP_INVOKE_VIRTUAL_JUMBO.S
rmv5te/OP_IPUT_BOOLEAN_JUMBO.S
rmv5te/OP_IPUT_BYTE_JUMBO.S
rmv5te/OP_IPUT_CHAR_JUMBO.S
rmv5te/OP_IPUT_JUMBO.S
rmv5te/OP_IPUT_OBJECT_JUMBO.S
rmv5te/OP_IPUT_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_IPUT_SHORT_JUMBO.S
rmv5te/OP_IPUT_VOLATILE_JUMBO.S
rmv5te/OP_IPUT_WIDE_JUMBO.S
rmv5te/OP_IPUT_WIDE_VOLATILE_JUMBO.S
rmv5te/OP_NEW_ARRAY_JUMBO.S
rmv5te/OP_NEW_INSTANCE_JUMBO.S
rmv5te/OP_SGET_BOOLEAN_JUMBO.S
rmv5te/OP_SGET_BYTE_JUMBO.S
rmv5te/OP_SGET_CHAR_JUMBO.S
rmv5te/OP_SGET_JUMBO.S
rmv5te/OP_SGET_OBJECT_JUMBO.S
rmv5te/OP_SGET_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_SGET_SHORT_JUMBO.S
rmv5te/OP_SGET_VOLATILE_JUMBO.S
rmv5te/OP_SGET_WIDE_JUMBO.S
rmv5te/OP_SGET_WIDE_VOLATILE_JUMBO.S
rmv5te/OP_SPUT_BOOLEAN_JUMBO.S
rmv5te/OP_SPUT_BYTE_JUMBO.S
rmv5te/OP_SPUT_CHAR_JUMBO.S
rmv5te/OP_SPUT_JUMBO.S
rmv5te/OP_SPUT_OBJECT_JUMBO.S
rmv5te/OP_SPUT_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_SPUT_SHORT_JUMBO.S
rmv5te/OP_SPUT_VOLATILE_JUMBO.S
rmv5te/OP_SPUT_WIDE_JUMBO.S
rmv5te/OP_SPUT_WIDE_VOLATILE_JUMBO.S
rmv5te/OP_THROW_VERIFICATION_ERROR_JUMBO.S
rmv5te/OP_UNUSED_27FF.S
rmv5te/OP_UNUSED_28FF.S
rmv5te/OP_UNUSED_29FF.S
rmv5te/OP_UNUSED_2AFF.S
rmv5te/OP_UNUSED_2BFF.S
rmv5te/OP_UNUSED_2CFF.S
rmv5te/OP_UNUSED_2DFF.S
rmv5te/OP_UNUSED_2EFF.S
rmv5te/OP_UNUSED_2FFF.S
rmv5te/OP_UNUSED_30FF.S
rmv5te/OP_UNUSED_31FF.S
rmv5te/OP_UNUSED_32FF.S
rmv5te/OP_UNUSED_33FF.S
rmv5te/OP_UNUSED_34FF.S
rmv5te/OP_UNUSED_35FF.S
rmv5te/OP_UNUSED_36FF.S
rmv5te/OP_UNUSED_37FF.S
rmv5te/OP_UNUSED_38FF.S
rmv5te/OP_UNUSED_39FF.S
rmv5te/OP_UNUSED_3AFF.S
rmv5te/OP_UNUSED_3BFF.S
rmv5te/OP_UNUSED_3CFF.S
rmv5te/OP_UNUSED_3DFF.S
rmv5te/OP_UNUSED_3EFF.S
rmv5te/OP_UNUSED_3FFF.S
rmv5te/OP_UNUSED_40FF.S
rmv5te/OP_UNUSED_41FF.S
rmv5te/OP_UNUSED_42FF.S
rmv5te/OP_UNUSED_43FF.S
rmv5te/OP_UNUSED_44FF.S
rmv5te/OP_UNUSED_45FF.S
rmv5te/OP_UNUSED_46FF.S
rmv5te/OP_UNUSED_47FF.S
rmv5te/OP_UNUSED_48FF.S
rmv5te/OP_UNUSED_49FF.S
rmv5te/OP_UNUSED_4AFF.S
rmv5te/OP_UNUSED_4BFF.S
rmv5te/OP_UNUSED_4CFF.S
rmv5te/OP_UNUSED_4DFF.S
rmv5te/OP_UNUSED_4EFF.S
rmv5te/OP_UNUSED_4FFF.S
rmv5te/OP_UNUSED_50FF.S
rmv5te/OP_UNUSED_51FF.S
rmv5te/OP_UNUSED_52FF.S
rmv5te/OP_UNUSED_53FF.S
rmv5te/OP_UNUSED_54FF.S
rmv5te/OP_UNUSED_55FF.S
rmv5te/OP_UNUSED_56FF.S
rmv5te/OP_UNUSED_57FF.S
rmv5te/OP_UNUSED_58FF.S
rmv5te/OP_UNUSED_59FF.S
rmv5te/OP_UNUSED_5AFF.S
rmv5te/OP_UNUSED_5BFF.S
rmv5te/OP_UNUSED_5CFF.S
rmv5te/OP_UNUSED_5DFF.S
rmv5te/OP_UNUSED_5EFF.S
rmv5te/OP_UNUSED_5FFF.S
rmv5te/OP_UNUSED_60FF.S
rmv5te/OP_UNUSED_61FF.S
rmv5te/OP_UNUSED_62FF.S
rmv5te/OP_UNUSED_63FF.S
rmv5te/OP_UNUSED_64FF.S
rmv5te/OP_UNUSED_65FF.S
rmv5te/OP_UNUSED_66FF.S
rmv5te/OP_UNUSED_67FF.S
rmv5te/OP_UNUSED_68FF.S
rmv5te/OP_UNUSED_69FF.S
rmv5te/OP_UNUSED_6AFF.S
rmv5te/OP_UNUSED_6BFF.S
rmv5te/OP_UNUSED_6CFF.S
rmv5te/OP_UNUSED_6DFF.S
rmv5te/OP_UNUSED_6EFF.S
rmv5te/OP_UNUSED_6FFF.S
rmv5te/OP_UNUSED_70FF.S
rmv5te/OP_UNUSED_71FF.S
rmv5te/OP_UNUSED_72FF.S
rmv5te/OP_UNUSED_73FF.S
rmv5te/OP_UNUSED_74FF.S
rmv5te/OP_UNUSED_75FF.S
rmv5te/OP_UNUSED_76FF.S
rmv5te/OP_UNUSED_77FF.S
rmv5te/OP_UNUSED_78FF.S
rmv5te/OP_UNUSED_79FF.S
rmv5te/OP_UNUSED_7AFF.S
rmv5te/OP_UNUSED_7BFF.S
rmv5te/OP_UNUSED_7CFF.S
rmv5te/OP_UNUSED_7DFF.S
rmv5te/OP_UNUSED_7EFF.S
rmv5te/OP_UNUSED_7FFF.S
rmv5te/OP_UNUSED_80FF.S
rmv5te/OP_UNUSED_81FF.S
rmv5te/OP_UNUSED_82FF.S
rmv5te/OP_UNUSED_83FF.S
rmv5te/OP_UNUSED_84FF.S
rmv5te/OP_UNUSED_85FF.S
rmv5te/OP_UNUSED_86FF.S
rmv5te/OP_UNUSED_87FF.S
rmv5te/OP_UNUSED_88FF.S
rmv5te/OP_UNUSED_89FF.S
rmv5te/OP_UNUSED_8AFF.S
rmv5te/OP_UNUSED_8BFF.S
rmv5te/OP_UNUSED_8CFF.S
rmv5te/OP_UNUSED_8DFF.S
rmv5te/OP_UNUSED_8EFF.S
rmv5te/OP_UNUSED_8FFF.S
rmv5te/OP_UNUSED_90FF.S
rmv5te/OP_UNUSED_91FF.S
rmv5te/OP_UNUSED_92FF.S
rmv5te/OP_UNUSED_93FF.S
rmv5te/OP_UNUSED_94FF.S
rmv5te/OP_UNUSED_95FF.S
rmv5te/OP_UNUSED_96FF.S
rmv5te/OP_UNUSED_97FF.S
rmv5te/OP_UNUSED_98FF.S
rmv5te/OP_UNUSED_99FF.S
rmv5te/OP_UNUSED_9AFF.S
rmv5te/OP_UNUSED_9BFF.S
rmv5te/OP_UNUSED_9CFF.S
rmv5te/OP_UNUSED_9DFF.S
rmv5te/OP_UNUSED_9EFF.S
rmv5te/OP_UNUSED_9FFF.S
rmv5te/OP_UNUSED_A0FF.S
rmv5te/OP_UNUSED_A1FF.S
rmv5te/OP_UNUSED_A2FF.S
rmv5te/OP_UNUSED_A3FF.S
rmv5te/OP_UNUSED_A4FF.S
rmv5te/OP_UNUSED_A5FF.S
rmv5te/OP_UNUSED_A6FF.S
rmv5te/OP_UNUSED_A7FF.S
rmv5te/OP_UNUSED_A8FF.S
rmv5te/OP_UNUSED_A9FF.S
rmv5te/OP_UNUSED_AAFF.S
rmv5te/OP_UNUSED_ABFF.S
rmv5te/OP_UNUSED_ACFF.S
rmv5te/OP_UNUSED_ADFF.S
rmv5te/OP_UNUSED_AEFF.S
rmv5te/OP_UNUSED_AFFF.S
rmv5te/OP_UNUSED_B0FF.S
rmv5te/OP_UNUSED_B1FF.S
rmv5te/OP_UNUSED_B2FF.S
rmv5te/OP_UNUSED_B3FF.S
rmv5te/OP_UNUSED_B4FF.S
rmv5te/OP_UNUSED_B5FF.S
rmv5te/OP_UNUSED_B6FF.S
rmv5te/OP_UNUSED_B7FF.S
rmv5te/OP_UNUSED_B8FF.S
rmv5te/OP_UNUSED_B9FF.S
rmv5te/OP_UNUSED_BAFF.S
rmv5te/OP_UNUSED_BBFF.S
rmv5te/OP_UNUSED_BCFF.S
rmv5te/OP_UNUSED_BDFF.S
rmv5te/OP_UNUSED_BEFF.S
rmv5te/OP_UNUSED_BFFF.S
rmv5te/OP_UNUSED_C0FF.S
rmv5te/OP_UNUSED_C1FF.S
rmv5te/OP_UNUSED_C2FF.S
rmv5te/OP_UNUSED_C3FF.S
rmv5te/OP_UNUSED_C4FF.S
rmv5te/OP_UNUSED_C5FF.S
rmv5te/OP_UNUSED_C6FF.S
rmv5te/OP_UNUSED_C7FF.S
rmv5te/OP_UNUSED_C8FF.S
rmv5te/OP_UNUSED_C9FF.S
rmv5te/OP_UNUSED_CAFF.S
rmv5te/OP_UNUSED_CBFF.S
rmv5te/OP_UNUSED_CCFF.S
rmv5te/OP_UNUSED_CDFF.S
rmv5te/OP_UNUSED_CEFF.S
rmv5te/OP_UNUSED_CFFF.S
rmv5te/OP_UNUSED_D0FF.S
rmv5te/OP_UNUSED_D1FF.S
rmv5te/OP_UNUSED_D2FF.S
rmv5te/OP_UNUSED_D3FF.S
rmv5te/OP_UNUSED_D4FF.S
rmv5te/OP_UNUSED_D5FF.S
rmv5te/OP_UNUSED_D6FF.S
rmv5te/OP_UNUSED_D7FF.S
rmv5te/OP_UNUSED_D8FF.S
rmv5te/OP_UNUSED_D9FF.S
rmv5te/OP_UNUSED_DAFF.S
rmv5te/OP_UNUSED_DBFF.S
rmv5te/OP_UNUSED_DCFF.S
rmv5te/OP_UNUSED_DDFF.S
rmv5te/OP_UNUSED_DEFF.S
rmv5te/OP_UNUSED_DFFF.S
rmv5te/OP_UNUSED_E0FF.S
rmv5te/OP_UNUSED_E1FF.S
rmv5te/OP_UNUSED_E2FF.S
rmv5te/OP_UNUSED_E3FF.S
rmv5te/OP_UNUSED_E4FF.S
rmv5te/OP_UNUSED_E5FF.S
rmv5te/OP_UNUSED_E6FF.S
rmv5te/OP_UNUSED_E7FF.S
rmv5te/OP_UNUSED_E8FF.S
rmv5te/OP_UNUSED_E9FF.S
rmv5te/OP_UNUSED_EAFF.S
rmv5te/OP_UNUSED_EBFF.S
rmv5te/OP_UNUSED_ECFF.S
rmv5te/OP_UNUSED_EDFF.S
rmv5te/OP_UNUSED_EEFF.S
rmv5te/OP_UNUSED_EFFF.S
rmv5te/OP_UNUSED_F0FF.S
rmv5te/OP_UNUSED_F1FF.S
rmv5te/OP_UNUSED_FF.S
rmv5te/footer.S
/OP_CHECK_CAST_JUMBO.cpp
/OP_CONST_CLASS_JUMBO.cpp
/OP_DISPATCH_FF.cpp
/OP_FILLED_NEW_ARRAY.cpp
/OP_FILLED_NEW_ARRAY_JUMBO.cpp
/OP_FILLED_NEW_ARRAY_RANGE.cpp
/OP_IGET_BOOLEAN_JUMBO.cpp
/OP_IGET_BYTE_JUMBO.cpp
/OP_IGET_CHAR_JUMBO.cpp
/OP_IGET_JUMBO.cpp
/OP_IGET_OBJECT_JUMBO.cpp
/OP_IGET_OBJECT_VOLATILE_JUMBO.cpp
/OP_IGET_SHORT_JUMBO.cpp
/OP_IGET_VOLATILE_JUMBO.cpp
/OP_IGET_WIDE_JUMBO.cpp
/OP_IGET_WIDE_VOLATILE_JUMBO.cpp
/OP_INSTANCE_OF_JUMBO.cpp
/OP_INVOKE_DIRECT.cpp
/OP_INVOKE_DIRECT_JUMBO.cpp
/OP_INVOKE_DIRECT_RANGE.cpp
/OP_INVOKE_INTERFACE.cpp
/OP_INVOKE_INTERFACE_JUMBO.cpp
/OP_INVOKE_INTERFACE_RANGE.cpp
/OP_INVOKE_OBJECT_INIT_JUMBO.cpp
/OP_INVOKE_OBJECT_INIT_RANGE.cpp
/OP_INVOKE_STATIC.cpp
/OP_INVOKE_STATIC_JUMBO.cpp
/OP_INVOKE_STATIC_RANGE.cpp
/OP_INVOKE_SUPER.cpp
/OP_INVOKE_SUPER_JUMBO.cpp
/OP_INVOKE_SUPER_QUICK.cpp
/OP_INVOKE_SUPER_QUICK_RANGE.cpp
/OP_INVOKE_SUPER_RANGE.cpp
/OP_INVOKE_VIRTUAL.cpp
/OP_INVOKE_VIRTUAL_JUMBO.cpp
/OP_INVOKE_VIRTUAL_QUICK.cpp
/OP_INVOKE_VIRTUAL_QUICK_RANGE.cpp
/OP_INVOKE_VIRTUAL_RANGE.cpp
/OP_IPUT_BOOLEAN_JUMBO.cpp
/OP_IPUT_BYTE_JUMBO.cpp
/OP_IPUT_CHAR_JUMBO.cpp
/OP_IPUT_JUMBO.cpp
/OP_IPUT_OBJECT_JUMBO.cpp
/OP_IPUT_OBJECT_VOLATILE_JUMBO.cpp
/OP_IPUT_SHORT_JUMBO.cpp
/OP_IPUT_VOLATILE_JUMBO.cpp
/OP_IPUT_WIDE_JUMBO.cpp
/OP_IPUT_WIDE_VOLATILE_JUMBO.cpp
/OP_NEW_ARRAY_JUMBO.cpp
/OP_NEW_INSTANCE_JUMBO.cpp
/OP_SGET_BOOLEAN_JUMBO.cpp
/OP_SGET_BYTE_JUMBO.cpp
/OP_SGET_CHAR_JUMBO.cpp
/OP_SGET_JUMBO.cpp
/OP_SGET_OBJECT_JUMBO.cpp
/OP_SGET_OBJECT_VOLATILE_JUMBO.cpp
/OP_SGET_SHORT_JUMBO.cpp
/OP_SGET_VOLATILE_JUMBO.cpp
/OP_SGET_WIDE_JUMBO.cpp
/OP_SGET_WIDE_VOLATILE_JUMBO.cpp
/OP_SPUT_BOOLEAN_JUMBO.cpp
/OP_SPUT_BYTE_JUMBO.cpp
/OP_SPUT_CHAR_JUMBO.cpp
/OP_SPUT_JUMBO.cpp
/OP_SPUT_OBJECT_JUMBO.cpp
/OP_SPUT_OBJECT_VOLATILE_JUMBO.cpp
/OP_SPUT_SHORT_JUMBO.cpp
/OP_SPUT_VOLATILE_JUMBO.cpp
/OP_SPUT_WIDE_JUMBO.cpp
/OP_SPUT_WIDE_VOLATILE_JUMBO.cpp
/OP_THROW_VERIFICATION_ERROR_JUMBO.cpp
/OP_UNUSED_27FF.cpp
/OP_UNUSED_28FF.cpp
/OP_UNUSED_29FF.cpp
/OP_UNUSED_2AFF.cpp
/OP_UNUSED_2BFF.cpp
/OP_UNUSED_2CFF.cpp
/OP_UNUSED_2DFF.cpp
/OP_UNUSED_2EFF.cpp
/OP_UNUSED_2FFF.cpp
/OP_UNUSED_30FF.cpp
/OP_UNUSED_31FF.cpp
/OP_UNUSED_32FF.cpp
/OP_UNUSED_33FF.cpp
/OP_UNUSED_34FF.cpp
/OP_UNUSED_35FF.cpp
/OP_UNUSED_36FF.cpp
/OP_UNUSED_37FF.cpp
/OP_UNUSED_38FF.cpp
/OP_UNUSED_39FF.cpp
/OP_UNUSED_3AFF.cpp
/OP_UNUSED_3BFF.cpp
/OP_UNUSED_3CFF.cpp
/OP_UNUSED_3DFF.cpp
/OP_UNUSED_3EFF.cpp
/OP_UNUSED_3FFF.cpp
/OP_UNUSED_40FF.cpp
/OP_UNUSED_41FF.cpp
/OP_UNUSED_42FF.cpp
/OP_UNUSED_43FF.cpp
/OP_UNUSED_44FF.cpp
/OP_UNUSED_45FF.cpp
/OP_UNUSED_46FF.cpp
/OP_UNUSED_47FF.cpp
/OP_UNUSED_48FF.cpp
/OP_UNUSED_49FF.cpp
/OP_UNUSED_4AFF.cpp
/OP_UNUSED_4BFF.cpp
/OP_UNUSED_4CFF.cpp
/OP_UNUSED_4DFF.cpp
/OP_UNUSED_4EFF.cpp
/OP_UNUSED_4FFF.cpp
/OP_UNUSED_50FF.cpp
/OP_UNUSED_51FF.cpp
/OP_UNUSED_52FF.cpp
/OP_UNUSED_53FF.cpp
/OP_UNUSED_54FF.cpp
/OP_UNUSED_55FF.cpp
/OP_UNUSED_56FF.cpp
/OP_UNUSED_57FF.cpp
/OP_UNUSED_58FF.cpp
/OP_UNUSED_59FF.cpp
/OP_UNUSED_5AFF.cpp
/OP_UNUSED_5BFF.cpp
/OP_UNUSED_5CFF.cpp
/OP_UNUSED_5DFF.cpp
/OP_UNUSED_5EFF.cpp
/OP_UNUSED_5FFF.cpp
/OP_UNUSED_60FF.cpp
/OP_UNUSED_61FF.cpp
/OP_UNUSED_62FF.cpp
/OP_UNUSED_63FF.cpp
/OP_UNUSED_64FF.cpp
/OP_UNUSED_65FF.cpp
/OP_UNUSED_66FF.cpp
/OP_UNUSED_67FF.cpp
/OP_UNUSED_68FF.cpp
/OP_UNUSED_69FF.cpp
/OP_UNUSED_6AFF.cpp
/OP_UNUSED_6BFF.cpp
/OP_UNUSED_6CFF.cpp
/OP_UNUSED_6DFF.cpp
/OP_UNUSED_6EFF.cpp
/OP_UNUSED_6FFF.cpp
/OP_UNUSED_70FF.cpp
/OP_UNUSED_71FF.cpp
/OP_UNUSED_72FF.cpp
/OP_UNUSED_73FF.cpp
/OP_UNUSED_74FF.cpp
/OP_UNUSED_75FF.cpp
/OP_UNUSED_76FF.cpp
/OP_UNUSED_77FF.cpp
/OP_UNUSED_78FF.cpp
/OP_UNUSED_79FF.cpp
/OP_UNUSED_7AFF.cpp
/OP_UNUSED_7BFF.cpp
/OP_UNUSED_7CFF.cpp
/OP_UNUSED_7DFF.cpp
/OP_UNUSED_7EFF.cpp
/OP_UNUSED_7FFF.cpp
/OP_UNUSED_80FF.cpp
/OP_UNUSED_81FF.cpp
/OP_UNUSED_82FF.cpp
/OP_UNUSED_83FF.cpp
/OP_UNUSED_84FF.cpp
/OP_UNUSED_85FF.cpp
/OP_UNUSED_86FF.cpp
/OP_UNUSED_87FF.cpp
/OP_UNUSED_88FF.cpp
/OP_UNUSED_89FF.cpp
/OP_UNUSED_8AFF.cpp
/OP_UNUSED_8BFF.cpp
/OP_UNUSED_8CFF.cpp
/OP_UNUSED_8DFF.cpp
/OP_UNUSED_8EFF.cpp
/OP_UNUSED_8FFF.cpp
/OP_UNUSED_90FF.cpp
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ommon/asm-constants.h
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onfig-armv7-a-neon
onfig-x86
onfig-x86-atom
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ut/InterpAsm-x86.S
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ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
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86/OP_UNUSED_B8FF.S
86/OP_UNUSED_B9FF.S
86/OP_UNUSED_BAFF.S
86/OP_UNUSED_BBFF.S
86/OP_UNUSED_BCFF.S
86/OP_UNUSED_BDFF.S
86/OP_UNUSED_BEFF.S
86/OP_UNUSED_BFFF.S
86/OP_UNUSED_C0FF.S
86/OP_UNUSED_C1FF.S
86/OP_UNUSED_C2FF.S
86/OP_UNUSED_C3FF.S
86/OP_UNUSED_C4FF.S
86/OP_UNUSED_C5FF.S
86/OP_UNUSED_C6FF.S
86/OP_UNUSED_C7FF.S
86/OP_UNUSED_C8FF.S
86/OP_UNUSED_C9FF.S
86/OP_UNUSED_CAFF.S
86/OP_UNUSED_CBFF.S
86/OP_UNUSED_CCFF.S
86/OP_UNUSED_CDFF.S
86/OP_UNUSED_CEFF.S
86/OP_UNUSED_CFFF.S
86/OP_UNUSED_D0FF.S
86/OP_UNUSED_D1FF.S
86/OP_UNUSED_D2FF.S
86/OP_UNUSED_D3FF.S
86/OP_UNUSED_D4FF.S
86/OP_UNUSED_D5FF.S
86/OP_UNUSED_D6FF.S
86/OP_UNUSED_D7FF.S
86/OP_UNUSED_D8FF.S
86/OP_UNUSED_D9FF.S
86/OP_UNUSED_DAFF.S
86/OP_UNUSED_DBFF.S
86/OP_UNUSED_DCFF.S
86/OP_UNUSED_DDFF.S
86/OP_UNUSED_DEFF.S
86/OP_UNUSED_DFFF.S
86/OP_UNUSED_E0FF.S
86/OP_UNUSED_E1FF.S
86/OP_UNUSED_E2FF.S
86/OP_UNUSED_E3FF.S
86/OP_UNUSED_E4FF.S
86/OP_UNUSED_E5FF.S
86/OP_UNUSED_E6FF.S
86/OP_UNUSED_E7FF.S
86/OP_UNUSED_E8FF.S
86/OP_UNUSED_E9FF.S
86/OP_UNUSED_EAFF.S
86/OP_UNUSED_EBFF.S
86/OP_UNUSED_ECFF.S
86/OP_UNUSED_EDFF.S
86/OP_UNUSED_EEFF.S
86/OP_UNUSED_EFFF.S
86/OP_UNUSED_F0FF.S
86/OP_UNUSED_F1FF.S
86/OP_UNUSED_FF.S
86/footer.S
86/header.S
|
062bf509a77fce9dfcb7e7b2e401cf2a124d83d5 |
20-Dec-2011 |
Steve Block <steveblock@google.com> |
Rename (IF_)LOGD(_IF) to (IF_)ALOGD(_IF) DO NOT MERGE See https://android-git.corp.google.com/g/156016 Bug: 5449033 Change-Id: Ic663376d1ad6a6cb14bf81405ad9afd247cf2f60
terp.cpp
/gotoTargets.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
34987b48d216786454aca59474cb76015af48bd9 |
27-Oct-2011 |
Jeff Brown <jeffbrown@google.com> |
Fix reference to non-existent function in debug code. The generated interpreter code has some debugging code that call dvmIsHeapAddressObject, which doesn't exist. This causes the build to fails when we build Dalvik with DEBUG_DALVIK_VM=true. Use dvmIsHeapAddress instead. Change-Id: Ifc5eeb4bd2ea6b45046c606b744b1a70a5e56dfc
/header.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
92c1f6f1b4249e4e379452ee7b49f027052bf4ce |
20-Oct-2011 |
Steve Block <steveblock@google.com> |
Rename (IF_)LOGV(_IF) to (IF_)ALOGV(_IF) DO NOT MERGE See https://android-git.corp.google.com/g/#/c/143865 Bug: 5449033 Change-Id: I8bd96961e369a08e86ff78b82d90f20f42787eb1
/OP_APUT_OBJECT.cpp
/OP_BREAKPOINT.cpp
/gotoTargets.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
1663a6c12fdf4732d7ea0a0406af6085b3c408e4 |
12-Oct-2011 |
Steve Block <steveblock@google.com> |
Rename (IF_)LOG() to (IF_)ALOG() DO NOT MERGE See https://android-git.corp.google.com/g/#/c/141576 Bug: 5449033 Change-Id: Ie3bc0d5436218ea05f98cb0373ecf5924f78db05
/header.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
4185972e211b0c84b9fe7d90c56b28cc15e474fa |
27-Sep-2011 |
buzbee <buzbee@google.com> |
Fix memory barriers (Issue 3338450) Add extra memory barrier on volatile stores. Change-Id: Id4a4750cdfc910eda2f0b44ead0af2a569b5735e
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_JUMBO.S
rmv5te/OP_IPUT_OBJECT.S
rmv5te/OP_IPUT_OBJECT_JUMBO.S
rmv5te/OP_IPUT_OBJECT_VOLATILE.S
rmv5te/OP_IPUT_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_IPUT_VOLATILE.S
rmv5te/OP_IPUT_VOLATILE_JUMBO.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_IPUT_WIDE_JUMBO.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_JUMBO.S
rmv5te/OP_SPUT_OBJECT.S
rmv5te/OP_SPUT_OBJECT_JUMBO.S
rmv5te/OP_SPUT_OBJECT_VOLATILE.S
rmv5te/OP_SPUT_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_SPUT_VOLATILE.S
rmv5te/OP_SPUT_VOLATILE_JUMBO.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_SPUT_WIDE_JUMBO.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
8bc8bf71a52e17d483021b4c9dc8e735d9bce3ed |
20-Jul-2011 |
Elliott Hughes <enh@google.com> |
Don't use dvmIsValidObject outside the GC. Use dvmIsHeapPointer outside the GC. (This still isn't safe because there's no synchronization when dealing with the HeapSource.) Bug: 5049447 Change-Id: Ie0b325ef0a92687ea1eaf1491a4bb832298893c5
/header.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
375fb116bcb817b37509ab579dbd55cdbb765cbf |
15-Jun-2011 |
Carl Shapiro <cshapiro@google.com> |
Normalize the include guard style. An leading underscore followed by a capital letter is a reserved name space in C and C++. This change also moves any #include directives within the include guard in some of the compiler/codegen/arm header files. Change-Id: I9715e2c5301699d31886e61d0fe6e29483555a2a
terp.h
|
291c84f60853d30e1c0d79dd08c5e5164f588e26 |
26-May-2011 |
Dan Bornstein <danfuzz@android.com> |
Prefer printf format "%#x" over "0x%x". I exist to serve. Change-Id: I8e2880b20eefd466da8515d5b6b0c5cb75d56169
rmv5te/footer.S
/opcommon.cpp
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
ortable/entry.cpp
|
60fc806b679a3655c228b4093058c59941a49cfe |
26-May-2011 |
Dan Bornstein <danfuzz@android.com> |
Further conservation of newlines. Friends don't let friends end LOG() strings with newlines. Change-Id: I5a18c766c90c4ab5f03caa6acd601d34d91beb00
terp.cpp
/OP_APUT_OBJECT.cpp
/OP_BREAKPOINT.cpp
/OP_MONITOR_ENTER.cpp
/OP_MONITOR_EXIT.cpp
/OP_PACKED_SWITCH.cpp
/OP_SPARSE_SWITCH.cpp
/OP_THROW.cpp
/OP_UNUSED_F1FF.cpp
/gotoTargets.cpp
/header.cpp
/opcommon.cpp
ommon/asm-constants.h
stubs/entry.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
ortable/entry.cpp
|
e1c94cd59e250f69b973e369db316808a7e7cf77 |
26-May-2011 |
buzbee <buzbee@google.com> |
am cf4a20cf: Interpreter/Debugger fix #4479968 * commit 'cf4a20cf0cbc53f03a5b16c7152bbb29907f7108': Interpreter/Debugger fix #4479968
|
cf4a20cf0cbc53f03a5b16c7152bbb29907f7108 |
25-May-2011 |
buzbee <buzbee@google.com> |
Interpreter/Debugger fix #4479968 This one was tricky to track down. The underlying problem arose with the consolidation of InterpState with Thread. Rather than having a state structure for each instance of the interpreter, we moved to a model that had a single thread-local struct shared by all interpreter instances running on that thread. A portion of interpreter state can't be shared - and thus was saved and restored on nested invocations of the interpreter. The bug here was that the storage for method return values was not included in the state that needed save/retore. In normal operation, it doesn't need to be saved - that storage isn't live across an invoke that could trigger a nested interpreter activation. However, when debugging, the debugger itself may hijack threads and create new interpreter instances for its own purposed - and there is a small window in which live retval can be trashed. The fix is simply to move retval into the InterpSave struct. Change-Id: Ib621824b799c5caa16fdfa8f5689a181159059df
ommon/asm-constants.h
stubs/stubdefs.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
ortable/enddefs.cpp
ortable/entry.cpp
|
7676148684e4b815e37641c8de47ef29eb5dc9d4 |
23-May-2011 |
buzbee <buzbee@google.com> |
am 97b22b8d: Fix alt handling for Jumbo ops * commit '97b22b8d41742fa84812f46d1125e9735420782a': Fix alt handling for Jumbo ops
|
97b22b8d41742fa84812f46d1125e9735420782a |
23-May-2011 |
buzbee <buzbee@google.com> |
Fix alt handling for Jumbo ops The mterp alt mechanism allows us to break out of the fast interpreter loop to handle debugging, JIT trace selection and other non-standard behavior. It does this by replacing the base pointer to the instruction handlers with an alternate base that references a set of dummy handlers that first call out the dvmCheckBefore() to handle special actions before routing control to the real handlers. This mechanism was slightly broken for the Jumbo ops - which have a first opcode byte of 0xFF (Dispatch), followed by the Jumbo opcode byte. In short, when the altHandlerBase was active dvmCheckBefore() was getting called for both the dispatch opcode byte and the Jumbo byte. This change adds special ALT_OP_DISPATCH_FF handlers which skip the dvmCheckBefore() call. Change-Id: If57c298a33404cdaca7456bc8fe1159c70240bea
rmv5te/ALT_OP_DISPATCH_FF.S
onfig-armv5te
onfig-armv5te-vfp
onfig-armv7-a
onfig-armv7-a-neon
onfig-x86
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86/ALT_OP_DISPATCH_FF.S
|
9c6f0a6a36fcce4a55e3764db45c6c7cced077a5 |
10-May-2011 |
Carl Shapiro <cshapiro@google.com> |
Fixes to allow the debug VM configuration to build. Change-Id: Ifbe6acf84beb75014303152d20153072e7e50c55
/header.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
ortable/entry.cpp
|
bbf31b58c50fb892423b7fef0d8c1093bd0c1a6c |
05-May-2011 |
Brian Carlstrom <bdc@google.com> |
Merge remote branch 'goog/dalvik-dev' into dalvik-dev-to-master Change-Id: I99c4289bd34f63b0b970b6ed0fa992b44e805393
|
a62c3a0ab3fcdde37f47d16e9699a935ae7a8e88 |
04-May-2011 |
Carl Shapiro <cshapiro@google.com> |
Establish a subclass relationship between ArrayObject and Object. Change-Id: I9f9fe52bd4ceebb6dde48251a89190ba6bb00ce4
terp.cpp
/OP_APUT_OBJECT.cpp
ommon/asm-constants.h
ut/InterpC-allstubs.cpp
ut/InterpC-portable.cpp
|
00c88766d7425c7923187c18a8c7e91d32807a97 |
03-May-2011 |
buzbee <buzbee@google.com> |
am 00ceb87d: Fix for double breakpoint (issue 4378296) * commit '00ceb87d1c57ccee59966be4deef1292a049285c': Fix for double breakpoint (issue 4378296)
|
00ceb87d1c57ccee59966be4deef1292a049285c |
03-May-2011 |
buzbee <buzbee@google.com> |
Fix for double breakpoint (issue 4378296) Breakpoints are given special handling in the interpreter. They are first interpreted as a breakpoint (with notification to the debugger), and then the actual instruction associated with the breakpoint location is interpreted. The bug here was that the "dvmCheckBefore()" handler was invoked prior to both "interpretations" - rather than just the first. Note that this defect appears only in the Arm mterp, the portable interpreter and x86 mterp did the right thing. Change-Id: Ied957edc0c248b5d4d94910beb7af6c03ffe885d
rmv5te/OP_BREAKPOINT.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
401edfc26ac2871a9656f3c2471c3db2e73991e0 |
03-May-2011 |
buzbee <buzbee@google.com> |
Merge "x86 interpreter fix" into dalvik-dev
|
2ec9f7802034144383261b2fd915bdf1eb396ea4 |
03-May-2011 |
buzbee <buzbee@google.com> |
x86 interpreter fix Correct the ordering of FP save prior to special subMode handling. Also added a stress test mode to help catch this sort of problem in the future. Change-Id: I5bcd325858fa63023498bfd47e910aaf1530d6bb
ut/InterpAsm-x86.S
86/footer.S
|
92a3b69286a757afff76402d8a0d5ec04d7f177c |
30-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Type the reference member of JValue as an Object pointer. Previously this had been a void pointer. To avoid adding lots of casts from the logical Object subtypes to Object the RETURN_PTR macro silently casts its argument to an Object* before performing an assignment to the JValue return value. After an inheritance relationship is established between Object and its subtypes this cast can be removed. Change-Id: Id05e5c11e57e2a9afd12bad0be095f1dfe9e1f51
/gotoTargets.cpp
ut/InterpC-allstubs.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
d862faa2ceae186da5518607505eb942d634ced9 |
28-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Get rid of uneeded extern, enum, typedef and struct qualifiers. Change-Id: I236c5a1553a51f82c9bc3eaaab042046c854d3b4
terp.h
ommon/FindInterface.h
|
c67c23bc6f5f3621f31c41bd48553b196ab0325e |
28-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Eliminate the PROFILE_FIELD_ACCESS feature. Change-Id: I27bf2d18c4c0735913ea8698825b05e393b046b2
/header.cpp
/opcommon.cpp
ommon/asm-constants.h
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
|
cf2aac7e6a29e7e1e5f622fd6123e0d1a9a75bda |
25-Apr-2011 |
buzbee <buzbee@google.com> |
Refine & simplify the interBreak mechanism Replace dvmUpdateInterpBreak() and friends with more direct enable/disable subMode calls. Hide breakFlags manipulation from higher-level callers and infer what is needed from the active subMode. Add documentation to the interpreter control section of mterp/README.txt Change-Id: If7ebee5d8e4db8154c4caed72cf89ec088045998
EADME.txt
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
389e258a5b9b2afb7bfaee3344c615d3310fae4e |
23-Apr-2011 |
buzbee <buzbee@google.com> |
InterpBreak cleanup (part 1) Moved the suspend count variables from the interpBreak structure. These are already protected by a mutex, and we need the space in interpBreak for additional subMode flags. This CL just does the move and expands the width of subMode to 16-bits. Change-Id: I4a6070b1ba4fb08a0f6e0aba6f150b30f9159eed
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_EXECUTE_INLINE_RANGE.S
rmv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
rmv5te/OP_INVOKE_STATIC.S
rmv5te/OP_INVOKE_STATIC_JUMBO.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_NEW_INSTANCE_JUMBO.S
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86/footer.S
|
30bc0d46ae730d78c42c39cfa56a59ba3025380b |
22-Apr-2011 |
buzbee <buzbee@google.com> |
Consolidate curFrame fields in thread storage We ended up with two locations in the Thread structure for saved Dalvik frame pointer. This change consolidates them. Change-Id: I78f288e4e57e232f29663be930101e775bfe370f
terp.cpp
rmv5te/footer.S
rmv5te/header.S
/gotoTargets.cpp
ommon/asm-constants.h
stubs/stubdefs.cpp
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.cpp
ortable/entry.cpp
ortable/stubdefs.cpp
86/entry.S
86/footer.S
86/header.S
|
5d6b40f4954c2f2cd664590f2cb73e2adc427dfc |
21-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Merge "Remove unneeded void argument list declarations." into dalvik-dev
|
1e1433e78f560a01744e870c19c162ab88df9dc1 |
21-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Remove unneeded void argument list declarations. Change-Id: Ica749f6defa890363ec531b29e25bc415dc2cbb9
terp.cpp
|
cd8f5e701547739f241594b43e9470c92d98e9cf |
21-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move the interpreter into C++. Change-Id: I4b7d6ed9c54dbf3244304a7ea0f13e6c37cca2aa
terp.h
rmv5te/debug.c
rmv5te/debug.cpp
/OP_ADD_DOUBLE.c
/OP_ADD_DOUBLE.cpp
/OP_ADD_DOUBLE_2ADDR.c
/OP_ADD_DOUBLE_2ADDR.cpp
/OP_ADD_FLOAT.c
/OP_ADD_FLOAT.cpp
/OP_ADD_FLOAT_2ADDR.c
/OP_ADD_FLOAT_2ADDR.cpp
/OP_ADD_INT.c
/OP_ADD_INT.cpp
/OP_ADD_INT_2ADDR.c
/OP_ADD_INT_2ADDR.cpp
/OP_ADD_INT_LIT16.c
/OP_ADD_INT_LIT16.cpp
/OP_ADD_INT_LIT8.c
/OP_ADD_INT_LIT8.cpp
/OP_ADD_LONG.c
/OP_ADD_LONG.cpp
/OP_ADD_LONG_2ADDR.c
/OP_ADD_LONG_2ADDR.cpp
/OP_AGET.c
/OP_AGET.cpp
/OP_AGET_BOOLEAN.c
/OP_AGET_BOOLEAN.cpp
/OP_AGET_BYTE.c
/OP_AGET_BYTE.cpp
/OP_AGET_CHAR.c
/OP_AGET_CHAR.cpp
/OP_AGET_OBJECT.c
/OP_AGET_OBJECT.cpp
/OP_AGET_SHORT.c
/OP_AGET_SHORT.cpp
/OP_AGET_WIDE.c
/OP_AGET_WIDE.cpp
/OP_AND_INT.c
/OP_AND_INT.cpp
/OP_AND_INT_2ADDR.c
/OP_AND_INT_2ADDR.cpp
/OP_AND_INT_LIT16.c
/OP_AND_INT_LIT16.cpp
/OP_AND_INT_LIT8.c
/OP_AND_INT_LIT8.cpp
/OP_AND_LONG.c
/OP_AND_LONG.cpp
/OP_AND_LONG_2ADDR.c
/OP_AND_LONG_2ADDR.cpp
/OP_APUT.c
/OP_APUT.cpp
/OP_APUT_BOOLEAN.c
/OP_APUT_BOOLEAN.cpp
/OP_APUT_BYTE.c
/OP_APUT_BYTE.cpp
/OP_APUT_CHAR.c
/OP_APUT_CHAR.cpp
/OP_APUT_OBJECT.c
/OP_APUT_OBJECT.cpp
/OP_APUT_SHORT.c
/OP_APUT_SHORT.cpp
/OP_APUT_WIDE.c
/OP_APUT_WIDE.cpp
/OP_ARRAY_LENGTH.c
/OP_ARRAY_LENGTH.cpp
/OP_BREAKPOINT.c
/OP_BREAKPOINT.cpp
/OP_CHECK_CAST.c
/OP_CHECK_CAST.cpp
/OP_CHECK_CAST_JUMBO.c
/OP_CHECK_CAST_JUMBO.cpp
/OP_CMPG_DOUBLE.c
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/OP_UNUSED_5CFF.cpp
/OP_UNUSED_5DFF.c
/OP_UNUSED_5DFF.cpp
/OP_UNUSED_5EFF.c
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/OP_UNUSED_5FFF.c
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/OP_UNUSED_6EFF.c
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/OP_UNUSED_6FFF.c
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/OP_UNUSED_8CFF.c
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/OP_UNUSED_8DFF.c
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/OP_UNUSED_8EFF.c
/OP_UNUSED_8EFF.cpp
/OP_UNUSED_8FFF.c
/OP_UNUSED_8FFF.cpp
/OP_UNUSED_90FF.c
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/OP_UNUSED_91FF.c
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/OP_UNUSED_9EFF.c
/OP_UNUSED_9EFF.cpp
/OP_UNUSED_9FFF.c
/OP_UNUSED_9FFF.cpp
/OP_UNUSED_A0FF.c
/OP_UNUSED_A0FF.cpp
/OP_UNUSED_A1FF.c
/OP_UNUSED_A1FF.cpp
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/OP_UNUSED_A3FF.c
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/OP_UNUSED_ADFF.c
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/OP_UNUSED_AEFF.c
/OP_UNUSED_AEFF.cpp
/OP_UNUSED_AFFF.c
/OP_UNUSED_AFFF.cpp
/OP_UNUSED_B0FF.c
/OP_UNUSED_B0FF.cpp
/OP_UNUSED_B1FF.c
/OP_UNUSED_B1FF.cpp
/OP_UNUSED_B2FF.c
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/OP_UNUSED_B3FF.c
/OP_UNUSED_B3FF.cpp
/OP_UNUSED_B4FF.c
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/OP_UNUSED_B5FF.c
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/OP_UNUSED_B9FF.cpp
/OP_UNUSED_BAFF.c
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/OP_UNUSED_BBFF.c
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/OP_UNUSED_BCFF.c
/OP_UNUSED_BCFF.cpp
/OP_UNUSED_BDFF.c
/OP_UNUSED_BDFF.cpp
/OP_UNUSED_BEFF.c
/OP_UNUSED_BEFF.cpp
/OP_UNUSED_BFFF.c
/OP_UNUSED_BFFF.cpp
/OP_UNUSED_C0FF.c
/OP_UNUSED_C0FF.cpp
/OP_UNUSED_C1FF.c
/OP_UNUSED_C1FF.cpp
/OP_UNUSED_C2FF.c
/OP_UNUSED_C2FF.cpp
/OP_UNUSED_C3FF.c
/OP_UNUSED_C3FF.cpp
/OP_UNUSED_C4FF.c
/OP_UNUSED_C4FF.cpp
/OP_UNUSED_C5FF.c
/OP_UNUSED_C5FF.cpp
/OP_UNUSED_C6FF.c
/OP_UNUSED_C6FF.cpp
/OP_UNUSED_C7FF.c
/OP_UNUSED_C7FF.cpp
/OP_UNUSED_C8FF.c
/OP_UNUSED_C8FF.cpp
/OP_UNUSED_C9FF.c
/OP_UNUSED_C9FF.cpp
/OP_UNUSED_CAFF.c
/OP_UNUSED_CAFF.cpp
/OP_UNUSED_CBFF.c
/OP_UNUSED_CBFF.cpp
/OP_UNUSED_CCFF.c
/OP_UNUSED_CCFF.cpp
/OP_UNUSED_CDFF.c
/OP_UNUSED_CDFF.cpp
/OP_UNUSED_CEFF.c
/OP_UNUSED_CEFF.cpp
/OP_UNUSED_CFFF.c
/OP_UNUSED_CFFF.cpp
/OP_UNUSED_D0FF.c
/OP_UNUSED_D0FF.cpp
/OP_UNUSED_D1FF.c
/OP_UNUSED_D1FF.cpp
/OP_UNUSED_D2FF.c
/OP_UNUSED_D2FF.cpp
/OP_UNUSED_D3FF.c
/OP_UNUSED_D3FF.cpp
/OP_UNUSED_D4FF.c
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/OP_UNUSED_D5FF.c
/OP_UNUSED_D5FF.cpp
/OP_UNUSED_D6FF.c
/OP_UNUSED_D6FF.cpp
/OP_UNUSED_D7FF.c
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/OP_UNUSED_D8FF.c
/OP_UNUSED_D8FF.cpp
/OP_UNUSED_D9FF.c
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/OP_UNUSED_DAFF.c
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/OP_UNUSED_DBFF.c
/OP_UNUSED_DBFF.cpp
/OP_UNUSED_DCFF.c
/OP_UNUSED_DCFF.cpp
/OP_UNUSED_DDFF.c
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/OP_UNUSED_DEFF.c
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/OP_UNUSED_DFFF.c
/OP_UNUSED_DFFF.cpp
/OP_UNUSED_E0FF.c
/OP_UNUSED_E0FF.cpp
/OP_UNUSED_E1FF.c
/OP_UNUSED_E1FF.cpp
/OP_UNUSED_E2FF.c
/OP_UNUSED_E2FF.cpp
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/OP_UNUSED_E4FF.c
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/OP_UNUSED_E7FF.c
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/OP_UNUSED_EAFF.c
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/OP_UNUSED_EBFF.c
/OP_UNUSED_EBFF.cpp
/OP_UNUSED_ECFF.c
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/OP_UNUSED_EDFF.c
/OP_UNUSED_EDFF.cpp
/OP_UNUSED_EEFF.c
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/OP_UNUSED_EFFF.c
/OP_UNUSED_EFFF.cpp
/OP_UNUSED_F0FF.c
/OP_UNUSED_F0FF.cpp
/OP_UNUSED_F1FF.c
/OP_UNUSED_F1FF.cpp
/OP_USHR_INT.c
/OP_USHR_INT.cpp
/OP_USHR_INT_2ADDR.c
/OP_USHR_INT_2ADDR.cpp
/OP_USHR_INT_LIT8.c
/OP_USHR_INT_LIT8.cpp
/OP_USHR_LONG.c
/OP_USHR_LONG.cpp
/OP_USHR_LONG_2ADDR.c
/OP_USHR_LONG_2ADDR.cpp
/OP_XOR_INT.c
/OP_XOR_INT.cpp
/OP_XOR_INT_2ADDR.c
/OP_XOR_INT_2ADDR.cpp
/OP_XOR_INT_LIT16.c
/OP_XOR_INT_LIT16.cpp
/OP_XOR_INT_LIT8.c
/OP_XOR_INT_LIT8.cpp
/OP_XOR_LONG.c
/OP_XOR_LONG.cpp
/OP_XOR_LONG_2ADDR.c
/OP_XOR_LONG_2ADDR.cpp
/gotoTargets.c
/gotoTargets.cpp
/header.c
/header.cpp
/opcommon.c
/opcommon.cpp
onfig-allstubs
onfig-armv5te
onfig-armv5te-vfp
onfig-armv7-a
onfig-armv7-a-neon
onfig-portable
onfig-x86
onfig-x86-atom
stubs/enddefs.c
stubs/enddefs.cpp
stubs/entry.c
stubs/entry.cpp
stubs/stubdefs.c
stubs/stubdefs.cpp
en-mterp.py
ut/InterpC-allstubs.c
ut/InterpC-allstubs.cpp
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te-vfp.cpp
ut/InterpC-armv5te.c
ut/InterpC-armv5te.cpp
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a-neon.cpp
ut/InterpC-armv7-a.c
ut/InterpC-armv7-a.cpp
ut/InterpC-portable.c
ut/InterpC-portable.cpp
ut/InterpC-x86-atom.c
ut/InterpC-x86-atom.cpp
ut/InterpC-x86.c
ut/InterpC-x86.cpp
ortable/enddefs.c
ortable/enddefs.cpp
ortable/entry.c
ortable/entry.cpp
ortable/stubdefs.c
ortable/stubdefs.cpp
|
d5c36b9040bd26a81219a7f399513526f9b46324 |
16-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move the remaining non-compiler VM code into C++. Change-Id: Id8693208d2741c55a7b0474d1264f2112019d11f
terp.c
terp.cpp
ommon/FindInterface.h
|
2d63bc57d5fcbcd54f0bd3e9491e1704b98ec0bf |
14-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move JDWP into C++ and add extern "C" to remaining non-compiler includes. Change-Id: I19cba56e8f75b76f902c87ff5c5b3e2c17cb5c00
terp.h
|
c59931eff9225674b341e3b499e0f66354910ca2 |
09-Apr-2011 |
buzbee <buzbee@google.com> |
Fix method profiling [issue 4260697] In the new interpreter control mechanism, method tracing invoke events are generated at the call site, whereas debug entry events happen prior to the interpretation of the first instruction of a method. Because we were failing to check for active profiling on entry to a new interpreter instance, we would miss the profile event for the first method interpreted. We subsequently (and correctly) recorded the return event, and ended up with a mismatch causing traceview to complain and die. Change-Id: Ibd93dfcd16c2f1fc62f6a86626a902eaf5d4b160
terp.c
ut/InterpC-portable.c
ortable/entry.c
|
a4a19037f75e0e3c85fb5f3c7fa31732f8475719 |
05-Apr-2011 |
buzbee <buzbee@google.com> |
Fix x86 fast interpreter Was passing wrong value to dvmResolveField() in OP_IGET_WIDE_JUMBO Change-Id: I7773fd0932d7d032fce30dc57b33ef6a8fbc7afb
ut/InterpAsm-x86.S
86/OP_IGET_WIDE_JUMBO.S
|
99e3e6e72e3471eb85fc2e405866392b01c080fe |
29-Mar-2011 |
buzbee <buzbee@google.com> |
Fix interpreter debug attach Fix a few miscellaneous bugs from the interpreter restructuring that were causing a segfault on debugger attach. Added a sanity checking routine for debugging. Fixed a problem in which the JIT's threshold and on/off switch wouldn't get initialized properly on thread creation. Renamed dvmCompilerStateRefresh() to dvmCompilerUpdateGlobalState() to better reflect its function. Change-Id: I5b8af1ce2175e3c6f53cda19dd8e052a5f355587
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_EXECUTE_INLINE_RANGE.S
rmv5te/footer.S
/OP_BREAKPOINT.c
/gotoTargets.c
stubs/stubdefs.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portable.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/stubdefs.c
86/footer.S
|
9d755ce64ea9714b2c01473b7f4c21747a5f39c1 |
29-Mar-2011 |
buzbee <buzbee@google.com> |
Merge "Add safepoint callback for gc" into dalvik-dev
|
94d65255849ce9f195c971f726e8b09449ba4d14 |
25-Mar-2011 |
buzbee <buzbee@google.com> |
Add safepoint callback for gc This change adds a safepoint callback registration mechanism. On a per-thread (or all-thread) basis, you pass in a function to be called at the next safe point by the target thread. That if that function returns 0, it will be automatically disarmed. If not, the callback will stay in effect and the function will be called on all subsequent safe points. GC is the expected customer of this feature. Change-Id: Icd3b93128b1fd547e142d047a12df7ae8ee646e3
ommon/asm-constants.h
|
e86fd9b6bdc709bd3ec9662bc353d55eb38ca36e |
28-Mar-2011 |
buzbee <buzbee@google.com> |
resolved conflicts for merge of ac815100 to dalvik-dev Change-Id: I724cce041f14f91aec9ec5ca6cc535ede6d94f70
|
ac815100951522b19b3dc4f21100e57400a82267 |
28-Mar-2011 |
buzbee <buzbee@google.com> |
Fix x86-atom build Fix an apparent merge problem in the x86-atom build. The handler table still had a reference to the unused 0xF1 opcode rather than the new OP_RETURN_VOID_BARRIER. Change-Id: Iaa6329c15f7891fd793846a2d19979679aed9af2
ut/InterpAsm-x86-atom.S
86-atom/entry.S
|
9a3147c7412f4794434b4c2604aa2ba784867774 |
03-Mar-2011 |
buzbee <buzbee@google.com> |
Interpreter restructuring This is a restructuring of the Dalvik ARM and x86 interpreters: o Combine the old portstd and portdbg interpreters into a single portable interpreter. o Add debug/profiling support to the fast (mterp) interpreters. o Delete old mechansim of switching between interpreters. Now, once you choose an interpreter at startup, you stick with it. o Allow JIT to co-exist with profiling & debugging (necessary for first-class support of debugging with the JIT active). o Adds single-step capability to the fast assembly interpreters without slowing them down (and, in fact, measurably improves their performance). o Remove old "polling for safe point" mechanism. Breakouts now achieved via modifying base of interpreter handler table. o Simplify interpeter control mechanism. o Allow thread-granularity control for profiling & debugging The primary motivation behind this change was to improve the responsiveness of debugging and profiling and to make it easier to add new debugging and profiling capabilities in the future. Instead of always bailing out to the slow debug portable interpreter, we can now stay in the fast interpreter. A nice side effect of the change is that the fast interpreters got a healthy speed boost because we were able to replace the polling safepoint check that involved a dozen or so instructions with a single table-base reload. When combined with the two earlier CLs related to this restructuring, we show a 5.6% performance improvement using libdvm_interp.so on the Checkers benchmark relative to Honeycomb. Change-Id: I8d37e866b3618def4e582fc73f1cf69ffe428f3c
terp.c
EADME.txt
rmv5te/OP_BREAKPOINT.S
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_EXECUTE_INLINE_RANGE.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_FILLED_NEW_ARRAY_JUMBO.S
rmv5te/OP_GOTO.S
rmv5te/OP_GOTO_16.S
rmv5te/OP_GOTO_32.S
rmv5te/OP_INVOKE_DIRECT.S
rmv5te/OP_INVOKE_DIRECT_JUMBO.S
rmv5te/OP_INVOKE_INTERFACE.S
rmv5te/OP_INVOKE_INTERFACE_JUMBO.S
rmv5te/OP_INVOKE_OBJECT_INIT_JUMBO.S
rmv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
rmv5te/OP_INVOKE_STATIC.S
rmv5te/OP_INVOKE_STATIC_JUMBO.S
rmv5te/OP_INVOKE_SUPER.S
rmv5te/OP_INVOKE_SUPER_JUMBO.S
rmv5te/OP_INVOKE_SUPER_QUICK.S
rmv5te/OP_INVOKE_VIRTUAL.S
rmv5te/OP_INVOKE_VIRTUAL_JUMBO.S
rmv5te/OP_INVOKE_VIRTUAL_QUICK.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_NEW_INSTANCE_JUMBO.S
rmv5te/OP_PACKED_SWITCH.S
rmv5te/OP_SGET.S
rmv5te/OP_SGET_JUMBO.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_JUMBO.S
rmv5te/OP_SPUT_OBJECT.S
rmv5te/OP_SPUT_OBJECT_JUMBO.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_SPUT_WIDE_JUMBO.S
rmv5te/alt_stub.S
rmv5te/bincmp.S
rmv5te/entry.S
rmv5te/footer.S
rmv5te/header.S
rmv5te/zcmp.S
rmv6t2/bincmp.S
/OP_BREAKPOINT.c
/OP_EXECUTE_INLINE.c
/OP_EXECUTE_INLINE_RANGE.c
/OP_GOTO.c
/OP_GOTO_16.c
/OP_GOTO_32.c
/OP_INVOKE_OBJECT_INIT_JUMBO.c
/OP_INVOKE_OBJECT_INIT_RANGE.c
/OP_NEW_INSTANCE.c
/OP_NEW_INSTANCE_JUMBO.c
/OP_PACKED_SWITCH.c
/OP_SPARSE_SWITCH.c
/gotoTargets.c
/header.c
/opcommon.c
ommon/asm-constants.h
onfig-portable
onfig-portdbg
onfig-portstd
stubs/entry.c
stubs/stubdefs.c
en-mterp.py
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portable.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/debug.c
ortable/enddefs.c
ortable/entry.c
ortable/portdbg.c
ortable/portstd.c
ortable/stubdefs.c
ebuild.sh
86-atom/TODO.txt
86/OP_BREAKPOINT.S
86/OP_GOTO.S
86/OP_GOTO_16.S
86/OP_GOTO_32.S
86/OP_PACKED_SWITCH.S
86/alt_stub.S
86/bincmp.S
86/entry.S
86/footer.S
86/zcmp.S
|
c28b465ea4d8d58d1bf3451b3f580a4197e52d9d |
23-Mar-2011 |
Andy McFadden <fadden@android.com> |
Merge "Fix some exception issues" into dalvik-dev
|
8cd640b8327e2591c8dd8a69093fa1fc6c901c05 |
23-Mar-2011 |
Andy McFadden <fadden@android.com> |
Fix some exception issues The function that obtained an exception's message string was making a bad assumption. This has been corrected. Also, in the invoke-object-init functions, we now test for a pending exception after the call to dvmSetFinalizable(). Also, make the test for pending exception at the end of VM startup an error rather than an assert. Bug 4121213 Change-Id: I6912e5c79d63e8dda1a1dc2e788c7a8edcf487aa
rmv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
/OP_INVOKE_OBJECT_INIT_JUMBO.c
/OP_INVOKE_OBJECT_INIT_RANGE.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
6aed656b06aa274948bf5c5f8f65873814554c13 |
22-Mar-2011 |
Andy McFadden <fadden@android.com> |
Fix dalvik test 089 The local variable used to hold the field reference was a u2. Also, removed the "don't include debug info" options from the build script. Change-Id: I14b0fd4ae5af8dcd52f4b22e6b8fe9f68fd7bc89
stubs/stubdefs.c
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
111afc834432531b3528d36d7ff551ac350fb581 |
21-Mar-2011 |
Carl Shapiro <cshapiro@google.com> |
Merge "Move finalization out of the VM." into dalvik-dev
|
3475f9cdb47a6d6f8ad2ce49bbc3af46bca92f09 |
21-Mar-2011 |
Carl Shapiro <cshapiro@google.com> |
Move finalization out of the VM. This change introduces a new reference class whose referent points to instances requiring finalization. This makes the finalization of objects possible using a reference queue and a dedicated thread which removes objects from the queue. Change-Id: I0ff6dd272f00ca08c6ed3aa667bf766a039a944e
rmv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
/OP_INVOKE_OBJECT_INIT_RANGE.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
aa604f9ffb8b874f486a114496cc6c1a3c79c543 |
19-Mar-2011 |
buzbee <buzbee@google.com> |
resolved conflicts for merge of 9553565f to dalvik-dev Change-Id: Id2bc916aa838d21f4d248206e5182b00bcd19791
|
61f4c7e40b885ccb0a55d9553f07a888469621dc |
16-Mar-2011 |
Dan Bornstein <danfuzz@android.com> |
Clean up ArrayStoreException some more. Each of the four variants thrown by the VM now has a descriptively-named function defined in Exception.c, and the messages uniformly use human-oriented class names instead of the internal "[[Lfoo/bar/Baz;" forms. Bug: 3500987 Change-Id: I747315e36005c6d352116ce6a8af9d49c622f59a
rmv5te/OP_APUT_OBJECT.S
/OP_APUT_OBJECT.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86-atom/TODO.txt
86/OP_APUT_OBJECT.S
|
9dfc114cad60f4a79d934307a51fd520fdac9e98 |
11-Mar-2011 |
Andy McFadden <fadden@android.com> |
Merge "Add volatile/jumbo opcodes" into dalvik-dev
|
24bd4c50bb3ea13be4f049710967961f0546fb2c |
10-Mar-2011 |
Andy McFadden <fadden@android.com> |
Add volatile/jumbo opcodes This adds 12 dexopt-generated "volatile/jumbo" instructions, to be used for replacing appropriate get/put ops, plus a jumbo replacement for invoke-object-init/range. The new instructions are defined but not yet used. For x86 and x86-atom, C stubs are selected. Also, guarded macro args used in arithmetic expressions in header.S. Bug 3403118 Change-Id: I283cea053d1cee1d70c3715df3e71177e8b8d3b2
rmv5te/OP_IGET_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_IGET_VOLATILE_JUMBO.S
rmv5te/OP_IGET_WIDE_JUMBO.S
rmv5te/OP_IGET_WIDE_VOLATILE_JUMBO.S
rmv5te/OP_INVOKE_OBJECT_INIT_JUMBO.S
rmv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
rmv5te/OP_IPUT_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_IPUT_VOLATILE_JUMBO.S
rmv5te/OP_IPUT_WIDE_JUMBO.S
rmv5te/OP_IPUT_WIDE_VOLATILE_JUMBO.S
rmv5te/OP_SGET_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_SGET_VOLATILE_JUMBO.S
rmv5te/OP_SGET_WIDE_JUMBO.S
rmv5te/OP_SGET_WIDE_VOLATILE_JUMBO.S
rmv5te/OP_SPUT_OBJECT_VOLATILE_JUMBO.S
rmv5te/OP_SPUT_VOLATILE_JUMBO.S
rmv5te/OP_SPUT_WIDE_JUMBO.S
rmv5te/OP_SPUT_WIDE_VOLATILE_JUMBO.S
rmv5te/OP_UNUSED_F2FF.S
rmv5te/OP_UNUSED_F3FF.S
rmv5te/OP_UNUSED_F4FF.S
rmv5te/OP_UNUSED_F5FF.S
rmv5te/OP_UNUSED_F6FF.S
rmv5te/OP_UNUSED_F7FF.S
rmv5te/OP_UNUSED_F8FF.S
rmv5te/OP_UNUSED_F9FF.S
rmv5te/OP_UNUSED_FAFF.S
rmv5te/OP_UNUSED_FBFF.S
rmv5te/OP_UNUSED_FCFF.S
rmv5te/OP_UNUSED_FDFF.S
rmv5te/OP_UNUSED_FEFF.S
rmv5te/header.S
/OP_IGET_OBJECT_VOLATILE_JUMBO.c
/OP_IGET_VOLATILE_JUMBO.c
/OP_IGET_WIDE_VOLATILE_JUMBO.c
/OP_INVOKE_OBJECT_INIT_JUMBO.c
/OP_INVOKE_OBJECT_INIT_RANGE.c
/OP_IPUT_OBJECT_VOLATILE_JUMBO.c
/OP_IPUT_VOLATILE_JUMBO.c
/OP_IPUT_WIDE_VOLATILE_JUMBO.c
/OP_SGET_OBJECT_VOLATILE_JUMBO.c
/OP_SGET_VOLATILE_JUMBO.c
/OP_SGET_WIDE_VOLATILE_JUMBO.c
/OP_SPUT_OBJECT_VOLATILE_JUMBO.c
/OP_SPUT_VOLATILE_JUMBO.c
/OP_SPUT_WIDE_VOLATILE_JUMBO.c
/OP_UNUSED_F1FF.c
/OP_UNUSED_F2FF.c
/OP_UNUSED_F3FF.c
/OP_UNUSED_F4FF.c
/OP_UNUSED_F5FF.c
/OP_UNUSED_F6FF.c
/OP_UNUSED_F7FF.c
/OP_UNUSED_F8FF.c
/OP_UNUSED_F9FF.c
/OP_UNUSED_FAFF.c
/OP_UNUSED_FBFF.c
/OP_UNUSED_FCFF.c
/OP_UNUSED_FDFF.c
/OP_UNUSED_FEFF.c
/opcommon.c
onfig-x86
onfig-x86-atom
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/OP_UNUSED_F2FF.S
86-atom/OP_UNUSED_F3FF.S
86-atom/OP_UNUSED_F4FF.S
86-atom/OP_UNUSED_F5FF.S
86-atom/OP_UNUSED_F6FF.S
86-atom/OP_UNUSED_F7FF.S
86-atom/OP_UNUSED_F8FF.S
86-atom/OP_UNUSED_F9FF.S
86-atom/OP_UNUSED_FAFF.S
86-atom/OP_UNUSED_FBFF.S
86-atom/OP_UNUSED_FCFF.S
86-atom/OP_UNUSED_FDFF.S
86-atom/OP_UNUSED_FEFF.S
86-atom/TODO.txt
86/OP_UNUSED_F2FF.S
86/OP_UNUSED_F3FF.S
86/OP_UNUSED_F4FF.S
86/OP_UNUSED_F5FF.S
86/OP_UNUSED_F6FF.S
86/OP_UNUSED_F7FF.S
86/OP_UNUSED_F8FF.S
86/OP_UNUSED_F9FF.S
86/OP_UNUSED_FAFF.S
86/OP_UNUSED_FBFF.S
86/OP_UNUSED_FCFF.S
86/OP_UNUSED_FDFF.S
86/OP_UNUSED_FEFF.S
|
385828e36ea70effe9aa18a954d008b1f7dc1d63 |
05-Mar-2011 |
Ben Cheng <bccheng@android.com> |
Handle relocatable class objects in JIT'ed code. 1) Split the original literal pool into class object literals and constants. Elements in the class object pool have to match the specicial values perfectly (ie no +delta space optimizations) since they might be relocated. 2) Implement dvmJitScanAllClassPointers(void (*callback)(void *)) which is the entry routine to report all memory locations in the code cache that contain class objects (ie class object pool and predicted chaining cells for virtual calls). 3) Major codegen changes on how/when the class object pool are populated and how predicted chains are patched. Before this change the compiler thread is always in the VM_WAIT state, which won't prevent GC from running. Since the class object pointers captured by a worker thread are no longer guaranteed to be stable at JIT time, change various internal data structures to capture the class descriptor/loader tuple instead. The conversion from descriptor/loader tuple to actual class object pointers are only performed when the thread state is RUNNING or at GC safe point. 4) Separate the class object installation phase out of the main dvmCompilerAssembleLIR routine so that the impact to blocking GC requests is minimal. Add new stats to report the potential block time. For example: Potential GC blocked by compiler: max 46 us / avg 25 us 5) Various cleanup in the trace structure walkup code. Modified the verbose print routine to show the class descriptor in the class literal pool. For example: D/dalvikvm( 1450): -------- end of chaining cells (0x007c) D/dalvikvm( 1450): 0x44020628 (00b4): .class (Lcom/android/unit_tests/PerformanceTests$EmptyClass;) D/dalvikvm( 1450): 0x4402062c (00b8): .word (0xaca8d1a5) D/dalvikvm( 1450): 0x44020630 (00bc): .word (0x401abc02) D/dalvikvm( 1450): End Bug: 3482956 Change-Id: I2e736b00d63adc255c33067544606b8b96b72ffc
86-atom/TODO.txt
|
4570ad0a7706d3338d58bd0204e102719e4d68fb |
09-Mar-2011 |
Eugene Surovegin <surovegin@google.com> |
x86: restore standard stack frame layout and fix stack alignment. Native x86 can contain SSE instructions, this requires 16-byte aligned stack which is what GCC expects these days. Enforce this in dvmPlatformInvoke and in mterp. Also fix stack frame layout, so debuggers can produce backtraces across dvmMterpStdRun invocations. Change-Id: I43d00a6bf8210b7d3aa9276edabc08978084e4f2
ut/InterpAsm-x86.S
86/entry.S
86/footer.S
86/header.S
|
701abba5119f17a3b786fbb940aa62353a186100 |
09-Mar-2011 |
Carl Shapiro <cshapiro@google.com> |
Use indirect references in JNI by default. This change removes support for direct references. Change-Id: I2af043ecfc5811c16a7d02a5bbb6c071ec6f0a82
/gotoTargets.c
ommon/asm-constants.h
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
2ff04ab635eeba79c2dad82850c34188abcdfe62 |
09-Mar-2011 |
Andy McFadden <fadden@android.com> |
Fix method profiling Moved a couple of things out of MethodTraceState so they don't get zeroed after being initialized. Also, rearranged the native method invocation path slightly so the common case runs uninterrupted. Change-Id: I0dad007a7f344d93f30444156e67f20bed6606a4
rmv5te/footer.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
3828a7683b74fd7c6ec707bc7e84b134314bbe51 |
08-Mar-2011 |
buzbee <buzbee@google.com> |
resolved conflicts for merge of 10185db0 to dalvik-dev Change-Id: I29ffeacb0f4bfb740011c449a3693edd61ade4db
|
10185db0dfd6ed95bf5cad8a4756158bc6b375d6 |
08-Mar-2011 |
buzbee <buzbee@google.com> |
resolved conflicts for merge of d063e255 to honeycomb-plus-aosp Change-Id: I3c4d6895209ccba61ec3a14c24274939a7fc65e8
|
47f58250c5177adba475b0b11a36151ac0ce9ab9 |
07-Mar-2011 |
Dan Bornstein <danfuzz@android.com> |
Consistency in exception throws. Make the messages that consist of a series of values consistently use semicolons between the values, and make the call order for exception throws that take both "info about a thing" as well as "info about a use of that thing" take the "info about a thing" argument first. Practical upshot: Adding a second semicolon in the message for StringIndexOutOfBoundsException being thrown for a region, and switching the order of arguments of dvmThrowArrayIndexOutOfBoundsException(). Bug: 3500987 Change-Id: I97eb0046ab8997a68e2d6dfde5dbf3d02290c1f7
rmv5te/footer.S
/OP_APUT_OBJECT.c
/opcommon.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/TODO.txt
86/footer.S
|
6a52d1d4061950c5358b67e180e25e8c55cbdda7 |
06-Mar-2011 |
buzbee <buzbee@google.com> |
Fix JUMBO failures Fix some failures w/ the new Dalvik JUMBO opcodes on the x86 and portable interpreters. These showed up on dalvik/test/089-jumbo-opcodes when running with: run-test --host 089 # x86 host-mode run-test --portable --host 089 # portable host-mode run-test --portable 089 # on device, portable Change-Id: I520c8d2e001db95aa7525e4ffde7a81e2e786d38
/OP_THROW_VERIFICATION_ERROR_JUMBO.c
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86/OP_CONST_CLASS_JUMBO.S
|
0b8b293f228b3d341054bc1fad8a92d6e533b4dd |
04-Mar-2011 |
Dan Bornstein <danfuzz@android.com> |
Rename some of the exception functions. Since the there is no longer a "ByClass" vs. not distinction, remove all the "ByClass"es. Bug: 3500987 Change-Id: I6bdaf5a31e8166b47c333dbbb394dc811f321c5d
/OP_NEW_INSTANCE.c
/OP_NEW_INSTANCE_JUMBO.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
|
a3b3512e99ef51940b0a13e57528bd32803f72b4 |
04-Mar-2011 |
Dan Bornstein <danfuzz@android.com> |
More exception rework. This includes banishing dvmThrowExceptionWithClassMessage(), in favor of the "ByClass" version, as well as making the verification error throwing code use class objects. Bug: 3500987 Change-Id: I1d63cec0ffaf3a0ad17e9304ba6a21fe51072fc7
/OP_NEW_INSTANCE.c
/OP_NEW_INSTANCE_JUMBO.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
|
0346e9dcddccd449c731e42ef83708ff6d8f0976 |
02-Mar-2011 |
Andy McFadden <fadden@android.com> |
Change invoke-object-init to /range form The invoke-object-init instruction pretends to be a regular invoke that only knows how to call Object.<init>. As such it always takes one argument, and if we use the /range version we can specify the "this" register with 16 bits instead of only 4. Bug 3486699 Change-Id: I9ee4700c6935beee1dcbaa583b57befd33641414
rmv5te/OP_INVOKE_OBJECT_INIT.S
rmv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
/OP_INVOKE_OBJECT_INIT.c
/OP_INVOKE_OBJECT_INIT_RANGE.c
onfig-x86
onfig-x86-atom
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/OP_INVOKE_OBJECT_INIT.S
86-atom/OP_INVOKE_OBJECT_INIT_RANGE.S
86-atom/entry.S
86/OP_INVOKE_OBJECT_INIT.S
86/OP_INVOKE_OBJECT_INIT_RANGE.S
|
3d054be0780e2bee9553711d409608495cc2c19e |
02-Mar-2011 |
buzbee <buzbee@google.com> |
mterp generation cleanup Change I3a22048a introduced a new interpreter breakout mechanism, and with it a bit of hackish ugliness in the mechanism to automatically generate interpreter source files. This CL applies some Lipo and Botox: o New alt-op-start, alt-op-end commands removed - will just use existing op-start & op-end. o New command "handler-style" to explicitly declare interpreter style (computed-goto, jump-table or all-c). Previous trigger on "handler-size==0" removed. o Alternate handler stub no longer using fixed file name, but intead is named by command asm-alt-stub (which is modelled on existing alt-stub command). o Previous CL stated requirement for explicitly called-out handler for the Dalvik dispatch opcode. Turns out this was not necessary. Requirement removed. Change-Id: I20f7411820715476533c2073d28f357e28c1ae52
EADME.txt
rmv5te/ALT_OP_DISPATCH_FF.S
rmv5te/ALT_STUB.S
rmv5te/alt_stub.S
onfig-allstubs
onfig-armv5te
onfig-armv5te-vfp
onfig-armv7-a
onfig-armv7-a-neon
onfig-portdbg
onfig-portstd
onfig-x86
onfig-x86-atom
en-mterp.py
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86/ALT_OP_DISPATCH_FF.S
86/ALT_STUB.S
86/alt_stub.S
|
98f3eb12bf2a33c49712e093d5cc2aa713a93aa5 |
01-Mar-2011 |
buzbee <buzbee@google.com> |
Exception cleanup in the assembly interpreters Removed the last of the "exception as strings" calls from the assembly interpreters, replacing them with the helper functions. Change-Id: I4c44cde348ed7d2ea99f908bc22166afeb5e3d37
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_FILLED_NEW_ARRAY_JUMBO.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/footer.S
rmv5te/header.S
/header.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/TODO.txt
86/OP_FILLED_NEW_ARRAY.S
86/OP_FILLED_NEW_ARRAY_JUMBO.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_JUMBO.S
86/OP_NEW_INSTANCE.S
86/OP_NEW_INSTANCE_JUMBO.S
86/footer.S
86/header.S
|
a7d59bbafea5430fe81fc21ba94ddf6f6a63b0b3 |
24-Feb-2011 |
buzbee <buzbee@google.com> |
New interpreter breakout mechanism Introduce parallel handler entry points for mterp interpreters as a step towards fully supporting debug, profile and JIT within mterp (instead of bailing out to the portable debug interpreter). This CL contains most of the structural changes that need to happen, but does not yet enable the new switch mode. In short, within the mterp assembly interpreter register rIBASE points to an array of handlers for Dalvik opcodes. Instead of periodically checking for suspend, debug, profiling and JIT trace selection breakouts, rIBASE may simply be altered to point to the parallel breakout handlers when control needs to be rerouted. This will enable us to eliminate the separate portable debug interpreter and the entire mechanism of switching between the fast and portable interpreters. The x86 implementation required a large number of changes because of the need to dedicate a register to holding the table base. It will now use %edx (which was previously scratch). Changes include: o Support for two styles of mterp assembly code generation: computed goto and jump table (ARM uses computed goto, x86 uses jump table) o New mterp config operators to trigger generation of alternate entry points. o Alternate entries route execution through new dvmCheckInst(). That's where the checking code will go. o For x86, reserved register edx as dedicated rIBASE. o For jump-table mterps, ignore "%break" operator and allow variable-sized handlers with no "sister" region. Note that the x86-atom implementation will need substantial changes to function in this new model. Change-Id: I3a22048adb7dcfdeba4f94fbb977b26c3ab2fcb3
terp.c
EADME.txt
rmv5te/ALT_OP_DISPATCH_FF.S
rmv5te/ALT_STUB.S
rmv5te/OP_DISPATCH_FF.S
rmv5te/entry.S
rmv5te/footer.S
ommon/asm-constants.h
onfig-armv5te
onfig-armv5te-vfp
onfig-armv7-a
onfig-armv7-a-neon
onfig-x86
en-mterp.py
ut/InterpAsm-allstubs.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
86-atom/TODO.txt
86/ALT_OP_DISPATCH_FF.S
86/ALT_STUB.S
86/OP_ADD_LONG.S
86/OP_AGET.S
86/OP_AGET_WIDE.S
86/OP_AND_LONG.S
86/OP_APUT.S
86/OP_APUT_BOOLEAN.S
86/OP_APUT_BYTE.S
86/OP_APUT_CHAR.S
86/OP_APUT_OBJECT.S
86/OP_APUT_SHORT.S
86/OP_APUT_WIDE.S
86/OP_ARRAY_LENGTH.S
86/OP_CHECK_CAST.S
86/OP_CHECK_CAST_JUMBO.S
86/OP_CMPG_DOUBLE.S
86/OP_CMP_LONG.S
86/OP_CONST.S
86/OP_CONST_16.S
86/OP_CONST_4.S
86/OP_CONST_CLASS.S
86/OP_CONST_CLASS_JUMBO.S
86/OP_CONST_HIGH16.S
86/OP_CONST_STRING.S
86/OP_CONST_STRING_JUMBO.S
86/OP_CONST_WIDE.S
86/OP_CONST_WIDE_16.S
86/OP_CONST_WIDE_32.S
86/OP_CONST_WIDE_HIGH16.S
86/OP_DISPATCH_FF.S
86/OP_DIV_LONG.S
86/OP_DIV_LONG_2ADDR.S
86/OP_EXECUTE_INLINE.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_FILLED_NEW_ARRAY_JUMBO.S
86/OP_FILL_ARRAY_DATA.S
86/OP_IGET.S
86/OP_IGET_JUMBO.S
86/OP_IGET_QUICK.S
86/OP_IGET_WIDE.S
86/OP_IGET_WIDE_JUMBO.S
86/OP_IGET_WIDE_QUICK.S
86/OP_INSTANCE_OF.S
86/OP_INSTANCE_OF_JUMBO.S
86/OP_INT_TO_LONG.S
86/OP_INVOKE_DIRECT.S
86/OP_INVOKE_DIRECT_JUMBO.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_INTERFACE_JUMBO.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_STATIC_JUMBO.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_JUMBO.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_JUMBO.S
86/OP_IPUT.S
86/OP_IPUT_JUMBO.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_JUMBO.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_IPUT_QUICK.S
86/OP_IPUT_WIDE.S
86/OP_IPUT_WIDE_JUMBO.S
86/OP_IPUT_WIDE_QUICK.S
86/OP_MONITOR_ENTER.S
86/OP_MONITOR_EXIT.S
86/OP_MOVE.S
86/OP_MOVE_16.S
86/OP_MOVE_EXCEPTION.S
86/OP_MOVE_FROM16.S
86/OP_MOVE_RESULT.S
86/OP_MOVE_RESULT_WIDE.S
86/OP_MOVE_WIDE.S
86/OP_MOVE_WIDE_16.S
86/OP_MOVE_WIDE_FROM16.S
86/OP_MUL_INT.S
86/OP_MUL_INT_2ADDR.S
86/OP_MUL_INT_LIT16.S
86/OP_MUL_INT_LIT8.S
86/OP_MUL_LONG.S
86/OP_MUL_LONG_2ADDR.S
86/OP_NEG_LONG.S
86/OP_NEW_ARRAY.S
86/OP_NEW_ARRAY_JUMBO.S
86/OP_NEW_INSTANCE.S
86/OP_NEW_INSTANCE_JUMBO.S
86/OP_NOP.S
86/OP_NOT_LONG.S
86/OP_OR_LONG.S
86/OP_PACKED_SWITCH.S
86/OP_REM_DOUBLE.S
86/OP_REM_DOUBLE_2ADDR.S
86/OP_REM_FLOAT.S
86/OP_REM_FLOAT_2ADDR.S
86/OP_REM_INT.S
86/OP_REM_INT_2ADDR.S
86/OP_REM_INT_LIT16.S
86/OP_REM_INT_LIT8.S
86/OP_SGET.S
86/OP_SGET_JUMBO.S
86/OP_SGET_WIDE.S
86/OP_SGET_WIDE_JUMBO.S
86/OP_SHL_LONG.S
86/OP_SHL_LONG_2ADDR.S
86/OP_SHR_LONG.S
86/OP_SHR_LONG_2ADDR.S
86/OP_SPUT.S
86/OP_SPUT_JUMBO.S
86/OP_SPUT_OBJECT.S
86/OP_SPUT_OBJECT_JUMBO.S
86/OP_SPUT_WIDE.S
86/OP_SPUT_WIDE_JUMBO.S
86/OP_SUB_LONG.S
86/OP_USHR_LONG.S
86/OP_USHR_LONG_2ADDR.S
86/OP_XOR_LONG.S
86/bindiv.S
86/bindiv2addr.S
86/bindivLit16.S
86/bindivLit8.S
86/binflop.S
86/binflop2addr.S
86/binop.S
86/binop1.S
86/binop2addr.S
86/binopLit16.S
86/binopLit8.S
86/binopWide.S
86/binopWide2addr.S
86/cvtfp_int.S
86/entry.S
86/footer.S
86/fpcvt.S
86/header.S
86/shop2addr.S
86/stub.S
86/unop.S
86/unopWide.S
|
8cb0d098d79af61546e275f633325794f4587602 |
28-Feb-2011 |
buzbee <buzbee@google.com> |
Use new negative array size exception reporting Follow-up to change 98624 to enhance assembly interpreters to use the new dvmThrowNegativeArraySizeException. Change-Id: I9c8b425b3255d42afa1dc466024c03eeeb4eec23
rmv5te/OP_NEW_ARRAY.S
rmv5te/OP_NEW_ARRAY_JUMBO.S
rmv5te/footer.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86-atom/TODO.txt
86/OP_NEW_ARRAY.S
86/OP_NEW_ARRAY_JUMBO.S
86/footer.S
|
2c8e25b2010d1bba4dca0148691bc6e1a4ee7616 |
26-Feb-2011 |
Dan Bornstein <danfuzz@android.com> |
More exception cleanup. Added a few more classes to the list and tweaked dvmThrowNegativeArraySizeException() to actually take the size as an argument. Still pending: Changing the assembly interp files to make better calls. Change-Id: I3a470f5fd4c9a1f7f55fc875900096c00c4ac010
/OP_NEW_ARRAY.c
/OP_NEW_ARRAY_JUMBO.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
|
6d167a4b02f310700a55fc9a24fccce999e0fdf2 |
25-Feb-2011 |
Dan Bornstein <danfuzz@android.com> |
More exception cleanup. I added a few more exception class objects, and migrated existing uses of those exceptions away from naming the class as a string. I left one TODO in the x86-atom interp, as there is nobody actively maintaining that codebase. Change-Id: I9226a2d81b0389a14f7a3770d978a9bbe98c2898
ut/InterpAsm-x86-atom.S
86-atom/OP_CHECK_CAST.S
86-atom/footer.S
|
74501e600dcb5634aa26aee0a3f57f2b45b213f2 |
24-Feb-2011 |
Dan Bornstein <danfuzz@android.com> |
Round three of exception cleanup. I expanded AIOOBE since it was the odd one out, migrated the wrappers in Exception.h to the end of the file where they're less disruptive, and tweaked a couple other throws in the main vm code. Change-Id: Iae11fda2c47989ce7579483df226124ffeb2ac84
rmv5te/footer.S
/OP_APUT_OBJECT.c
/opcommon.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/TODO.txt
86/footer.S
|
70b00abc45d7d04342a96a03749f993028b060f7 |
23-Feb-2011 |
Dan Bornstein <danfuzz@android.com> |
Round two. This gets most of the rest of the cases where a simple(ish) message is included with a throw. Change-Id: Id081966e5c505063c4d4dcf936037cf4d55fc8bf
/gotoTargets.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
e0bf971b4c692658a419d01c08a738e707564010 |
23-Feb-2011 |
Dan Bornstein <danfuzz@android.com> |
Merge "Factor out class names from throw statements." into dalvik-dev
|
d27f3cf3e7b373487f39e035fc4b55168d55c454 |
23-Feb-2011 |
Dan Bornstein <danfuzz@android.com> |
Factor out class names from throw statements. Most exception throwing now happens via purpose-built wrapper functions, each of which encapsulates the actual exception class name, reducing one source of error (examples of which I fixed during this exercise) and generally tidying things up. This change doesn't fix all uses of exception class names, nor even all throws, because (a) there were classes I didn't get to; (b) because I didn't make wrappers for all the possible throw function variants (e.g. the one that takes a cause, the one that takes varargs for string formatting, etc.); and (c) there are uses of exception classes in contexts other than throwing. But this change at least makes a dent in the problem. Change-Id: I6586ddd3e66ac0fc32c23181b17600ded0b914b2
/OP_FILL_ARRAY_DATA.c
/OP_NEW_ARRAY.c
/OP_NEW_ARRAY_JUMBO.c
/OP_PACKED_SWITCH.c
/OP_SPARSE_SWITCH.c
/gotoTargets.c
/header.c
/opcommon.c
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
ef5db621255680dbbe46cfcce572989deea64387 |
22-Feb-2011 |
buzbee <buzbee@google.com> |
Fix for 3477749 WITH_TRACKREF_CHECKS Failed to specify grouping struct on access to debugTrackedRefStart in recent InterpState/Thread consolidation. Fixed. Change-Id: Ib996b96fa1f322e3c433377bea79293eb984fca9
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/entry.c
|
f8f23d402dc1eef107995b29ad4d91ee5b4e1c34 |
18-Feb-2011 |
Johnnie Birch <jlbirch> |
Update to allow x86-atom build for FI on Gingerbread Also handles most TODO.txt items and contains some rewriting of the dispatch code. Also adds a newline to the end of files that did not previously end with a newline. Change-Id: I0cf3e77dc7bbf5ed7ec8538ef4d7d8740e296640
onfig-x86-atom
ut/InterpAsm-x86-atom.S
ut/InterpC-x86-atom.c
86-atom/OP_ADD_FLOAT_2ADDR.S
86-atom/OP_ADD_INT.S
86-atom/OP_ADD_INT_2ADDR.S
86-atom/OP_ADD_INT_LIT16.S
86-atom/OP_AGET.S
86-atom/OP_AGET_BOOLEAN.S
86-atom/OP_AGET_BYTE.S
86-atom/OP_AGET_CHAR.S
86-atom/OP_AGET_SHORT.S
86-atom/OP_AGET_WIDE.S
86-atom/OP_AND_INT.S
86-atom/OP_AND_INT_2ADDR.S
86-atom/OP_AND_INT_LIT16.S
86-atom/OP_APUT.S
86-atom/OP_APUT_BYTE.S
86-atom/OP_APUT_CHAR.S
86-atom/OP_APUT_OBJECT.S
86-atom/OP_APUT_SHORT.S
86-atom/OP_APUT_WIDE.S
86-atom/OP_ARRAY_LENGTH.S
86-atom/OP_BREAKPOINT.S
86-atom/OP_CMPG_DOUBLE.S
86-atom/OP_CMPL_DOUBLE.S
86-atom/OP_CMPL_FLOAT.S
86-atom/OP_CONST.S
86-atom/OP_CONST_16.S
86-atom/OP_CONST_4.S
86-atom/OP_CONST_CLASS.S
86-atom/OP_CONST_STRING_JUMBO.S
86-atom/OP_CONST_WIDE_16.S
86-atom/OP_CONST_WIDE_32.S
86-atom/OP_EXECUTE_INLINE.S
86-atom/OP_FILLED_NEW_ARRAY.S
86-atom/OP_GOTO.S
86-atom/OP_GOTO_16.S
86-atom/OP_GOTO_32.S
86-atom/OP_IF_EQ.S
86-atom/OP_IF_EQZ.S
86-atom/OP_IF_GE.S
86-atom/OP_IF_GEZ.S
86-atom/OP_IF_GT.S
86-atom/OP_IF_GTZ.S
86-atom/OP_IF_LE.S
86-atom/OP_IF_LEZ.S
86-atom/OP_IF_LT.S
86-atom/OP_IF_LTZ.S
86-atom/OP_IF_NE.S
86-atom/OP_IF_NEZ.S
86-atom/OP_IGET_OBJECT_VOLATILE.S
86-atom/OP_IGET_VOLATILE.S
86-atom/OP_INT_TO_BYTE.S
86-atom/OP_INVOKE_DIRECT.S
86-atom/OP_INVOKE_DIRECT_EMPTY.S
86-atom/OP_IPUT_OBJECT.S
86-atom/OP_IPUT_OBJECT_QUICK.S
86-atom/OP_IPUT_OBJECT_VOLATILE.S
86-atom/OP_IPUT_VOLATILE.S
86-atom/OP_LONG_TO_INT.S
86-atom/OP_MOVE.S
86-atom/OP_MOVE_OBJECT.S
86-atom/OP_MOVE_OBJECT_FROM16.S
86-atom/OP_MOVE_WIDE.S
86-atom/OP_MUL_FLOAT.S
86-atom/OP_MUL_FLOAT_2ADDR.S
86-atom/OP_MUL_INT.S
86-atom/OP_MUL_INT_2ADDR.S
86-atom/OP_MUL_INT_LIT16.S
86-atom/OP_NEG_INT.S
86-atom/OP_OR_INT.S
86-atom/OP_OR_INT_2ADDR.S
86-atom/OP_OR_INT_LIT16.S
86-atom/OP_PACKED_SWITCH.S
86-atom/OP_REM_INT.S
86-atom/OP_RETURN_OBJECT.S
86-atom/OP_RSUB_INT.S
86-atom/OP_SGET_OBJECT_VOLATILE.S
86-atom/OP_SGET_VOLATILE.S
86-atom/OP_SHL_INT.S
86-atom/OP_SHL_INT_2ADDR.S
86-atom/OP_SHL_INT_LIT8.S
86-atom/OP_SHR_INT.S
86-atom/OP_SHR_INT_2ADDR.S
86-atom/OP_SHR_INT_LIT8.S
86-atom/OP_SPUT_OBJECT.S
86-atom/OP_SPUT_OBJECT_VOLATILE.S
86-atom/OP_SPUT_VOLATILE.S
86-atom/OP_SUB_FLOAT.S
86-atom/OP_SUB_FLOAT_2ADDR.S
86-atom/OP_SUB_INT.S
86-atom/OP_SUB_INT_2ADDR.S
86-atom/OP_THROW.S
86-atom/OP_THROW_VERIFICATION_ERROR.S
86-atom/OP_USHR_INT_LIT8.S
86-atom/OP_XOR_INT.S
86-atom/OP_XOR_INT_2ADDR.S
86-atom/OP_XOR_INT_LIT16.S
86-atom/TODO.txt
86-atom/bincmp.S
86-atom/binop.S
86-atom/binop2addr.S
86-atom/binopD.S
86-atom/binopD2addr.S
86-atom/binopDLit16.S
86-atom/binopDLit8.S
86-atom/binopDivRemLong2Addr.S
86-atom/binopF.S
86-atom/binopF2addr.S
86-atom/binopLit16.S
86-atom/binopLit8.S
86-atom/binopLit8S.S
86-atom/binopS.S
86-atom/binopS2addr.S
86-atom/binopWide.S
86-atom/binopWide2addr.S
86-atom/entry.S
86-atom/footer.S
86-atom/header.S
86-atom/unop.S
86-atom/zcmp.S
|
9f601a917c8878204482c37aec7005054b6776fa |
12-Feb-2011 |
buzbee <buzbee@google.com> |
Interpreter restructuring: eliminate InterpState The key datastructure for the interpreter is InterpState. This change eliminates it, merging its data with the Thread structure. Here's why: In principio creavit Fadden Thread et InterpState. And it was good. Thread holds thread-private state, while InterpState captures data associated with a Dalvik interpreter activation. Because JNI calls can result in nested interpreter invocations, we can have more than one InterpState for each actual thread. InterpState was relatively small, and it all worked well. It was used enough that in the Arm version a register (rGLUE) was dedicated to it. Then, along came the JIT guys, who saw InterpState as a convenient place to dump all sorts of useful data that they wanted quick access to through that dedicated register. InterpState grew and grew. In terms of space, this wasn't a big problem - but it did mean that the initialization cost of each interpreter activation grew as well. For applications that do a lot of callbacks from native code into Dalvik, this is measurable. It's also mostly useless cost because much of the JIT-related InterpState initialization was setting up useful constants - things that don't need to be saved and restored all the time. The biggest problem, though, deals with thread control. When something interesting is happening that needs all threads to be stopped (such as GC and debugger attach), we have access to all of the Thread structures, but we don't have access to all of the InterpState structures (which may be buried/nested on the native stack). As a result, polling for thread suspension is done via a one-indirection pointer chase. InterpState itself can't hold the stop bits because we can't always find it, so instead it holds a pointer to the global or thread-specific stop control. Yuck. With this change, we eliminate InterpState and merge all needed data into Thread. Further, we replace the decidated rGLUE register with a pointer to the Thread structure (rSELF). The small subset of state data that needs to be saved and restored across nested interpreter activations is collected into a record that is saved to the interpreter frame, and restored on exit. Further, these small records are linked together to allow tracebacks to show nested activations. Old InterpState variables that simply contain useful constants are initialized once at thread creation time. This CL is large enough by itself that the new ability to streamline suspend checks is not done here - that will happen in a future CL. Here we just focus on consolidation. Change-Id: Ide6b2fb85716fea454ac113f5611263a96687356
terp.c
terp.h
rmv5te/OP_APUT_OBJECT.S
rmv5te/OP_CHECK_CAST.S
rmv5te/OP_CHECK_CAST_JUMBO.S
rmv5te/OP_CONST_CLASS.S
rmv5te/OP_CONST_CLASS_JUMBO.S
rmv5te/OP_CONST_STRING.S
rmv5te/OP_CONST_STRING_JUMBO.S
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_EXECUTE_INLINE_RANGE.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_FILLED_NEW_ARRAY_JUMBO.S
rmv5te/OP_IGET.S
rmv5te/OP_IGET_JUMBO.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IGET_WIDE_JUMBO.S
rmv5te/OP_INSTANCE_OF.S
rmv5te/OP_INSTANCE_OF_JUMBO.S
rmv5te/OP_INVOKE_DIRECT.S
rmv5te/OP_INVOKE_DIRECT_JUMBO.S
rmv5te/OP_INVOKE_INTERFACE.S
rmv5te/OP_INVOKE_INTERFACE_JUMBO.S
rmv5te/OP_INVOKE_STATIC.S
rmv5te/OP_INVOKE_STATIC_JUMBO.S
rmv5te/OP_INVOKE_SUPER.S
rmv5te/OP_INVOKE_SUPER_JUMBO.S
rmv5te/OP_INVOKE_SUPER_QUICK.S
rmv5te/OP_INVOKE_VIRTUAL.S
rmv5te/OP_INVOKE_VIRTUAL_JUMBO.S
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_JUMBO.S
rmv5te/OP_IPUT_OBJECT.S
rmv5te/OP_IPUT_OBJECT_JUMBO.S
rmv5te/OP_IPUT_OBJECT_QUICK.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_IPUT_WIDE_JUMBO.S
rmv5te/OP_MONITOR_ENTER.S
rmv5te/OP_MONITOR_EXIT.S
rmv5te/OP_MOVE_EXCEPTION.S
rmv5te/OP_MOVE_RESULT.S
rmv5te/OP_MOVE_RESULT_WIDE.S
rmv5te/OP_NEW_ARRAY.S
rmv5te/OP_NEW_ARRAY_JUMBO.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_NEW_INSTANCE_JUMBO.S
rmv5te/OP_RETURN.S
rmv5te/OP_RETURN_WIDE.S
rmv5te/OP_SGET.S
rmv5te/OP_SGET_JUMBO.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SGET_WIDE_JUMBO.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_JUMBO.S
rmv5te/OP_SPUT_OBJECT.S
rmv5te/OP_SPUT_OBJECT_JUMBO.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_SPUT_WIDE_JUMBO.S
rmv5te/OP_THROW.S
rmv5te/OP_THROW_VERIFICATION_ERROR.S
rmv5te/OP_THROW_VERIFICATION_ERROR_JUMBO.S
rmv5te/debug.c
rmv5te/entry.S
rmv5te/footer.S
rmv5te/header.S
rmv5te/stub.S
rmv6t2/OP_IGET.S
rmv6t2/OP_IGET_WIDE.S
rmv6t2/OP_IPUT.S
rmv6t2/OP_IPUT_WIDE.S
ommon/asm-constants.h
stubs/entry.c
stubs/stubdefs.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/enddefs.c
ortable/entry.c
ortable/portdbg.c
ortable/stubdefs.c
86-atom/TODO.txt
86/OP_APUT_OBJECT.S
86/OP_CHECK_CAST.S
86/OP_CHECK_CAST_JUMBO.S
86/OP_CONST_CLASS.S
86/OP_CONST_CLASS_JUMBO.S
86/OP_CONST_STRING.S
86/OP_CONST_STRING_JUMBO.S
86/OP_EXECUTE_INLINE.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_FILLED_NEW_ARRAY_JUMBO.S
86/OP_IGET.S
86/OP_IGET_JUMBO.S
86/OP_IGET_WIDE.S
86/OP_IGET_WIDE_JUMBO.S
86/OP_INSTANCE_OF.S
86/OP_INSTANCE_OF_JUMBO.S
86/OP_INVOKE_DIRECT.S
86/OP_INVOKE_DIRECT_JUMBO.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_INTERFACE_JUMBO.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_STATIC_JUMBO.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_JUMBO.S
86/OP_INVOKE_SUPER_QUICK.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_JUMBO.S
86/OP_IPUT.S
86/OP_IPUT_JUMBO.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_JUMBO.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_IPUT_WIDE.S
86/OP_IPUT_WIDE_JUMBO.S
86/OP_MONITOR_ENTER.S
86/OP_MONITOR_EXIT.S
86/OP_MOVE_EXCEPTION.S
86/OP_MOVE_RESULT.S
86/OP_MOVE_RESULT_WIDE.S
86/OP_NEW_ARRAY.S
86/OP_NEW_ARRAY_JUMBO.S
86/OP_NEW_INSTANCE.S
86/OP_NEW_INSTANCE_JUMBO.S
86/OP_RETURN.S
86/OP_RETURN_WIDE.S
86/OP_SGET.S
86/OP_SGET_JUMBO.S
86/OP_SGET_WIDE.S
86/OP_SGET_WIDE_JUMBO.S
86/OP_SPUT.S
86/OP_SPUT_JUMBO.S
86/OP_SPUT_OBJECT.S
86/OP_SPUT_OBJECT_JUMBO.S
86/OP_SPUT_WIDE.S
86/OP_SPUT_WIDE_JUMBO.S
86/OP_THROW.S
86/OP_THROW_VERIFICATION_ERROR.S
86/OP_THROW_VERIFICATION_ERROR_JUMBO.S
86/entry.S
86/footer.S
86/header.S
86/stub.S
|
6af2ddd107842c3737c04c37343cac9be17f4209 |
17-Feb-2011 |
Andy McFadden <fadden@android.com> |
Defer marking of objects as finalizable This shifts responsibility for marking an object as "finalizable" from object creation to object initialization. We want to make the object finalizable when Object.<init> completes. For performance reasons we skip the call to the Object constructor (which doesn't do anything) and just take the opportunity to check the class flag. Handling of clone()d object isn't quite right yet. Also, fixed a minor glitch in stubdefs. Bug 3342343 Change-Id: I5b7b819079e5862dc9cbd1830bb445a852dc63bf
rmv5te/OP_INVOKE_OBJECT_INIT.S
/OP_INVOKE_OBJECT_INIT.c
ommon/asm-constants.h
onfig-armv7-a
onfig-x86
onfig-x86-atom
stubs/stubdefs.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/OP_INVOKE_OBJECT_INIT.S
86-atom/TODO.txt
86/OP_INVOKE_OBJECT_INIT.S
|
f9785ff48dc5e67737a8f8ae5fd587d3f1ed87fc |
16-Feb-2011 |
Andy McFadden <fadden@android.com> |
Merge "Fix some asm .size directives" into dalvik-dev
|
b387fe1b970a216c09d2abc98c893ff1fff3e512 |
16-Feb-2011 |
Andy McFadden <fadden@android.com> |
Fix some asm .size directives We were missing a .size directive for dvmPlatformInvoke, and the directive for the mterp handlers wasn't being handled right. Threw in a bonus directive for the entry point and the "assist debugger" stuff that wraps method calls. Bug 3456786 Change-Id: Ideee64a496e54eb09008410e9e9eba652b59f403
rmv5te/entry.S
rmv5te/footer.S
en-mterp.py
ut/InterpAsm-allstubs.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
|
e286ffaa5dbb1c4110e6658349cfd5c98147d3cc |
15-Feb-2011 |
buzbee <buzbee@google.com> |
Merge "Remove spurious code from bad merge/pilot error" into dalvik-dev
|
d3a92b577f11c6357c76dc850c6cbf352ef4c760 |
15-Feb-2011 |
buzbee <buzbee@google.com> |
Remove spurious code from bad merge/pilot error Looks like I spuriously duplicated two lines of assembly code in footer.S around a call to method profiling. Removed. Change-Id: I0b10656e15eba0d16af8784ae9ca09c33b5096c0
rmv5te/footer.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
1a8493cafbdbdcc26f5fbe7ed2cf8bdd01d1b732 |
14-Feb-2011 |
Andy McFadden <fadden@android.com> |
resolved conflicts for merge of 6e2af6d2 to dalvik-dev Change-Id: Ib5ec0912c0c5d7041b794351fcca10c41c4294ec
|
6e2af6d21076023f141a482d49b607407b2bc2c1 |
14-Feb-2011 |
Andy McFadden <fadden@android.com> |
Fix "all stubs" interpreter The "all stubs" interpreter is the recommended starting point for anyone creating a "fast" interpreter on a new CPU. This cleans up some minor bit rot in the code and documentation. Bug 3452689 Change-Id: I6bc3b0b5da11955d842d5fc5f16cb1a2209d4a89
stubs/entry.c
ut/InterpAsm-x86-atom.S
ut/InterpC-allstubs.c
|
750d110b62cef538e193b6f91f5239b0c4b63ef1 |
12-Feb-2011 |
Andy McFadden <fadden@android.com> |
Rename invoke-direct-empty to invoke-object-init The invoke-direct-empty instruction was introduced to remove the overhead of calling the empty Object constructor. We now need it to do some extra work on behalf of object construction, so it's appropriate to change the instruction name to match the role it fills rather than the more general role it was hoped to fill. No functional changes. Bug 3342343 Change-Id: I65dd6a2c00c99581c9a19b16fe193b70642c8fbb
rmv5te/OP_INVOKE_DIRECT_EMPTY.S
rmv5te/OP_INVOKE_OBJECT_INIT.S
/OP_INVOKE_DIRECT_EMPTY.c
/OP_INVOKE_OBJECT_INIT.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86-atom/OP_INVOKE_DIRECT_EMPTY.S
86-atom/OP_INVOKE_OBJECT_INIT.S
86-atom/entry.S
86/OP_INVOKE_DIRECT_EMPTY.S
86/OP_INVOKE_OBJECT_INIT.S
86/entry.S
|
529d6b8112a06daca3bf4a89dec9fbad95efe46b |
11-Feb-2011 |
Andy McFadden <fadden@android.com> |
Tweak the 64-bit load/store code The old version would either move data through a union, call memcpy(), or just cast the pointer to a wider type and dereference it. The latter turns out to be an aliasing violation, and it recently started causing test failures on the "host" build. We now use memcpy() for x86 and unions for ARM. Bug 3431820 Change-Id: I302a7f49f7ae88ac96b8f7fef3d9260ac64d631b
/header.c
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
b35a9ecc552bfda991a3e6d774c2d58f40b47be4 |
03-Feb-2011 |
Bill Buzbee <buzbee@google.com> |
Merge "[JIT] Fix for 3385583: Performance variance" into dalvik-dev
|
1b3da59fff0c63770e10684e243a36f3d0218637 |
03-Feb-2011 |
Bill Buzbee <buzbee@google.com> |
[JIT] Fix for 3385583: Performance variance Closes a window in which the "interpret-only" templace could get chained to an existing trace while the intended translation was under construction. Note that this CL also introduces some small, but fundamental changes in trace formation: 1. Previouosly, when an exception or other trace terminating event occurred during trace formation, the entire trace was abandoned. With this change, we instead end the trace at the last successful instruction. 2. We previously allowed multiple attempts (perhaps by multiple threads) to form a trace compilation request for a dalvik PC. This was done in an attempt to allow recovery from compiler failures. Now we enforce a new rule: only the thread that wins the race to allocate an entry in the JitTable will form the trace request. 3. In a (probably misguided) attempt avoid unnecessary contention, we previously allowed work order enqueue requests to be dropped if a requester did not aquire TableLock on first attempt (assuming that if the trace were hot, it would be requested again). Now we block on enqueue. Change-Id: I40ea4f1b012250219ca37d5c40c5f22cae2092f1
/OP_NEW_INSTANCE.c
/OP_NEW_INSTANCE_JUMBO.c
/gotoTargets.c
/opcommon.c
stubs/stubdefs.c
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/portdbg.c
ortable/portstd.c
|
01605d2b668e8e1701cfdfa302dde847b9171fc9 |
01-Feb-2011 |
Carl Shapiro <cshapiro@google.com> |
Remove the unused monitor tracking and deadlock prediction code. This feature has been in the code base for several releases but has never been enabled. Change-Id: Ia770b03ebc90a3dc7851c0cd8ef301f9762f50db
rmv5te/OP_MONITOR_ENTER.S
/OP_MONITOR_ENTER.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86-atom/OP_MONITOR_ENTER.S
86/OP_MONITOR_ENTER.S
|
cfdeca37fcaa27c37bad5077223e4d1e87f1182e |
14-Jan-2011 |
Ben Cheng <bccheng@android.com> |
Add runtime support for method based compilation. Enhanced code cache management to accommodate both trace and method compilations. Also implemented a hacky dispatch routine for virtual leaf methods. Microbenchmark showed 3x speedup in leaf method invocation. Change-Id: I79d95b7300ba993667b3aa221c1df9c7b0583521
rmv5te/footer.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86-atom/TODO.txt
86/footer.S
|
18fba346582c08d81aa96d9508c0e935bad5f36f |
20-Jan-2011 |
buzbee <buzbee@google.com> |
Support traceview-style profiling in all builds This change builds on an earlier bccheng change that allowed JIT'd code to avoid reverting to the debug portable interpeter when doing traceview-style method profiling. That CL introduced a new traceview build (libdvm_traceview) because the performance delta was too great to enable the capability for all builds. In this CL, we remove the libdvm_traceview build and provide full-speed method tracing in all builds. This is done by introducing "_PROF" versions of invoke and return templates used by the JIT. Normally, these templates are not used, and performace in unaffected. However, when method profiling is enabled, all existing translation are purged and new translations are created using the _PROF templates. These templates introduce a smallish performance penalty above and beyond the actual tracing cost, but again are only used when tracing has been enabled. Strictly speaking, there is a slight burden that is placed on invokes and returns in the non-tracing case - on the order of an additional 3 or 4 cycles per invoke/return. Those operations are already heavyweight enough that I was unable to measure the added cost in benchmarks. Change-Id: Ic09baf4249f1e716e136a65458f4e06cea35fc18
terp.c
rmv5te/footer.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
cb3081f675109049e63380170b60871e8275f9a8 |
14-Jan-2011 |
buzbee <buzbee@google.com> |
Consolidate mterp's debug/profile/suspend control This is a step towards full debug & profiling support in JIT'd code. Previously, the interpreter made multiple distinct checks for pending suspend requests, debugger and profiler checks at each safe point. This CL moves the individual controls into a single control word, significantly speeding up the safe-point check code path in the common fast case. In short, any time some VM component wants control to break at a safe point it will set a bit in gDvm.interpBreak, which will be examined at the safe point check in footer.S. In the old code, the safe point check consisted of 11 instructions (including 6 loads). The new sequence is 6 instructions (4 loads - two of which are needed and two are speculative to fill otherwise stalling slots). This code path is hot enough in the interpreter that we actually see some measureable speedups in benchmarks. The old sieve benchmark improves from 252 to 256 (~1.5%). As part of the change, global debuggerActive and activeProfilers variables have been eliminated as redundant. Note also that there is a subtle change in thread suspension. Thread suspend request counts are kept on a per-thread basis, and previously each thread would only examine its own suspend count. With this change, a bit has been allocated in interpBreak to signify that at least one suspend request is active across all threads. This bit is treated as "some thread is supposed to suspend, check to see if it's me". Change-Id: I527dc918f58d1486ef3324136080ef541a775ba8
terp.c
rmv5te/footer.S
/OP_INVOKE_DIRECT_EMPTY.c
/gotoTargets.c
ommon/asm-constants.h
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/debug.c
86/footer.S
|
71eee1f0c2eb514585fdbee16730c9c2209e8f68 |
04-Jan-2011 |
jeffhao <jeffhao@google.com> |
Added vm support for new jumbo opcodes. This enables jumbo opcodes by default, and they will get used by the current build without modification. Support has been added for arm, x86, and the portable interpreter. x86-atom support is on the TODO list. This commit also includes a test for the new jumbo opcodes. Change-Id: Ic3f1b41b51645861c5196f76aaf0e96e727ea537
rmv5te/OP_CHECK_CAST_JUMBO.S
rmv5te/OP_CONST_CLASS_JUMBO.S
rmv5te/OP_DISPATCH_FF.S
rmv5te/OP_FILLED_NEW_ARRAY_JUMBO.S
rmv5te/OP_IGET_BOOLEAN_JUMBO.S
rmv5te/OP_IGET_BYTE_JUMBO.S
rmv5te/OP_IGET_CHAR_JUMBO.S
rmv5te/OP_IGET_JUMBO.S
rmv5te/OP_IGET_OBJECT_JUMBO.S
rmv5te/OP_IGET_SHORT_JUMBO.S
rmv5te/OP_IGET_WIDE_JUMBO.S
rmv5te/OP_INSTANCE_OF_JUMBO.S
rmv5te/OP_INVOKE_DIRECT_JUMBO.S
rmv5te/OP_INVOKE_INTERFACE_JUMBO.S
rmv5te/OP_INVOKE_STATIC_JUMBO.S
rmv5te/OP_INVOKE_SUPER_JUMBO.S
rmv5te/OP_INVOKE_VIRTUAL_JUMBO.S
rmv5te/OP_IPUT_BOOLEAN_JUMBO.S
rmv5te/OP_IPUT_BYTE_JUMBO.S
rmv5te/OP_IPUT_CHAR_JUMBO.S
rmv5te/OP_IPUT_JUMBO.S
rmv5te/OP_IPUT_OBJECT_JUMBO.S
rmv5te/OP_IPUT_SHORT_JUMBO.S
rmv5te/OP_IPUT_WIDE_JUMBO.S
rmv5te/OP_NEW_ARRAY_JUMBO.S
rmv5te/OP_NEW_INSTANCE_JUMBO.S
rmv5te/OP_SGET_BOOLEAN_JUMBO.S
rmv5te/OP_SGET_BYTE_JUMBO.S
rmv5te/OP_SGET_CHAR_JUMBO.S
rmv5te/OP_SGET_JUMBO.S
rmv5te/OP_SGET_OBJECT_JUMBO.S
rmv5te/OP_SGET_SHORT_JUMBO.S
rmv5te/OP_SGET_WIDE_JUMBO.S
rmv5te/OP_SPUT_BOOLEAN_JUMBO.S
rmv5te/OP_SPUT_BYTE_JUMBO.S
rmv5te/OP_SPUT_CHAR_JUMBO.S
rmv5te/OP_SPUT_JUMBO.S
rmv5te/OP_SPUT_OBJECT_JUMBO.S
rmv5te/OP_SPUT_SHORT_JUMBO.S
rmv5te/OP_SPUT_WIDE_JUMBO.S
rmv5te/OP_THROW_VERIFICATION_ERROR_JUMBO.S
rmv5te/OP_UNUSED_27FF.S
rmv5te/OP_UNUSED_28FF.S
rmv5te/OP_UNUSED_29FF.S
rmv5te/OP_UNUSED_2AFF.S
rmv5te/OP_UNUSED_2BFF.S
rmv5te/OP_UNUSED_2CFF.S
rmv5te/OP_UNUSED_2DFF.S
rmv5te/OP_UNUSED_2EFF.S
rmv5te/OP_UNUSED_2FFF.S
rmv5te/OP_UNUSED_30FF.S
rmv5te/OP_UNUSED_31FF.S
rmv5te/OP_UNUSED_32FF.S
rmv5te/OP_UNUSED_33FF.S
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rmv5te/OP_UNUSED_3AFF.S
rmv5te/OP_UNUSED_3BFF.S
rmv5te/OP_UNUSED_3CFF.S
rmv5te/OP_UNUSED_3DFF.S
rmv5te/OP_UNUSED_3EFF.S
rmv5te/OP_UNUSED_3FFF.S
rmv5te/OP_UNUSED_40FF.S
rmv5te/OP_UNUSED_41FF.S
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rmv5te/OP_UNUSED_4DFF.S
rmv5te/OP_UNUSED_4EFF.S
rmv5te/OP_UNUSED_4FFF.S
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rmv5te/OP_UNUSED_D7FF.S
rmv5te/OP_UNUSED_D8FF.S
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rmv5te/footer.S
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/gotoTargets.c
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en-mterp.py
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/entry.c
ortable/stubdefs.c
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86-atom/OP_CONST_CLASS_JUMBO.S
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86-atom/OP_UNUSED_E2FF.S
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86-atom/TODO.txt
86/OP_CHECK_CAST_JUMBO.S
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86/OP_FILLED_NEW_ARRAY_JUMBO.S
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86/OP_IGET_CHAR_JUMBO.S
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86/OP_IGET_OBJECT_JUMBO.S
86/OP_IGET_SHORT_JUMBO.S
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86/OP_INSTANCE_OF_JUMBO.S
86/OP_INVOKE_DIRECT_JUMBO.S
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86/OP_NEW_ARRAY_JUMBO.S
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86/OP_SGET_BOOLEAN_JUMBO.S
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86/OP_SPUT_JUMBO.S
86/OP_SPUT_OBJECT_JUMBO.S
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86/OP_SPUT_WIDE_JUMBO.S
86/OP_THROW_VERIFICATION_ERROR_JUMBO.S
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86/entry.S
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86/header.S
|
f415bcc7f5211acae4f081f5d003d27a97b9d51a |
06-Jan-2011 |
Ben Cheng <bccheng@android.com> |
Update field offsets in InterpState per Jit-to-Interp cleanup Change-Id: Icf4aeac2fabbd0b6cd33f4d946055a9dc7e49f49
ommon/asm-constants.h
|
2e152baec01433de9c63633ebc6f4adf1cea3a87 |
16-Dec-2010 |
buzbee <buzbee@google.com> |
[JIT] Trace profiling support In preparation for method compilation, this CL causes all traces to include two entry points: profiling and non-profiling. For now, the profiling entry will only be used if dalvik is run with -Xjitprofile, and largely works like it did before. The difference is that profiling support no longer requires the "assert" build - it's always there now. This will enable us to do a form of sampling profiling of traces in order to identify hot methods or hot trace groups, while keeping the overhead low by only switching profiling on periodically. To turn the periodic profiling on and off, we simply unchain all existing translations and set the appropriate global profile state. The underlying translation lookup and chaining utilties will examine the profile state to determine which entry point to use (i.e. - profiling or non-profiling) while the traces naturally rechain during further execution. Change-Id: I9ee33e69e33869b9fab3a57e88f9bc524175172b
terp.c
ommon/asm-constants.h
|
00603079b8723b32c955513eae63a8f97898074d |
28-Oct-2010 |
Ben Cheng <bccheng@android.com> |
Implement method parser and SSA transformation. Change-Id: If3fb3a36f33aaee8e5fdded4e9fa607be54f0bfb
ut/InterpC-allstubs.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
dfd1bbf07d98c82a6072182f705f64a30ebf480b |
23-Sep-2010 |
buzbee <buzbee@google.com> |
Experimental x86 Jit trace selection Experimental support for trace selection for x86 host mode operation. Not enabled by default. Turned on by setting WITH_HOST_DALVIK true and WITH_JIT true. When enabled, profiles during x86 fast interpreter operation, selects hot traces and "compiles" traces consisting of jumps back to the interpreter. First in a series of experimental x86 support checkins. Change-Id: I0e423ec58a7bf01f226cb486f55de2841fab1002
terp.c
ommon/asm-constants.h
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
86/footer.S
86/header.S
|
fc75f3ed87b55d625b6054e18645da5cbdba31c6 |
07-Dec-2010 |
Carl Shapiro <cshapiro@google.com> |
Fix implicit conversions, rename reserved works, enable -Wc++-compat. Change-Id: I06292964a6882ea2d0c17c5c962db95e46b01543
/gotoTargets.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
|
ccaab18ae6d203108445fef7682065dfbb007657 |
04-Dec-2010 |
Dan Bornstein <danfuzz@android.com> |
Another clarifying rename and a bit more automation. kNumDalvikInstructions is now kNumPackedOpcodes, there is a new kMaxOpcodeValue, and both are generated by opcode-gen. Change-Id: Ic46f1f52d2d21382452c8e777024f4a985ad31d3 Bonus: Reworded the switch and array data comment for clarity.
terp.c
EADME.txt
en-mterp.py
|
3a36ca8c3f9d352d7df02557ab9c491102427b2b |
03-Dec-2010 |
Dan Bornstein <danfuzz@android.com> |
Add a note. Change-Id: I55362cbc8bfbb22ebcd493db7cdeb34fc3394e3a
86-atom/TODO.txt
|
90f15431b24a4004fab2db70f273155fcd1c42a4 |
03-Dec-2010 |
Dan Bornstein <danfuzz@android.com> |
Make opcode 00ff be called "dispatch-ff". With this change, it's still implemented as an unused opcode, but it's now ready for its new life! Change-Id: Ic70d311704925067e47d87b657d133a792144e65
rmv5te/OP_DISPATCH_FF.S
rmv5te/OP_UNUSED_FF.S
/OP_DISPATCH_FF.c
/OP_UNUSED_FF.c
onfig-x86-atom
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86-atom/OP_DISPATCH_FF.S
86-atom/OP_UNUSED_FF.S
86-atom/entry.S
86/OP_DISPATCH_FF.S
86/OP_UNUSED_FF.S
86/entry.S
|
7c139161d191c0116cf56f0c0d5979291de507ee |
03-Dec-2010 |
buzbee <buzbee@google.com> |
Merge "x86-mterp bug fix; support host mode in tests" into dalvik-dev
|
e485276c6ba778cafa373b3b5c867f84e91b0bfd |
02-Dec-2010 |
Dan Bornstein <danfuzz@android.com> |
Rename some instruction/opcode types and utilities. A lot of this is more about properties of opcodes as opposed to inspecting instructions per se, and the new naming attempts to make it clear what is being queried and what sort of data is being returned. Change-Id: Ice6f9f2ebf4f1cfa8c99597419aa13d1134a33b2
86-atom/header.S
|
7dc44a1c9a37d528f080eb51739da80696bb1f05 |
02-Dec-2010 |
buzbee <buzbee@google.com> |
x86-mterp bug fix; support host mode in tests A recent x86 housecleaning change introduced a bug in OP_FILLED_ARRAY. Fixed that, plus hacked up dalvik test scripts to support host mode operation (with --host) Change-Id: Iaf8b1ab753f93fa344e64f984a3c4696433ec9aa
ut/InterpAsm-x86.S
86/OP_FILLED_NEW_ARRAY.S
|
9a1f81699cc05b58378ffb9aadb4e97677943791 |
02-Dec-2010 |
Dan Bornstein <danfuzz@android.com> |
It's "opcode" not "opCode". Similarly "Opcode" not "OpCode". This appears to be the general worldwide consensus on the matter. Other residents of my office didn't seem to mind one way or the other how it's spelled in our code, but for whatever reason, it really bugged me. Change-Id: Ia0b73d19c54aefc0f543a9c9451dda22ee876a59
/OP_BREAKPOINT.c
en-mterp.py
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
|
df4daaf8f41e3dcaa8221f54273338160dd43138 |
01-Dec-2010 |
Dan Bornstein <danfuzz@android.com> |
Rename OpCode.h -> DexOpcodes.h. Also incorporate the former contents of OpCodeNames.h. This is a small attempt to increase naming consistency in libdex. There will be a bit more to come, in a follow-up. Change-Id: Ia7ab06042dde2e19eda02ef1fee72fb4260e899d
en-mterp.py
|
ad4a3ebb411dd83031660ed57a37cd9a7195ad6a |
20-Nov-2010 |
Elliott Hughes <enh@google.com> |
Merge "Better ArrayStoreException detail messages." into dalvik-dev
|
63644657f74e0a5d05f2c5fb56a18872e7ac7427 |
20-Nov-2010 |
Elliott Hughes <enh@google.com> |
Better ArrayStoreException detail messages. This fixes the portable interpreter, ARM, and x86. System.arraycopy was already doing the right thing. Bug: 3216051 Change-Id: I8a675eb62d6e7fd53a009f53ce8e34f93799b18c
rmv5te/OP_APUT_OBJECT.S
rmv5te/footer.S
/OP_APUT_OBJECT.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86-atom/TODO.txt
86/OP_APUT_OBJECT.S
86/footer.S
|
675b642510ed79e8a7a3f23126dfac7679fd65b9 |
20-Nov-2010 |
Dan Bornstein <danfuzz@android.com> |
Say kNumDalvikInstructions when appropriate. In particular, use it instead of just saying 256, and similarly for 255. The number of opcodes will be changing soon. Change-Id: Icc77120c2673968dddd6b4003f717245d46e4159
terp.c
EADME.txt
en-mterp.py
|
bb08b668b174d6babcc3866201aaf1d3b7293ada |
19-Nov-2010 |
Elliott Hughes <enh@google.com> |
Better ClassCastException detail messages for x86. Bug: 3210374 Change-Id: I5b6ff68b611f56276ef6e519511ed4dee22b0136
ut/InterpAsm-x86.S
86-atom/TODO.txt
86/OP_CHECK_CAST.S
86/footer.S
|
c560e30f68265068bed9eadf174d1e76288d2952 |
18-Nov-2010 |
Elliott Hughes <enh@google.com> |
Include both types in ClassCastException detail messages. Along the lines of "java.lang.Exception cannot be cast to java.lang.String". This is ARM and portable interpreter only. x86 will come later. Bug: 3210374 Change-Id: I48719dbdb569bbc3be2a31d0e5507b8dc42101b3
rmv5te/OP_CHECK_CAST.S
rmv5te/footer.S
/OP_CHECK_CAST.c
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
|
3e1bbffab14075a340ad0165c6ada6a43875a01f |
27-Oct-2010 |
buzbee <buzbee@google.com> |
x86: Improve ArrayIndexOutOfBoundsException detail messages issue 3122084 Changes the x86 interpreter to use the new dvmThrowAIOOBE call for out of bounds exception w/ more useful info. Change-Id: Ic196cc99c561bf31953993a6928f574e5c5bf831
ut/InterpAsm-x86.S
86-atom/TODO.txt
86/OP_AGET.S
86/OP_AGET_WIDE.S
86/OP_APUT.S
86/OP_APUT_OBJECT.S
86/OP_APUT_WIDE.S
86/footer.S
|
1d93ce0f5584d284ad95998a07546b43b710a20d |
22-Oct-2010 |
Ben Cheng <bccheng@android.com> |
resolved conflicts for merge of dfc99234 to dalvik-dev Change-Id: I0b5b19f9f6cd7aa0b3b51e0f9b87ce21c3175771
|
8c9ac9ab0ab6fd75b73cb0d99005da3aa90c167c |
22-Oct-2010 |
Ben Cheng <bccheng@android.com> |
Avoid conditional loads if WORKAROUND_CORTEX_A9_745320 is defined. No noticeable performance impact by this change. Bug: 3117632 Change-Id: I31c6adc6cb9999498bb456f1e87f6f04f33e4144
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
|
d88756df5b4dbc6fd450afd0019a5f64ebe4432d |
22-Oct-2010 |
Elliott Hughes <enh@google.com> |
Remove junk from platform.S now armv4t is gone. Change-Id: I30079aacc753c89cfc3a3f64bd900a0cc858d65f
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_EXECUTE_INLINE_RANGE.S
rmv5te/entry.S
rmv5te/footer.S
rmv5te/platform.S
rmv7-a/platform.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
e877cc41c1a5d4f577c5f6fc6bacbe388dfd1d59 |
21-Oct-2010 |
Elliott Hughes <enh@google.com> |
Detail messages for ArrayIndexOutOfBoundsExceptions. This adds ARM fast interpreter and JIT support. x86 is still missing. Change-Id: Ide46fd9dcd06780193848f594ce7d1491d7f5a96
rmv5te/OP_APUT_OBJECT.S
rmv5te/footer.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
dbe52e8f50c87cfd38bb738bb6edb6e18e11e720 |
22-Oct-2010 |
Elliott Hughes <enh@google.com> |
Remove armv4t support. This was never finished, and hasn't been maintained. And the hardware's totally obsolete. Change-Id: Icbf78e507de3b8be8a8f995b8423cc3c678ab0d3
rmv4t/OP_AGET_WIDE.S
rmv4t/OP_APUT_WIDE.S
rmv4t/OP_IGET_WIDE.S
rmv4t/OP_IGET_WIDE_QUICK.S
rmv4t/OP_IGET_WIDE_VOLATILE.S
rmv4t/OP_IPUT_WIDE.S
rmv4t/OP_IPUT_WIDE_QUICK.S
rmv4t/OP_IPUT_WIDE_VOLATILE.S
rmv4t/OP_SGET_WIDE.S
rmv4t/OP_SGET_WIDE_VOLATILE.S
rmv4t/OP_SPUT_WIDE.S
rmv4t/OP_SPUT_WIDE_VOLATILE.S
rmv4t/platform.S
onfig-armv4t
ut/InterpAsm-armv4t.S
ut/InterpC-armv4t.c
ebuild.sh
|
ee0dcfe7716e4fa60ce5dfbf03ec8ed6777452fa |
21-Oct-2010 |
Andy McFadden <fadden@android.com> |
Rebuild the x86-atom interpreter. Change-Id: I784e60325a82fd43420e489ee17e2013684c04d2
ut/InterpAsm-x86-atom.S
|
0016024cdd2bdeef3b98c92f7a8f40a2bc1ff42d |
21-Oct-2010 |
Elliott Hughes <enh@google.com> |
Better detail messages in ArrayIndexOutOfBoundExceptions. The RI only includes the index. We've traditionally included nothing. This patch fixes the portable interpreter to include both the index and the array length. Later patches will address the ARM- and x86-specific code. Change-Id: I9d0e6baacced4e1d33e6cd75965017a38571af67
/OP_APUT_OBJECT.c
/opcommon.c
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
ef1ed3c5cbde4de64e1991de2dbea57efd964841 |
14-Oct-2010 |
buzbee <buzbee@google.com> |
x86 mterp: fix cherry-pick/merge, issue 3095771 Bug http://b/issue?id=3095771 Change https://android-git.corp.google.com/g/#change,70700 was a cherry-pick/merge of https://android-git.corp.google.com/g/#change,70388 It was not properly merged, and resulting in the register holding the object head to be trashed (and subsequently broke GC). Change-Id: Ic480104e3a643a5b744d36eb0aefaedd3e4f925c
ut/InterpAsm-x86.S
86/OP_APUT_OBJECT.S
|
1193689c429bef042b34436acd77871749176b13 |
12-Oct-2010 |
Jean-Baptiste Queru <jbq@google.com> |
am baac134a: am 789fb059: am bc02ca96: Merge "Fixed bug in OP_GOTO_32.S, added support for additional parameters to dvmHandleStackOverflow" Merge commit 'baac134a4fab06f538a10d660585d33c587506e9' into dalvik-dev * commit 'baac134a4fab06f538a10d660585d33c587506e9': Fixed bug in OP_GOTO_32.S, added support for additional parameters to dvmHandleStackOverflow
|
baac134a4fab06f538a10d660585d33c587506e9 |
12-Oct-2010 |
Jean-Baptiste Queru <jbq@google.com> |
am 789fb059: am bc02ca96: Merge "Fixed bug in OP_GOTO_32.S, added support for additional parameters to dvmHandleStackOverflow" Merge commit '789fb0592cb6ea7ac573bd81ea8fb0a8bb5e103f' * commit '789fb0592cb6ea7ac573bd81ea8fb0a8bb5e103f': Fixed bug in OP_GOTO_32.S, added support for additional parameters to dvmHandleStackOverflow
|
789fb0592cb6ea7ac573bd81ea8fb0a8bb5e103f |
11-Oct-2010 |
Jean-Baptiste Queru <jbq@google.com> |
am bc02ca96: Merge "Fixed bug in OP_GOTO_32.S, added support for additional parameters to dvmHandleStackOverflow" Merge commit 'bc02ca96c5cd3b45939809ed43ae2e7f2e4fb5b9' into gingerbread-plus-aosp * commit 'bc02ca96c5cd3b45939809ed43ae2e7f2e4fb5b9': Fixed bug in OP_GOTO_32.S, added support for additional parameters to dvmHandleStackOverflow
|
7e4aaa8f853a3eb2b767b8ebb3ec402dfe850c13 |
02-Oct-2010 |
Andy McFadden <fadden@android.com> |
am 3d40f20c: Merge "Use DMB ST for store fence." Merge commit '3d40f20caf1d7778be664cc33ecd395281dfb2e5' into dalvik-dev * commit '3d40f20caf1d7778be664cc33ecd395281dfb2e5': Use DMB ST for store fence.
|
c054d1e57504e1cd5093c5b16260c4979c6d3091 |
01-Oct-2010 |
Andy McFadden <fadden@android.com> |
Use DMB ST for store fence. Change-Id: I4bde544a7c66e30a1756425ec088e53baa2f11a1
rmv7-a/platform.S
|
abdb2ee3757214111110aa570f4c3670e3ecf675 |
01-Oct-2010 |
buzbee <buzbee@google.com> |
am 7c1f9b34: resolved conflicts for merge of 6d55b332 to master Merge commit '7c1f9b34d49aa7cea9b830226e33e95d7608cf76' into dalvik-dev * commit '7c1f9b34d49aa7cea9b830226e33e95d7608cf76': GC Card marking fix for SPUT_OBJECT - use correct object head
|
7c1f9b34d49aa7cea9b830226e33e95d7608cf76 |
01-Oct-2010 |
buzbee <buzbee@google.com> |
resolved conflicts for merge of 6d55b332 to master Change-Id: I21e35d4cdf2636ae3cd7facd45ad4f5c4ab82e7b
|
6d55b33267ddad823bc310c77c01c8527d6f87a4 |
01-Oct-2010 |
buzbee <buzbee@google.com> |
am b78c76f8: GC Card marking fix for SPUT_OBJECT - use correct object head Merge commit 'b78c76f88ea42e7a3b295c210ca9ee86e7290043' into gingerbread-plus-aosp * commit 'b78c76f88ea42e7a3b295c210ca9ee86e7290043': GC Card marking fix for SPUT_OBJECT - use correct object head
|
b78c76f88ea42e7a3b295c210ca9ee86e7290043 |
01-Oct-2010 |
buzbee <buzbee@google.com> |
GC Card marking fix for SPUT_OBJECT - use correct object head Change-Id: I8b84a4f1e1690f5b62de7404ea6ede00317848bb
rmv5te/OP_SPUT_OBJECT.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86/OP_SPUT_OBJECT.S
|
b7154741116010f90e52972bf603c30cc9d9d519 |
29-Sep-2010 |
buzbee <buzbee@google.com> |
resolved conflicts for merge of 453d1aed to dalvik-dev Change-Id: Ief387b280581cf1f271c96eb5a2e67154b18db8d
|
453d1aed5e813adfb5225fa12a95822d6ab8c14e |
29-Sep-2010 |
buzbee <buzbee@google.com> |
resolved conflicts for merge of 2e75e47d to master Change-Id: I644b3cd50e3c63b209741c8b818b4c1435ee8218
|
319123c8bbdb2f4eafd0f8c4a3f758e9d3b2e02c |
28-Sep-2010 |
Johnnie Birch <johnnie.l.birch.jr@intel.com> |
Fixed bug in OP_GOTO_32.S, added support for additional parameters to dvmHandleStackOverflow Change-Id: I4d8d75418395661ffc8e7055eeb4600bb5b8b0bc
86-atom/OP_GOTO_32.S
86-atom/footer.S
|
2e75e47d5e19d3096e0947c1a6c826efdc589826 |
28-Sep-2010 |
buzbee <buzbee@google.com> |
am b36ea791: Merge "Change GC card making to use object head, bug fix for volatile sput obj" into gingerbread Merge commit 'b36ea7918612c81cb42ff2021443358a9f109a6d' into gingerbread-plus-aosp * commit 'b36ea7918612c81cb42ff2021443358a9f109a6d': Change GC card making to use object head, bug fix for volatile sput obj
|
d82097f6b409c5cd48568e54eb701604c3cceb18 |
27-Sep-2010 |
buzbee <buzbee@google.com> |
Change GC card making to use object head, bug fix for volatile sput obj This CL changes the way we mark GC card to consistently use the object head (previously, we marked somewhere in the object - often the head, but not always). Also, previously a coding error caused us to skip the card mark for OP_APUT_OBJECT_VOLATILES. Fixed here. Change-Id: I133ef6395c51a0466c9708209b08e79c3083aff2
rmv5te/OP_APUT_OBJECT.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_IPUT_OBJECT.S
rmv5te/OP_IPUT_OBJECT_QUICK.S
rmv5te/OP_SPUT_OBJECT.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86/OP_APUT_OBJECT.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_SPUT_OBJECT.S
|
d3b0a4bf6b2e38e6e9e80e203ca753e941084103 |
27-Sep-2010 |
buzbee <buzbee@google.com> |
Change GC card making to use object head, bug fix for volatile sput obj This CL changes the way we mark GC card to consistently use the object head (previously, we marked somewhere in the object - often the head, but not always). Also, previously a coding error caused us to skip the card mark for OP_APUT_OBJECT_VOLATILES. Fixed here. Change-Id: I53eb333b9bd0b770201af0dc617d9a8f38afa699
rmv5te/OP_APUT_OBJECT.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_IPUT_OBJECT.S
rmv5te/OP_IPUT_OBJECT_QUICK.S
rmv5te/OP_SPUT_OBJECT.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86/OP_APUT_OBJECT.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_SPUT_OBJECT.S
|
b703ba2fbbf626a087903b5ee890989d18fd0c2b |
26-Sep-2010 |
buzbee <buzbee@google.com> |
Fix OP_USHR_LONG in x86 mterp (Issue 3038137) Change https://android-git.corp.google.com/g/#change,67744 introduced bad hand-scheduling in 64-bit unsigned 3-operand right shifts which clobbered the result before storing it. Change-Id: Ic862fa683092d09476510d78e5edd1735f09f8c2
ut/InterpAsm-x86.S
86/OP_USHR_LONG.S
|
ce3de859ef352e91d6cfd368014e4ccfe95595d9 |
23-Sep-2010 |
Ben Cheng <bccheng@android.com> |
am 4934b377: Several fixes for JIT and self-verification under corner cases. Merge commit '4934b377d9cf5df6f80da7caab4f2178c6cec307' into gingerbread-plus-aosp * commit '4934b377d9cf5df6f80da7caab4f2178c6cec307': Several fixes for JIT and self-verification under corner cases.
|
4934b377d9cf5df6f80da7caab4f2178c6cec307 |
21-Sep-2010 |
Ben Cheng <bccheng@android.com> |
Several fixes for JIT and self-verification under corner cases. 1) Fix the self-verification mode to handle backward chaining cell properly when a single-step instruction is in the middle of the cyclic portion of the trace. Then found issue 2 when changing the JIT threshold to 1. 2) When the code cache is full, the VM may stop making forward progress and bounces back and forth between the debug and fast intepreters as the translation request is constantly rejected. The fix is to stay in the debug interpreter until the corner case condition is cleared. Then found issue 3. 3) Under self-verification mode, the code cache reset request may get delayed indefinitely due to spurious indication that a thread is running JIT'ed code. Trivial fix - make sure the inJitCodeCache flag is cleared. (cherry-picked from dalvik-dev) Change-Id: Ic0b9952c0ae545f68f7eb2ae06a82a634ab62e9e
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
c11e0e14df2c0c4264e5cc6c3e96d14832cbecad |
22-Sep-2010 |
buzbee <buzbee@google.com> |
Fix x86 mterp "longjmp" The recent x86 mterp update failed to properly restore callee save registers when returning from the call to dvmMterpStdRun. Change-Id: Ied73cc5fb380a6375d1f71ce679003fbc293d08d
ut/InterpAsm-x86.S
86/entry.S
|
4abedd83f88c84fae2a92b15c96709801203e9a8 |
22-Sep-2010 |
Ben Cheng <bccheng@android.com> |
Merge "Several fixes for JIT and self-verification under corner cases." into dalvik-dev
|
3b8a9072510222067b7c48fe2d59d1e58436be24 |
21-Sep-2010 |
buzbee <buzbee@google.com> |
Fix 64-bit 3-operand multiplication in x86 mterp. rPC was being unspilled a bit late. Change-Id: Idf73b9eeeb972f3fb1861224397d0592c6d3bb2f
ut/InterpAsm-x86.S
86/OP_MUL_LONG.S
|
1a7b9d7703297358d6b2276dff02eaff6586a6fd |
21-Sep-2010 |
Ben Cheng <bccheng@android.com> |
Several fixes for JIT and self-verification under corner cases. 1) Fix the self-verification mode to handle backward chaining cell properly when a single-step instruction is in the middle of the cyclic portion of the trace. Then found issue 2 when changing the JIT threshold to 1. 2) When the code cache is full, the VM may stop making forward progress and bounces back and forth between the debug and fast intepreters as the translation request is constantly rejected. The fix is to stay in the debug interpreter until the corner case condition is cleared. Then found issue 3. 3) Under self-verification mode, the code cache reset request may get delayed indefinitely due to spurious indication that a thread is running JIT'ed code. Trivial fix - make sure the inJitCodeCache flag is cleared. Change-Id: I107eb23102940df07c27c7f2b5cc22e30fbdcd1c
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
f3e177289ac078f18401cfd8eebafe584dd0d01f |
12-Sep-2010 |
buzbee <buzbee@google.com> |
x86 mterp: reduce x86/x86-atom differences To ease future x86 development, elminate unnecessary differences between x86 and x86-atom targets. 1. Macros instead of defines (cosmetic change) 2. Register naming convention (cosmetic change) 3. Register usage convention - Drop rIBASE, freeing %edx for general usage - use %edi for rPC (callee-save) & eliminate spills 4. Spill & temp frame layout 5. rGLUE usage 0(%ebp) instead of -24(%ebp) 6. Jump table transition between instruction interpretations instead of computed goto. 7. Change entry convention for instruction handlers: Previously: %bl contains 8-bit Dalvik opcode %bh contains 2nd half of 16-bit Dalvik insn (usually AA or BA) upper 16 bits of %ebx are zero Now: %bl contains 2nd half of 16-bit Dalvik insn (usually AA or BA) upper 24 bits of %ebx are zero 8. Include copies of x86-atom macros and defines into x86 build. This allows the x86 build to mix-and-match x86 and x86-atom handlers via the normal config mechanism. [Note - only for non-control-flow instructions. There are still some conflicts in the footer.S main loop re-entry points]. Change-Id: Ib9d549b56f7ffd7420f9dbf97b2169f65603ee83
ut/InterpAsm-x86.S
86/OP_ADD_LONG.S
86/OP_ADD_LONG_2ADDR.S
86/OP_AGET.S
86/OP_AGET_WIDE.S
86/OP_AND_LONG.S
86/OP_AND_LONG_2ADDR.S
86/OP_APUT.S
86/OP_APUT_OBJECT.S
86/OP_APUT_WIDE.S
86/OP_ARRAY_LENGTH.S
86/OP_CHECK_CAST.S
86/OP_CMPG_DOUBLE.S
86/OP_CMP_LONG.S
86/OP_CONST.S
86/OP_CONST_16.S
86/OP_CONST_4.S
86/OP_CONST_CLASS.S
86/OP_CONST_HIGH16.S
86/OP_CONST_STRING.S
86/OP_CONST_STRING_JUMBO.S
86/OP_CONST_WIDE.S
86/OP_CONST_WIDE_16.S
86/OP_CONST_WIDE_32.S
86/OP_CONST_WIDE_HIGH16.S
86/OP_DIV_LONG.S
86/OP_DIV_LONG_2ADDR.S
86/OP_EXECUTE_INLINE.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_FILL_ARRAY_DATA.S
86/OP_GOTO.S
86/OP_GOTO_16.S
86/OP_GOTO_32.S
86/OP_IGET.S
86/OP_IGET_QUICK.S
86/OP_IGET_WIDE.S
86/OP_IGET_WIDE_QUICK.S
86/OP_INSTANCE_OF.S
86/OP_INT_TO_LONG.S
86/OP_INVOKE_DIRECT.S
86/OP_INVOKE_DIRECT_EMPTY.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_QUICK.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_QUICK.S
86/OP_IPUT.S
86/OP_IPUT_BOOLEAN.S
86/OP_IPUT_BYTE.S
86/OP_IPUT_CHAR.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_IPUT_QUICK.S
86/OP_IPUT_SHORT.S
86/OP_IPUT_WIDE.S
86/OP_IPUT_WIDE_QUICK.S
86/OP_MONITOR_ENTER.S
86/OP_MONITOR_EXIT.S
86/OP_MOVE.S
86/OP_MOVE_16.S
86/OP_MOVE_EXCEPTION.S
86/OP_MOVE_FROM16.S
86/OP_MOVE_RESULT.S
86/OP_MOVE_RESULT_WIDE.S
86/OP_MOVE_WIDE.S
86/OP_MOVE_WIDE_16.S
86/OP_MOVE_WIDE_FROM16.S
86/OP_MUL_INT.S
86/OP_MUL_INT_2ADDR.S
86/OP_MUL_INT_LIT16.S
86/OP_MUL_INT_LIT8.S
86/OP_MUL_LONG.S
86/OP_MUL_LONG_2ADDR.S
86/OP_NEG_LONG.S
86/OP_NEW_ARRAY.S
86/OP_NEW_INSTANCE.S
86/OP_NOP.S
86/OP_NOT_LONG.S
86/OP_OR_LONG.S
86/OP_OR_LONG_2ADDR.S
86/OP_PACKED_SWITCH.S
86/OP_REM_DOUBLE.S
86/OP_REM_DOUBLE_2ADDR.S
86/OP_REM_FLOAT.S
86/OP_REM_FLOAT_2ADDR.S
86/OP_RETURN.S
86/OP_RETURN_WIDE.S
86/OP_SGET.S
86/OP_SGET_WIDE.S
86/OP_SHL_LONG.S
86/OP_SHL_LONG_2ADDR.S
86/OP_SHR_LONG.S
86/OP_SHR_LONG_2ADDR.S
86/OP_SPUT.S
86/OP_SPUT_OBJECT.S
86/OP_SPUT_WIDE.S
86/OP_SUB_LONG.S
86/OP_SUB_LONG_2ADDR.S
86/OP_THROW.S
86/OP_THROW_VERIFICATION_ERROR.S
86/OP_USHR_LONG.S
86/OP_USHR_LONG_2ADDR.S
86/OP_XOR_LONG.S
86/OP_XOR_LONG_2ADDR.S
86/bincmp.S
86/bindiv.S
86/bindiv2addr.S
86/bindivLit16.S
86/bindivLit8.S
86/binflop.S
86/binflop2addr.S
86/binop.S
86/binop1.S
86/binop2addr.S
86/binopLit16.S
86/binopLit8.S
86/binopWide.S
86/binopWide2addr.S
86/cvtfp_int.S
86/entry.S
86/footer.S
86/fpcvt.S
86/header.S
86/shop2addr.S
86/stub.S
86/unop.S
86/unopWide.S
86/zcmp.S
|
7520ee7ff226e12e06818561b15741d2575072e3 |
18-Sep-2010 |
buzbee <buzbee@google.com> |
Add source code skeletons for x86 work. No actual JIT'ng yet. Change-Id: Ic94a916e777e9bc5163cf205899daf9c18dcafe1
stubs/stubdefs.c
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86/footer.S
|
1df319e3674d993a07bc0ff1f56a5915410b5903 |
15-Sep-2010 |
Andy McFadden <fadden@android.com> |
Use store barrier instead of full barrier. Make use of ANDROID_MEMBAR_STORE when appropriate. In mterp, define a new SMP_DMB_ST macro that will (soon) expand into "dmb st" on ARMv7-A platforms configured for SMP. Bug 3003477. Change-Id: I03c09e93e1374d1c668588c9ad52f5c08d3d2435
rmv4t/platform.S
rmv5te/OP_RETURN_VOID_BARRIER.S
rmv5te/platform.S
rmv7-a/platform.S
/OP_RETURN_VOID_BARRIER.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
291758c5c4902900c6f86794ba8ab9cad9b26197 |
10-Sep-2010 |
Andy McFadden <fadden@android.com> |
Add return-void-barrier instruction. This introduces the return-void-barrier instruction, which is identical to return-void on UP systems, but provides an additional store/store barrier on SMP. This is intended for use in constructors of objects with final fields. The assembler doesn't like "dmb st", and we don't have an ANDROID_MEMBAR_STORE barrier defined, so this currently uses full fences. This just defines the new instruction. It's not actually used yet. Also, removed some stale "unused" files from the x86 and x86-atom directories. Bug 2965743. Change-Id: I072e372fd2d57f2617a8d4fff5fd4b38bdda75d1
rmv5te/OP_RETURN_VOID_BARRIER.S
rmv5te/OP_UNUSED_F1.S
/OP_RETURN_VOID_BARRIER.c
/OP_UNUSED_F1.c
onfig-x86
onfig-x86-atom
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/OP_UNUSED_E3.S
86-atom/OP_UNUSED_E4.S
86-atom/OP_UNUSED_E5.S
86-atom/OP_UNUSED_E6.S
86-atom/OP_UNUSED_E7.S
86-atom/OP_UNUSED_F1.S
86-atom/OP_UNUSED_FC.S
86-atom/OP_UNUSED_FD.S
86-atom/OP_UNUSED_FE.S
86-atom/TODO.txt
86/OP_UNUSED_E3.S
86/OP_UNUSED_E4.S
86/OP_UNUSED_E5.S
86/OP_UNUSED_E6.S
86/OP_UNUSED_E7.S
86/OP_UNUSED_F1.S
86/OP_UNUSED_FC.S
86/OP_UNUSED_FD.S
86/OP_UNUSED_FE.S
|
5cc61d70ec727aa22f58463bf7940cc717cf3eb1 |
31-Aug-2010 |
Ben Cheng <bccheng@android.com> |
Collect method traces with the fast interpreter and the JIT'ed code. Insert inline code instead of switching to the debug interpreter in the hope that the time stamps collected in traceview are more close to the real world behavior with minimal profiling overhead. Because the inline polling still introduces additional overhead (20% ~ 100%), it is only enabled in the special VM build called "libdvm_traceview.so". It won't work on the emulator because it is not implemented to collect the detailed instruction traces. Here are some performance numbers using the FibonacciSlow microbenchmark (ie recursive workloads / the shorter the faster): time: configuration 8,162,602: profiling off/libdvm.so/JIT off 2,801,829: profiling off/libdvm.so/JIT on 9,952,236: profiling off/libdvm_traceview.so/JIT off 4,465,701: profiling off/libdvm_traceview.so/JIT on 164,786,585: profiling on/libdvm.so/JIT off 164,664,634: profiling on/libdvm.so/JIT on 11,231,707: profiling on/libdvm_traceview.so/JIT off 8,427,846: profiling on/libdvm_traceview.so/JIT on Comparing the 8,427,846 vs 164,664,634 numbers againt the true baseline performance number of 2,801,829, the new libdvm_traceview.so improves the time skew from 58x to 3x. Change-Id: I48611a3a4ff9c4950059249e5503c26abd6b138e
terp.c
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
557763e8845b9a81105c8b7380ac24f4869ec5bc |
25-Aug-2010 |
Andy McFadden <fadden@android.com> |
am 3ef3f182: Merge "Change the way thread suspension works." into gingerbread Merge commit '3ef3f182b126be36acc5e1132bfff4857b442213' into gingerbread-plus-aosp * commit '3ef3f182b126be36acc5e1132bfff4857b442213': Change the way thread suspension works.
|
b5f3c0b8222efea953adb94b97a2c70ba58e26e3 |
24-Aug-2010 |
Andy McFadden <fadden@android.com> |
Change the way thread suspension works. There are at least three ways to handle detection of thread suspension correctly: (1) hold a mutex, (2) pile all state into a single 32-bit location and use atomic ops, and (3) order the operations carefully. Of these, #3 has the least overhead on uniprocessors, so we're going with that. It does introduce one quirk, because we're now changing to "running" mode before checking to see if we're allowed to run. This creates a tiny window of opportunity for assertions and thread dumps to see what appears to be a thread that's running when it shouldn't be. This is correctable with additional work (e.g. transitioning through a pre-running state) but probably not worth worrying about. This eliminates the separate self->isSuspended flag in favor of the new THREAD_SUSPENDED thread state. Bug 2667016. (cherry-pick from dalvik-dev) Change-Id: Ibc77ebbb03a7993bc4057c1c375498172ca8ff1c
ommon/asm-constants.h
|
262dc53c73a6f6c61e53901567ef59fb69049b3d |
25-Aug-2010 |
Andy McFadden <fadden@android.com> |
Merge "Change the way thread suspension works." into dalvik-dev
|
6dce996e16e8a7f8d538910221aa29df43eed9ed |
24-Aug-2010 |
Andy McFadden <fadden@android.com> |
Change the way thread suspension works. There are at least three ways to handle detection of thread suspension correctly: (1) hold a mutex, (2) pile all state into a single 32-bit location and use atomic ops, and (3) order the operations carefully. Of these, #3 has the least overhead on uniprocessors, so we're going with that. It does introduce one quirk, because we're now changing to "running" mode before checking to see if we're allowed to run. This creates a tiny window of opportunity for assertions and thread dumps to see what appears to be a thread that's running when it shouldn't be. This is correctable with additional work (e.g. transitioning through a pre-running state) but probably not worth worrying about. This eliminates the separate self->isSuspended flag in favor of the new THREAD_SUSPENDED thread state. Bug 2667016. Change-Id: I05c22ac5307fa3056fab854dfeed7aa1d76542f4
ommon/asm-constants.h
|
ded830f7d936821a4136fc8c08064b43beff9341 |
23-Aug-2010 |
Andy McFadden <fadden@android.com> |
resolved conflicts for merge of aa63a6a6 to gingerbread-plus-aosp Change-Id: Ib2f8c4c71a74987d284eba4be96ff4d329c40a50
|
c6cc1bd99ed071772829a39d44344cf949bf7458 |
02-Aug-2010 |
Johnnie Birch <johnnie.l.birch.jr@intel.com> |
Added new bytecodes for the x86-atom fast interpreter build. Change-Id: Ided25c83d874eb02c78e01a0ea97dbb15ed30497
onfig-x86-atom
ut/InterpAsm-x86-atom.S
ut/InterpC-x86-atom.c
86-atom/OP_BREAKPOINT.S
86-atom/OP_EXECUTE_INLINE.S
86-atom/OP_EXECUTE_INLINE_RANGE.S
86-atom/OP_MONITOR_EXIT.S
86-atom/entry.S
|
0d615c3ce5bf97ae65b9347ee77968f38620d5e8 |
18-Aug-2010 |
Andy McFadden <fadden@android.com> |
Always support debugging and profiling. This eliminates the use of the WITH_DEBUGGER and WITH_PROFILER conditional compilation flags. We've never shipped a device without these features, and it's unlikely we ever will. They're not worth the code clutter they cause. As usual, since I can't test the x86-atom code I left that alone and added an item to the TODO list. Bug 2923442. Change-Id: I335ebd5193bc86f7641513b1b41c0378839be1fe
terp.c
rmv5te/footer.S
/OP_BREAKPOINT.c
/gotoTargets.c
/header.c
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/debug.c
ortable/enddefs.c
ortable/entry.c
86-atom/TODO.txt
86/footer.S
|
f079e1d5c51fc33ab537bbdfc79cbac8e771d7e9 |
05-Aug-2010 |
buzbee <buzbee@google.com> |
Tweaks to x86 mterp periodic checks [issue 2634642] Update the x86 mterp main interpetation loop to match Arm and the portable interpreter by checking for debugger/profiler after suspends. Also, enable ability to skip a load when checking for active debugger (both Arm and x86). Related cl: https://android-git.corp.google.com/g/#change,50229 Change-Id: Ic5d0f102b2250393eaf4405e4cafb7678b1a563e
terp.c
ut/InterpAsm-x86.S
86/footer.S
|
7a2697d327936e20ef5484f7819e2e4bf91c891f |
07-Jun-2010 |
Ben Cheng <bccheng@android.com> |
Implement method inlining for getters/setters Changes include: 1) Force the trace that ends with an invoke instruction to include the next instruction if it is a move-result (because both need to be turned into no-ops if callee is inlined). 2) Interpreter entry point/trace builder changes so that return target won't automatically be considered as trace starting points (to avoid duplicate traces that include the move result instructions). 3) Codegen changes to handle getters/setters invoked from both monomorphic and polymorphic callsites. 4) Extend/fix self-verification to form identical trace regions and handle traces with inlined callees. 5) Apply touchups to the method based parsing - still not in use. Change-Id: I116b934df01bf9ada6d5a25187510e352bccd13c
rmv5te/entry.S
rmv5te/footer.S
/gotoTargets.c
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/entry.c
ortable/portdbg.c
|
de66fcbc1d7fde20bdafb508b769028d8f2ec9bc |
30-Jul-2010 |
Elliott Hughes <enh@google.com> |
Switch -Xjnitrace over to using a custom JNI bridge. This now works without needing to specify -Xint:portable, and no longer needs to be manually enabled at compile-time. If you're using -Xjnitrace, you'll pay to look up the real JNI bridge on every invocation of a native method, but doing so leads to a really simple implementation, and you're writing to the log on every invocation anyway, so -Xjnitrace and performance don't go together anyway. Bug: 2846017 Change-Id: I3108c4f35f27b72e8849c41077ae3e8768550e96
/gotoTargets.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
3d95064ad1d8e6da4f9a523b2c2f11cf1f1ea952 |
16-Jul-2010 |
buzbee <buzbee@google.com> |
x86 interpreter write barrier support Fix for 2837703. Also added support for new Dalvik volatile ops. Change-Id: Ic2b8d31afc8806077c5bf27ec90c643f7e47591e
onfig-x86
ut/InterpAsm-x86.S
ut/InterpC-x86.c
86/OP_APUT_OBJECT.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_IGET_OBJECT_VOLATILE.S
86/OP_IGET_VOLATILE.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_IPUT_OBJECT_VOLATILE.S
86/OP_IPUT_QUICK.S
86/OP_IPUT_VOLATILE.S
86/OP_SGET_OBJECT_VOLATILE.S
86/OP_SGET_VOLATILE.S
86/OP_SPUT.S
86/OP_SPUT_OBJECT.S
86/OP_SPUT_OBJECT_VOLATILE.S
86/OP_SPUT_VOLATILE.S
|
8afa9dfe04354e5b3917e31e3e2772885f507580 |
07-Jul-2010 |
Elliott Hughes <enh@google.com> |
Tracing for developers of native methods. The existing -verbose:jni is mainly useful for VM developers hacking on the JNI implementation; this is intended to replace the ad hoc logging developers of native methods need to write. Use "-Xint:portable -Xjnitrace:ClassNameSubstring" on the command line. To trace all native methods (mainly useful for testing the tracing), use "-Xjnitrace:"; to trace just methods in java.util.regex.Matcher, use "-Xjnitrace:Matcher" or "-Xjnitrace:Ljava/util/regex/Matcher;" or whatever. To trace all the methods in Matcher and Pattern, you have to use something like "-Xjnitrace:java/util/regex/". There's no facility for tracing an individual method or group of methods because I haven't needed such a thing. Here's a basic example: -> Ljava/nio/charset/Charsets;.toUtf8Bytes([CII)[B (0x400474b8, 0, 5) <- Ljava/nio/charset/Charsets;.toUtf8Bytes([CII)[B returned 0x40047548 Here's an example of a non-static native method: -> Lorg/apache/harmony/luni/platform/OSFileSystem;.writeImpl(I[BII)J this=0x40012e78 (1, 0x400476d0, 0, 5) <- Lorg/apache/harmony/luni/platform/OSFileSystem;.writeImpl(I[BII)J returned 5 Here's an interesting example showing another native method being called, and an exception being thrown by a native method: -> Ljava/lang/VMClassLoader;.loadClass(Ljava/lang/String;Z)Ljava/lang/Class; (0x400466b8, false) -> Ljava/lang/Throwable;.nativeFillInStackTrace()Ljava/lang/Object; () <- Ljava/lang/Throwable;.nativeFillInStackTrace()Ljava/lang/Object; returned 0x400467c8 <- Ljava/lang/VMClassLoader;.loadClass(Ljava/lang/String;Z)Ljava/lang/Class; threw Ljava/lang/ClassNotFoundException; (This functionality needs to be enabled at compile time. A later patch will address that.) Change-Id: I6da8930bd4b4f228e07b05cc59a3aea331c5cee1
/gotoTargets.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
919eb063ce4542d3698e10e20aba9a2dfbdd0f82 |
12-Jul-2010 |
buzbee <buzbee@google.com> |
Interpreter & JIT support for write barriers In this iteration, cards are marked on either the store address or the object head (whichever leads to faster code). In all cases, though, card marks are deferred until after the associated store has completed. Change-Id: I633d6e8c3bebdb80bde92efb4fa6fc7cc84f60fc
terp.c
rmv5te/OP_APUT_OBJECT.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_OBJECT.S
rmv5te/OP_IPUT_OBJECT_QUICK.S
rmv5te/OP_IPUT_OBJECT_VOLATILE.S
rmv5te/OP_IPUT_QUICK.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_OBJECT.S
rmv5te/OP_SPUT_OBJECT_VOLATILE.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
86-atom/TODO.txt
|
364f9d924cbd9d392744a66f80cc084c3d80caf0 |
12-Jun-2010 |
Barry Hayes <bhayes@google.com> |
Put wrappers on all stores of Object pointers into heap Objects. Also: Changed ++ loops to [i] loops where I'm touching. Added some asserts. Added dvmHeapSourceContainsAddress Added dvmIsValidObjectAddress Change-Id: I6586688246064aecabb1e22e1dca276fecee7795
/OP_APUT_OBJECT.c
/gotoTargets.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
0890e5bf0b2a502ca1030e9773fabc16ef1b5981 |
18-Jun-2010 |
Andy McFadden <fadden@android.com> |
Fiddle with SMP_DMB. This changes it from a macro that takes an argument to a simpler macro that is named explicitly by the 8 instructions that want it. Change-Id: Ie17a9722823d590851776b6b9b057eadf22fa6a8
rmv4t/platform.S
rmv5te/OP_IGET.S
rmv5te/OP_IGET_OBJECT_VOLATILE.S
rmv5te/OP_IGET_VOLATILE.S
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_OBJECT_VOLATILE.S
rmv5te/OP_IPUT_VOLATILE.S
rmv5te/OP_SGET.S
rmv5te/OP_SGET_OBJECT_VOLATILE.S
rmv5te/OP_SGET_VOLATILE.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_OBJECT_VOLATILE.S
rmv5te/OP_SPUT_VOLATILE.S
rmv5te/platform.S
rmv7-a/platform.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
c35a2ef53d0cccd6f924eeba36633220ec67c32e |
17-Jun-2010 |
Andy McFadden <fadden@android.com> |
Add opcodes for volatile field accesses This adds instructions for {i,s}{get,put}{,-object}-volatile, for a total of eight new instructions. On SMP systems, these instructions will be substituted in for existing field access instructions, either by dexopt or during just-in-time verification. Unlike the wide-volatile instructions, these will not be used at all when the VM is not built for SMP. (Ideally we'd omit the volatile instruction implementations entirely on non-SMP builds, but that requires a little work in gen-mterp.py.) The change defines and implements the opcodes and support methods, but does not cause them to be used. Also, changed dvmQuasiAtomicRead64's argument to be const. Change-Id: I9e44fe881e87f27aa41f6c6e898ec4402cb5493e
rmv4t/platform.S
rmv5te/OP_IGET.S
rmv5te/OP_IGET_OBJECT_VOLATILE.S
rmv5te/OP_IGET_VOLATILE.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_OBJECT_VOLATILE.S
rmv5te/OP_IPUT_VOLATILE.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_SGET.S
rmv5te/OP_SGET_OBJECT_VOLATILE.S
rmv5te/OP_SGET_VOLATILE.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_OBJECT_VOLATILE.S
rmv5te/OP_SPUT_VOLATILE.S
rmv5te/OP_UNUSED_E3.S
rmv5te/OP_UNUSED_E4.S
rmv5te/OP_UNUSED_E5.S
rmv5te/OP_UNUSED_E6.S
rmv5te/OP_UNUSED_E7.S
rmv5te/OP_UNUSED_FC.S
rmv5te/OP_UNUSED_FD.S
rmv5te/OP_UNUSED_FE.S
rmv5te/header.S
rmv5te/platform.S
rmv7-a/platform.S
/OP_IGET_OBJECT_VOLATILE.c
/OP_IGET_VOLATILE.c
/OP_IPUT_OBJECT_VOLATILE.c
/OP_IPUT_VOLATILE.c
/OP_SGET_OBJECT_VOLATILE.c
/OP_SGET_VOLATILE.c
/OP_SPUT_OBJECT_VOLATILE.c
/OP_SPUT_VOLATILE.c
/OP_UNUSED_E3.c
/OP_UNUSED_E4.c
/OP_UNUSED_E5.c
/OP_UNUSED_E6.c
/OP_UNUSED_E7.c
/OP_UNUSED_FC.c
/OP_UNUSED_FD.c
/OP_UNUSED_FE.c
onfig-armv7-a
onfig-armv7-a-neon
onfig-x86
onfig-x86-atom
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/TODO.txt
|
6e10b9aaa72425a4825a25f0043533d0c6fdbba4 |
15-Jun-2010 |
Andy McFadden <fadden@android.com> |
Atomic op cleanup. Replaced VM-local macros for barrier and CAS calls with the actual versions provided by cutils. ATOMIC_CMP_SWAP(addr,old,new) --> android_atomic_release_cas(old,new,addr) MEM_BARRIER --> ANDROID_MEMBAR_FULL Renamed android_quasiatomic* to dvmQuasiAtomic*. Didn't change how anything works, just the names. Change-Id: I8c68f28e1f7c9cb832183e0918d097dfe6a2cac8
rmv4t/OP_IGET_WIDE.S
rmv4t/OP_IPUT_WIDE.S
rmv4t/OP_SGET_WIDE.S
rmv4t/OP_SPUT_WIDE.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SPUT_WIDE.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
d4f78d3a764e6aa8f7174c78f537c016dac7f7ec |
08-Jun-2010 |
Barry Hayes <bhayes@google.com> |
ALLOC_NO_GC is no longer used; remove it, and the nonCollectableRefs table. Clean up dvmHeapInitHeapRefTable's interface to know the default size. Change-Id: I535fdfe39924f6f65f286e2809002c2a0e6411b6
ommon/asm-constants.h
|
7365493ad8d360c1dcf9cd8b6eee62747af01cae |
09-Jun-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove repeated newlines at the end of files. Change-Id: I1e3d103a7b932ef21acedb6438c0f26b315df28f
akefile-mterp
OTES.txt
EADME.txt
rm-vfp/OP_CMPG_DOUBLE.S
rm-vfp/OP_CMPG_FLOAT.S
rm-vfp/OP_CMPL_DOUBLE.S
rm-vfp/OP_CMPL_FLOAT.S
rmv4t/OP_AGET_WIDE.S
rmv4t/OP_APUT_WIDE.S
rmv4t/OP_IGET_WIDE.S
rmv4t/OP_IGET_WIDE_QUICK.S
rmv4t/OP_IPUT_WIDE.S
rmv4t/OP_IPUT_WIDE_QUICK.S
rmv4t/OP_SGET_WIDE.S
rmv4t/OP_SPUT_WIDE.S
rmv4t/platform.S
rmv5te/OP_AGET.S
rmv5te/OP_AGET_WIDE.S
rmv5te/OP_APUT.S
rmv5te/OP_APUT_OBJECT.S
rmv5te/OP_APUT_WIDE.S
rmv5te/OP_ARRAY_LENGTH.S
rmv5te/OP_CHECK_CAST.S
rmv5te/OP_CMPL_DOUBLE.S
rmv5te/OP_CMPL_FLOAT.S
rmv5te/OP_CMP_LONG.S
rmv5te/OP_CONST.S
rmv5te/OP_CONST_16.S
rmv5te/OP_CONST_4.S
rmv5te/OP_CONST_CLASS.S
rmv5te/OP_CONST_HIGH16.S
rmv5te/OP_CONST_STRING.S
rmv5te/OP_CONST_STRING_JUMBO.S
rmv5te/OP_CONST_WIDE.S
rmv5te/OP_CONST_WIDE_16.S
rmv5te/OP_CONST_WIDE_32.S
rmv5te/OP_CONST_WIDE_HIGH16.S
rmv5te/OP_DOUBLE_TO_INT.S
rmv5te/OP_DOUBLE_TO_LONG.S
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_EXECUTE_INLINE_RANGE.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_FLOAT_TO_INT.S
rmv5te/OP_FLOAT_TO_LONG.S
rmv5te/OP_GOTO_16.S
rmv5te/OP_IGET.S
rmv5te/OP_IGET_QUICK.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IGET_WIDE_QUICK.S
rmv5te/OP_INSTANCE_OF.S
rmv5te/OP_INVOKE_DIRECT.S
rmv5te/OP_INVOKE_INTERFACE.S
rmv5te/OP_INVOKE_STATIC.S
rmv5te/OP_INVOKE_SUPER.S
rmv5te/OP_INVOKE_SUPER_QUICK.S
rmv5te/OP_INVOKE_VIRTUAL.S
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_QUICK.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_IPUT_WIDE_QUICK.S
rmv5te/OP_MONITOR_ENTER.S
rmv5te/OP_MONITOR_EXIT.S
rmv5te/OP_MOVE.S
rmv5te/OP_MOVE_16.S
rmv5te/OP_MOVE_EXCEPTION.S
rmv5te/OP_MOVE_FROM16.S
rmv5te/OP_MOVE_RESULT.S
rmv5te/OP_MOVE_RESULT_WIDE.S
rmv5te/OP_MOVE_WIDE.S
rmv5te/OP_MOVE_WIDE_16.S
rmv5te/OP_MOVE_WIDE_FROM16.S
rmv5te/OP_MUL_LONG.S
rmv5te/OP_MUL_LONG_2ADDR.S
rmv5te/OP_NEW_ARRAY.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_NOP.S
rmv5te/OP_PACKED_SWITCH.S
rmv5te/OP_RETURN.S
rmv5te/OP_RETURN_VOID.S
rmv5te/OP_RETURN_WIDE.S
rmv5te/OP_SGET.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SHL_LONG.S
rmv5te/OP_SHL_LONG_2ADDR.S
rmv5te/OP_SHR_LONG.S
rmv5te/OP_SHR_LONG_2ADDR.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_THROW.S
rmv5te/OP_THROW_VERIFICATION_ERROR.S
rmv5te/OP_USHR_LONG.S
rmv5te/OP_USHR_LONG_2ADDR.S
rmv5te/bincmp.S
rmv5te/binop.S
rmv5te/binop2addr.S
rmv5te/binopLit16.S
rmv5te/binopLit8.S
rmv5te/binopWide.S
rmv5te/binopWide2addr.S
rmv5te/entry.S
rmv5te/footer.S
rmv5te/platform.S
rmv5te/stub.S
rmv5te/unopWide.S
rmv5te/unused.S
rmv5te/zcmp.S
rmv6t2/OP_ARRAY_LENGTH.S
rmv6t2/OP_CONST_4.S
rmv6t2/OP_DOUBLE_TO_INT.S
rmv6t2/OP_DOUBLE_TO_LONG.S
rmv6t2/OP_FLOAT_TO_INT.S
rmv6t2/OP_FLOAT_TO_LONG.S
rmv6t2/OP_IGET.S
rmv6t2/OP_IGET_QUICK.S
rmv6t2/OP_IGET_WIDE.S
rmv6t2/OP_IGET_WIDE_QUICK.S
rmv6t2/OP_IPUT.S
rmv6t2/OP_IPUT_QUICK.S
rmv6t2/OP_IPUT_WIDE.S
rmv6t2/OP_IPUT_WIDE_QUICK.S
rmv6t2/OP_MOVE.S
rmv6t2/OP_MOVE_WIDE.S
rmv6t2/OP_MUL_LONG_2ADDR.S
rmv6t2/OP_SHL_LONG_2ADDR.S
rmv6t2/OP_SHR_LONG_2ADDR.S
rmv6t2/OP_USHR_LONG_2ADDR.S
rmv6t2/bincmp.S
rmv6t2/binop2addr.S
rmv6t2/binopLit16.S
rmv6t2/binopWide2addr.S
rmv6t2/unopWide.S
/OP_NEW_ARRAY.c
onfig-allstubs
onfig-armv4t
onfig-armv5te
onfig-armv5te-vfp
onfig-armv7-a
onfig-armv7-a-neon
onfig-portdbg
onfig-portstd
onfig-x86
onfig-x86-atom
stubs/entry.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/debug.c
ortable/enddefs.c
86-atom/OP_AND_INT.S
86-atom/OP_CMP_LONG.S
86-atom/OP_DIV_DOUBLE.S
86-atom/OP_DIV_DOUBLE_2ADDR.S
86-atom/OP_DIV_INT.S
86-atom/OP_DIV_INT_2ADDR.S
86-atom/OP_DOUBLE_TO_INT.S
86-atom/OP_DOUBLE_TO_LONG.S
86-atom/OP_FLOAT_TO_LONG.S
86-atom/OP_GOTO.S
86-atom/OP_GOTO_32.S
86-atom/OP_IGET_WIDE.S
86-atom/OP_IGET_WIDE_QUICK.S
86-atom/OP_INT_TO_FLOAT.S
86-atom/OP_INT_TO_SHORT.S
86-atom/OP_INVOKE_STATIC.S
86-atom/OP_INVOKE_SUPER.S
86-atom/OP_INVOKE_SUPER_QUICK.S
86-atom/OP_INVOKE_VIRTUAL.S
86-atom/OP_INVOKE_VIRTUAL_QUICK.S
86-atom/OP_IPUT.S
86-atom/OP_IPUT_OBJECT.S
86-atom/OP_IPUT_QUICK.S
86-atom/OP_IPUT_WIDE.S
86-atom/OP_IPUT_WIDE_QUICK.S
86-atom/OP_LONG_TO_DOUBLE.S
86-atom/OP_MONITOR_ENTER.S
86-atom/OP_MONITOR_EXIT.S
86-atom/OP_MOVE_EXCEPTION.S
86-atom/OP_MOVE_WIDE_FROM16.S
86-atom/OP_MUL_LONG.S
86-atom/OP_MUL_LONG_2ADDR.S
86-atom/OP_NEG_DOUBLE.S
86-atom/OP_NEG_LONG.S
86-atom/OP_NEW_ARRAY.S
86-atom/OP_NOP.S
86-atom/OP_PACKED_SWITCH.S
86-atom/OP_REM_DOUBLE.S
86-atom/OP_REM_DOUBLE_2ADDR.S
86-atom/OP_REM_FLOAT.S
86-atom/OP_REM_FLOAT_2ADDR.S
86-atom/OP_REM_INT_2ADDR.S
86-atom/OP_RETURN.S
86-atom/OP_RETURN_COMMON.S
86-atom/OP_RETURN_VOID.S
86-atom/OP_RSUB_INT_LIT8.S
86-atom/OP_SGET_BOOLEAN.S
86-atom/OP_SGET_OBJECT.S
86-atom/OP_SHL_LONG_2ADDR.S
86-atom/OP_SHR_LONG.S
86-atom/OP_SHR_LONG_2ADDR.S
86-atom/OP_SUB_INT.S
86-atom/OP_THROW.S
86-atom/OP_USHR_LONG.S
86-atom/OP_USHR_LONG_2ADDR.S
86-atom/TODO.txt
86-atom/binop.S
86-atom/binop2addr.S
86-atom/binopD2addr.S
86-atom/binopDLit16.S
86-atom/unopWide.S
86-atom/unused.S
86/OP_AGET.S
86/OP_AGET_WIDE.S
86/OP_APUT.S
86/OP_APUT_OBJECT.S
86/OP_APUT_WIDE.S
86/OP_CONST_4.S
86/OP_CONST_CLASS.S
86/OP_CONST_STRING.S
86/OP_CONST_STRING_JUMBO.S
86/OP_CONST_WIDE.S
86/OP_CONST_WIDE_HIGH16.S
86/OP_DIV_LONG.S
86/OP_DIV_LONG_2ADDR.S
86/OP_EXECUTE_INLINE.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_IGET.S
86/OP_IGET_WIDE.S
86/OP_INSTANCE_OF.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_SUPER_QUICK.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_QUICK.S
86/OP_MOVE_FROM16.S
86/OP_MUL_INT_LIT8.S
86/OP_MUL_LONG.S
86/OP_MUL_LONG_2ADDR.S
86/OP_NEW_ARRAY.S
86/OP_NEW_INSTANCE.S
86/OP_OR_INT_LIT16.S
86/OP_OR_INT_LIT8.S
86/OP_RETURN_VOID.S
86/OP_SGET.S
86/OP_SGET_WIDE.S
86/OP_SPUT.S
86/OP_SPUT_WIDE.S
86/OP_THROW_VERIFICATION_ERROR.S
86/binflop.S
86/binop.S
86/footer.S
86/header.S
86/shop2addr.S
86/zcmp.S
|
de75089fb7216d19e9c22cce4dc62a49513477d3 |
09-Jun-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove trailing whitespace. Change-Id: I95534bb2b88eaf48f2329282041118cd034c812b
rmv5te/OP_INVOKE_INTERFACE.S
/OP_FILL_ARRAY_DATA.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/debug.c
86-atom/OP_THROW_VERIFICATION_ERROR.S
|
56bd9c962ebc2194262fa382b194be5125a3ad96 |
05-Jun-2010 |
The Android Open Source Project <initial-contribution@android.com> |
am 7c13ed2a: am 1dd067d9: am 54709cb2: am bf11852a: merge from open-source master Merge commit '7c13ed2afba1abe63f39b0f563978e04e849ae00' into dalvik-dev * commit '7c13ed2afba1abe63f39b0f563978e04e849ae00': Fix for use of UNPREDICTABLE register combination
|
7c13ed2afba1abe63f39b0f563978e04e849ae00 |
04-Jun-2010 |
The Android Open Source Project <initial-contribution@android.com> |
am 1dd067d9: am 54709cb2: am bf11852a: merge from open-source master
|
bf11852aa3b56f1f77841dd0dbb3cc984711d674 |
04-Jun-2010 |
The Android Open Source Project <initial-contribution@android.com> |
merge from open-source master Change-Id: Ic827f3b9a61ba4bfe72606950b6b34a5caf9d9bd
|
b48a4d53bc3349b5c99f8b87a396e7374e2d335c |
02-Jun-2010 |
Dave Butcher <david.butcher@arm.com> |
Fix for use of UNPREDICTABLE register combination Use of the LDRD instruction form LDRD Rt, Rt2, [Rn, Rm] has restrictions on the register combinations - specifically if Rt or Rt2 is equal to Rn or Rm the behaviour is defined as 'UNPREDICTABLE'. Change-Id: I19834783865e07897cc7012367e698447f023ce6
rmv5te/OP_IGET_WIDE_QUICK.S
rmv6t2/OP_IGET_WIDE_QUICK.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
8ba2708ea118381f2df5ca55b9bad2ae4c050504 |
21-May-2010 |
Andy McFadden <fadden@android.com> |
Added EXPORT_PC to "throw" instruction. For bug 2700761. Change-Id: I889e59ea35d9cadd99fc884e5b1301a4cf103f93
rmv5te/OP_THROW.S
/OP_THROW.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86-atom/TODO.txt
86/OP_THROW.S
|
fbdcfb9ea9e2a78f295834424c3f24986ea45dac |
29-May-2010 |
Brian Carlstrom <bdc@google.com> |
Merge remote branch 'goog/dalvik-dev' into dalvik-dev-to-master Change-Id: I0c0edb3ebf0d5e040d6bbbf60269fab0deb70ef9
terp.c
rmv4t/OP_IGET_WIDE.S
rmv4t/OP_IGET_WIDE_VOLATILE.S
rmv4t/OP_IPUT_WIDE.S
rmv4t/OP_IPUT_WIDE_VOLATILE.S
rmv4t/OP_SGET_WIDE.S
rmv4t/OP_SGET_WIDE_VOLATILE.S
rmv4t/OP_SPUT_WIDE.S
rmv4t/OP_SPUT_WIDE_VOLATILE.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IGET_WIDE_VOLATILE.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_IPUT_WIDE_VOLATILE.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SGET_WIDE_VOLATILE.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_SPUT_WIDE_VOLATILE.S
rmv5te/OP_UNUSED_E8.S
rmv5te/OP_UNUSED_E9.S
rmv5te/OP_UNUSED_EA.S
rmv5te/OP_UNUSED_EB.S
rmv5te/debug.c
rmv5te/footer.S
/OP_IGET_WIDE_VOLATILE.c
/OP_IPUT_WIDE_VOLATILE.c
/OP_NEW_INSTANCE.c
/OP_SGET_WIDE_VOLATILE.c
/OP_SPUT_WIDE_VOLATILE.c
/OP_UNUSED_E8.c
/OP_UNUSED_E9.c
/OP_UNUSED_EA.c
/OP_UNUSED_EB.c
/gotoTargets.c
/opcommon.c
ommon/asm-constants.h
onfig-armv4t
onfig-x86
onfig-x86-atom
stubs/stubdefs.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/debug.c
ortable/entry.c
86-atom/OP_THROW_VERIFICATION_ERROR.S
86-atom/OP_UNUSED_E8.S
86-atom/OP_UNUSED_E9.S
86-atom/OP_UNUSED_EA.S
86-atom/OP_UNUSED_EB.S
86-atom/TODO.txt
86-atom/entry.S
86/OP_UNUSED_E8.S
86/OP_UNUSED_E9.S
86/OP_UNUSED_EA.S
86/OP_UNUSED_EB.S
86/footer.S
|
fc075c2d1ae63c26f96e0c6eeb72efc898dbebbf |
29-May-2010 |
Ben Cheng <bccheng@android.com> |
Clean up warnings detected by gcc. Also re-enabled the JIT for the ARMv5te target. Change-Id: I89fd229205e30e6ee92a4933290a7d8dca001232
/gotoTargets.c
stubs/stubdefs.c
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
ortable/entry.c
ortable/portdbg.c
ortable/portstd.c
ortable/stubdefs.c
|
b88ec3cbb419b5eac23508dc6b73de2620d7521a |
17-May-2010 |
Ben Cheng <bccheng@android.com> |
Remove the write permission for the JIT code cache when not needed To support the feature, redesigned the predicted chaining mechanism so that the profile count is shared globally in InterpState. Bug: 2690371 Change-Id: Ifed427e8b1fa4f6c670f19e0761e45e2d4afdbb6
ommon/asm-constants.h
|
b31b30131bbf58280a515c40027aa958b81b5cd6 |
26-May-2010 |
Carl Shapiro <cshapiro@google.com> |
Eliminate more unused variables and compiler warnings. This change also introduces wrappers for condition variable operations similar to what we have already for mutex operations. Almost all the remaining warnings are now in the compiler or non-debug uses of the CHECK_JIT macro. Change-Id: I9f492f1582a06065e3a52287c7834adddfbefff9
terp.c
rmv5te/debug.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
|
e3c01dac83e6eea7f82fe81ed89cfbdd9791dbc9 |
21-May-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove unused labels, variables, and functions. Enable warnings. Change-Id: Icbe24eaf1ad499f28b68b6a5f05368271a0a7e86
ut/InterpC-portdbg.c
ortable/debug.c
|
bd0472480c6e876198fe19c4ffa22350c0ce57da |
13-May-2010 |
Bill Buzbee <buzbee@google.com> |
JIT: Fix for [Issue 2675245] FRF40 monkey crash in jit-cache The JIT's chaining mechanism suffered from a narrow window that could result in i-cache inconsistency. One of the forms of chaining cell consisted of a two 16-bit thumb instruction sequence. If a thread were interrupted between the execution of those two instructions *and* another thread picked that moment to convert that cell's chained/unchained state, then bad things happen. This CL alters the chain/unchain model somewhat to avoid this case. Chainable chaining cells grow by 4 bytes each, and instead of rewriting a 32-bit cell to chain/unchain, we switch between chained and unchained state by [re]writing the first 16-bits of the cell as either a 16-bit Thumb unconditional branch (unchained mode) or the first half of a 32-bit Thumb branch. The 2nd 16-bits of the cell will never change once the cell moves from its inital state - thus avoiding the possibility of it becoming inconsistent. This adds a trivial execution penalty on the slow path, but will add about a kByte of memory usage to a typical process. Change-Id: Id8b99802e11386cfbab23da6abae10e2d9fc4065
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
978738d2cbf9d08fa78c65762eaac3351ab76b9a |
13-May-2010 |
Ben Cheng <bccheng@android.com> |
Add counters to track JIT inline cache hit rate and code cache patch counts. Also did some WITH_JIT_TUNING cleanup. Change-Id: I8bb2d681a06b0f2af1f976a007326825a88cea38
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
cbbd0bedb75b75b99c1112e1f433386a14661b0b |
11-May-2010 |
Ben Cheng <bccheng@android.com> |
Add the dummy CHECK_JIT and ABORT_JIT_TSELECT macros even when JIT is off. Change-Id: I5d9886dcb8359dd4336d83b2a2bddad383f5cc36
stubs/stubdefs.c
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
dd6e87095071e4e987910732062545f7303023e5 |
07-May-2010 |
Ben Cheng <bccheng@android.com> |
Abandon a JIT trace if it contains static fields that are not fully initialized Also turn some asserts into aborts to capture future contract changes between the VM and the JIT. Bug: 2655384 Change-Id: I8bb0226c7ae26fedf6b4ad25a1cd1aa7013b60d4
/OP_NEW_INSTANCE.c
/gotoTargets.c
/opcommon.c
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a-neon.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
|
c95e0fbce4f77b2b08eb48205e405793de0d4248 |
29-Apr-2010 |
Andy McFadden <fadden@android.com> |
Rework common_periodicChecks. The function was rewritten to optimize the common path. The control flow now matches the C version, which tests for debugger/profiler even if the previous test for suspension came up true. This also adds a minor optimization on the test for debugger attachment, allowing us to skip a load from memory if the process is simply not debuggable. (The optimization isn't yet enabled because a similar change must be made to the x86 asm code.) The VM apparently hadn't been built without debugging/profiling support for a while, so this fixes those places (necessary to be able to test all forms of the new code). Bug 2634642. Change-Id: I096b58c961bb73ee0d128ba776d68dbf29bba924
terp.c
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/entry.c
86-atom/TODO.txt
86/footer.S
|
7a44e4ee0782d24b4c6090be1f0a3c66f971f2c1 |
29-Apr-2010 |
Andy McFadden <fadden@android.com> |
Use unsigned compare for stack overflow. When checking for stack overflow we're using a comparison that is treating the pointers as signed values. If we manage to get a stack straddling 0x80000000, this will not work correctly. Bug 2613607. Change-Id: I5d178db86e93a3bb1e6a417e88d7cb1770d285bb
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
b601ebbd7af1babfb213a977ebbdd29fd9ef54a9 |
03-Apr-2010 |
Ben Cheng <bccheng@android.com> |
am 1071056d: am a497359a: Fix a race condition in JIT state refresh under debugging / misc code cleanup. Merge commit '1071056dace973442293b718bf12e328935126f1' into dalvik-dev * commit '1071056dace973442293b718bf12e328935126f1': Fix a race condition in JIT state refresh under debugging / misc code cleanup.
|
b3921ff9c1282346b053ebbd92bf284d875526d2 |
03-Apr-2010 |
Ben Cheng <bccheng@android.com> |
am d5adae17: Improve JIT self verifier test coverage to follow single-step instructions. Merge commit 'd5adae17d71e86a1a5f3ae7825054e3249fb7879' into dalvik-dev * commit 'd5adae17d71e86a1a5f3ae7825054e3249fb7879': Improve JIT self verifier test coverage to follow single-step instructions.
|
a497359afa1abe4c5780c8799c6fe0edab551c2d |
31-Mar-2010 |
Ben Cheng <bccheng@android.com> |
Fix a race condition in JIT state refresh under debugging / misc code cleanup. Bug: 2561283 Change-Id: I9fd94928f3e661de97098808340ea92b28cafa07
ommon/asm-constants.h
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/entry.c
|
d5adae17d71e86a1a5f3ae7825054e3249fb7879 |
27-Mar-2010 |
Ben Cheng <bccheng@android.com> |
Improve JIT self verifier test coverage to follow single-step instructions. Bug: 2549326 Change-Id: I01412d4aac1379b61c90fe6e59c534b33be93f66
rmv5te/entry.S
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
861b33855aff080278ea5125e4372a2d4bf8aef5 |
06-Mar-2010 |
Andy McFadden <fadden@android.com> |
Make wide-volatile loads and stores atomic. This implements the four wide-volatile instructions added in a previous change, and modifies the verifier to substitute the opcodes into the instruction stream when appropriate. For mterp, the ARM wide get/put instructions now have conditional code that replaces ldrd/strd with a call to the quasiatomic functions. The C version does essentially the same thing. ARMv4T lacks ldrd/stdrd, and uses separate implementations for the wide field accesses, so those were updated as well. x86 will just use stubs. The JIT should punt these to the interpreter. Change-Id: Ife88559ed1a698c3267d43c454896f6b12081c0f Also: - We don't seem to be using the negative widths in the instruction table. Not sure they're useful anymore. - Tabs -> spaces in x86-atom throw-verification-error impl.
rmv4t/OP_IGET_WIDE.S
rmv4t/OP_IGET_WIDE_VOLATILE.S
rmv4t/OP_IPUT_WIDE.S
rmv4t/OP_IPUT_WIDE_VOLATILE.S
rmv4t/OP_SGET_WIDE.S
rmv4t/OP_SGET_WIDE_VOLATILE.S
rmv4t/OP_SPUT_WIDE.S
rmv4t/OP_SPUT_WIDE_VOLATILE.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IGET_WIDE_VOLATILE.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_IPUT_WIDE_VOLATILE.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SGET_WIDE_VOLATILE.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_SPUT_WIDE_VOLATILE.S
/OP_IGET_WIDE_VOLATILE.c
/OP_IPUT_WIDE_VOLATILE.c
/OP_SGET_WIDE_VOLATILE.c
/OP_SPUT_WIDE_VOLATILE.c
onfig-armv4t
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/OP_THROW_VERIFICATION_ERROR.S
|
361c14ec063096d4d3db2cf97f75fbe2979d9a67 |
15-Mar-2010 |
Bill Buzbee <buzbee@google.com> |
am 62145b47: Merge "Jit: Minor cleanup - enum size fix, remove useless code, control consistency." Merge commit '62145b47a29777d29ec0f8883f84f2336f5522df' into dalvik-dev * commit '62145b47a29777d29ec0f8883f84f2336f5522df': Jit: Minor cleanup - enum size fix, remove useless code, control consistency.
|
62145b47a29777d29ec0f8883f84f2336f5522df |
15-Mar-2010 |
Bill Buzbee <buzbee@google.com> |
Merge "Jit: Minor cleanup - enum size fix, remove useless code, control consistency."
|
51ae442fa9ed49e081e58e5127d1805789dbb196 |
13-Mar-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Minor cleanup - enum size fix, remove useless code, control consistency. Change-Id: Id8c16303efd25683ad4b04a85e0d2a059b5ec3be
rmv5te/entry.S
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a-neon.S
ut/InterpAsm-armv7-a.S
|
f8c42f714d7c39a58ac6553670d644cab0005c20 |
14-Mar-2010 |
Ben Cheng <bccheng@android.com> |
am 95cd9ac6: Stay in the dbg interpreter if the entry reason is to deal with exceptions. Merge commit '95cd9ac6c308008b6bd48e6e516c118fce0e6a1f' into dalvik-dev * commit '95cd9ac6c308008b6bd48e6e516c118fce0e6a1f': Stay in the dbg interpreter if the entry reason is to deal with exceptions.
|
95cd9ac6c308008b6bd48e6e516c118fce0e6a1f |
13-Mar-2010 |
Ben Cheng <bccheng@android.com> |
Stay in the dbg interpreter if the entry reason is to deal with exceptions. Bug: 2487514 Change-Id: Id1eb91f347ff772714d9560370b9994f46d3c5cb
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/entry.c
|
e24c9353134b2c2602e151b0ed600f5766b9fd7b |
11-Mar-2010 |
Colin Cross <ccross@android.com> |
am dad7a0ef: Merge "Add armv7-a-neon build target" Merge commit 'dad7a0ef6e5f056f0842f03ff3b8285ef29e6f01' into dalvik-dev * commit 'dad7a0ef6e5f056f0842f03ff3b8285ef29e6f01': Add armv7-a-neon build target
|
fd7e221cce6d3c63fd26599d58e0a35db7f5d1fa |
09-Mar-2010 |
Colin Cross <ccross@android.com> |
Add armv7-a-neon build target Change-Id: I981d55b53f6b3c185fe93384924bdbe18057132c
onfig-armv7-a-neon
ut/InterpAsm-armv7-a-neon.S
ut/InterpC-armv7-a-neon.c
ebuild.sh
|
157f1e38736c61640b6bb3c4570ece14c9215c4e |
06-Mar-2010 |
Ben Cheng <bccheng@android.com> |
am f8069e84: Merge "Collect more JIT stats in the assert build." Merge commit 'f8069e844054d29f320a9ece29fc638a884bbf69' into dalvik-dev * commit 'f8069e844054d29f320a9ece29fc638a884bbf69': Collect more JIT stats in the assert build.
|
86717f79d9b018f4d69cc991075fa36611f234e5 |
06-Mar-2010 |
Ben Cheng <bccheng@android.com> |
Collect more JIT stats in the assert build. New stuff includes breakdown of callsite types (ie monomorphic vs polymorphic vs monoporphic resolved to native), total time spent in JIT'ing, and average JIT time per compilation. Example output: D/dalvikvm( 840): 4042 compilations using 1976 + 329108 bytes D/dalvikvm( 840): Compiler arena uses 10 blocks (8100 bytes each) D/dalvikvm( 840): Compiler work queue length is 0/36 D/dalvikvm( 840): size if 8192, entries used is 4137 D/dalvikvm( 840): JIT: 4137 traces, 8192 slots, 1099 chains, 40 thresh, Non-blocking D/dalvikvm( 840): JIT: Lookups: 1128780 hits, 168564 misses; 179520 normal, 6 punt D/dalvikvm( 840): JIT: noChainExit: 528464 IC miss, 194708 interp callsite, 0 switch overflow D/dalvikvm( 840): JIT: Invoke: 507 mono, 988 poly, 72 native, 1038 return D/dalvikvm( 840): JIT: Total compilation time: 2342 ms D/dalvikvm( 840): JIT: Avg unit compilation time: 579 us D/dalvikvm( 840): JIT: 3357 Translation chains, 97 interp stubs D/dalvikvm( 840): dalvik.vm.jit.op = 0-2,4-5,7-8,a-c,e-16,19-1a,1c-23,26,28-29,2b-2f,31-3d,44-4b,4d-51,60,62-63,68-69,70-72,76-78,7b,81-82,84,87,89,8d-93,95-98,a1,a3,a6,a8-a9,b0-b3,b5-b6,bb-bf,c6-c8,d0,d2-d6,d8,da-e2,ee-f0,f2-fb, D/dalvikvm( 840): Code size stats: 50666/105126 (compiled/total Dalvik), 329108 (native)
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
5387824f19033ed51a945fbc8c2b574998404b3d |
05-Mar-2010 |
Andy McFadden <fadden@android.com> |
Add instructions for volatile wide fields. This adds four new instructions for accessing volatile wide fields (long and double). The JLS requires that such accesses are atomic, but the VM doesn't otherwise make guarantees about the atomicity of reads and writes on 64-bit fields. There are no behavioral changes. This just adds definitions for the new instructions and a couple of tests. The current implementation is just the non-volatile form of the instructions or a C stub, but since we're not generating them it doesn't really matter yet. Also: - bumped Dalvik version to 1.3.0 - added a note to the x86-atom TODO list For bug 1633591.
rmv5te/OP_IGET_WIDE_VOLATILE.S
rmv5te/OP_IPUT_WIDE_VOLATILE.S
rmv5te/OP_SGET_WIDE_VOLATILE.S
rmv5te/OP_SPUT_WIDE_VOLATILE.S
rmv5te/OP_UNUSED_E8.S
rmv5te/OP_UNUSED_E9.S
rmv5te/OP_UNUSED_EA.S
rmv5te/OP_UNUSED_EB.S
/OP_IGET_WIDE_VOLATILE.c
/OP_IPUT_WIDE_VOLATILE.c
/OP_SGET_WIDE_VOLATILE.c
/OP_SPUT_WIDE_VOLATILE.c
/OP_UNUSED_E8.c
/OP_UNUSED_E9.c
/OP_UNUSED_EA.c
/OP_UNUSED_EB.c
onfig-x86
onfig-x86-atom
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86-atom.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86-atom.c
ut/InterpC-x86.c
86-atom/OP_UNUSED_E8.S
86-atom/OP_UNUSED_E9.S
86-atom/OP_UNUSED_EA.S
86-atom/OP_UNUSED_EB.S
86-atom/TODO.txt
86-atom/entry.S
86/OP_UNUSED_E8.S
86/OP_UNUSED_E9.S
86/OP_UNUSED_EA.S
86/OP_UNUSED_EB.S
|
da7e4c5a50b3c01e1314f0df44234411e8610150 |
01-Mar-2010 |
Andy McFadden <fadden@android.com> |
Added an x86-atom "TODO" list. Besides the obvious things (unimplemented opcodes), this points out a couple of changes that were made to the interpreter and require a corresponding change for x86-atom.
86-atom/TODO.txt
|
f109fc4aa8b26984e135cb8321bdde69b64c7878 |
26-Feb-2010 |
Andy McFadden <fadden@android.com> |
Merge "Update a few things in x86-atom."
|
4abe4014d3fa6fcdaff6869ca1d60de15a72d124 |
26-Feb-2010 |
Andy McFadden <fadden@android.com> |
Update a few things in x86-atom. This replaced unuses opcodes EC and EF with C stubs for the breakpoint and execute-inline/range instructions, which were added after the last bunch of stuff we rolled out to eclair open-source. I also rebuilt the "out" dir to pick up the various other changes.
onfig-x86-atom
ut/InterpAsm-x86-atom.S
ut/InterpC-x86-atom.c
86-atom/OP_UNUSED_EC.S
86-atom/OP_UNUSED_EF.S
|
40094c16d9727cc1e047a7d4bddffe04dd566211 |
25-Feb-2010 |
Ben Cheng <bccheng@android.com> |
Tweak the interpreter entries and 2nd level trace filter to capture more traces. Real changes: 1) Add a new entry point from JIT to the interpreter to request hot traces w/o doing chaining. 2) Increase the granularity of the secondary profile filter to match 64-byte chunks using 64 entries. The remaining are just cosmetic changes.
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
59a007be670601e40f036f63904b3f51c91a4d95 |
24-Feb-2010 |
Andy McFadden <fadden@android.com> |
am cf4e8b02: Merge "This is a contribution of x86-atom targeted assembly for the fast byte-code interpreter engine. This is an initial contribution with minimal optimizations that target the Intel ATOM processor. We expect to continuously improve this code. It is expe Merge commit 'cf4e8b02ecfb5ec17a27ed4188dd7a9db14ab7bf' * commit 'cf4e8b02ecfb5ec17a27ed4188dd7a9db14ab7bf': This is a contribution of x86-atom targeted assembly for the fast byte-code interpreter engine. This is an initial contribution with minimal optimizations that target the Intel ATOM processor. We expect to continuously improve this code. It is expected that there will be a discussion on the potential merge of this code and similar efforts (i.e. the mterp/x86 directory first included with cupcake). While this code is intended to target ATOM and not a generic X-86 processor, we were able to show the following improvements over the c-portable interpreter using the simulator build:
|
22d404a75a00cda0b0ebed1034c2808ba060b05f |
07-Apr-2009 |
Johnnie Birch <johnnie.l.birch.jr@intel.com> |
This is a contribution of x86-atom targeted assembly for the fast byte-code interpreter engine. This is an initial contribution with minimal optimizations that target the Intel ATOM processor. We expect to continuously improve this code. It is expected that there will be a discussion on the potential merge of this code and similar efforts (i.e. the mterp/x86 directory first included with cupcake). While this code is intended to target ATOM and not a generic X-86 processor, we were able to show the following improvements over the c-portable interpreter using the simulator build: Build: TARGET_SIMULATOR: true TARGET_BUILD_TYPE: release TARGET_PRODUCT: sim Environment: Intel(R) Core(TM)2 Quad CPU Q9550 @ 2.83GHz PI = Portable Interpreter IA = Fast IA Interpreter Embedded CaffeineMark: (IA-PI)/PI: Average of 70% improvement on overall score SPECjbb2000*: (IA-PI)/PI: Average of 37% improvement on raw score SPECjvm98*: (PI/IA) Speedup: Mtrt: 1.2; Jess: 1.34; Compress: 1.57; Db: 1.46; Jack: 1.28 * SPECjbb2000 - 1 warehouse. Noncompliant - modified to run on Dalvik * SPECjvm98 - Noncompliant - modified to run on Dalivk
akefile-mterp
onfig-x86-atom
en-mterp.py
ut/InterpAsm-x86-atom.S
ut/InterpC-x86-atom.c
ebuild.sh
86-atom/OP_ADD_DOUBLE.S
86-atom/OP_ADD_DOUBLE_2ADDR.S
86-atom/OP_ADD_FLOAT.S
86-atom/OP_ADD_FLOAT_2ADDR.S
86-atom/OP_ADD_INT.S
86-atom/OP_ADD_INT_2ADDR.S
86-atom/OP_ADD_INT_LIT16.S
86-atom/OP_ADD_INT_LIT8.S
86-atom/OP_ADD_LONG.S
86-atom/OP_ADD_LONG_2ADDR.S
86-atom/OP_AGET.S
86-atom/OP_AGET_BOOLEAN.S
86-atom/OP_AGET_BYTE.S
86-atom/OP_AGET_CHAR.S
86-atom/OP_AGET_OBJECT.S
86-atom/OP_AGET_SHORT.S
86-atom/OP_AGET_WIDE.S
86-atom/OP_AND_INT.S
86-atom/OP_AND_INT_2ADDR.S
86-atom/OP_AND_INT_LIT16.S
86-atom/OP_AND_INT_LIT8.S
86-atom/OP_AND_LONG.S
86-atom/OP_AND_LONG_2ADDR.S
86-atom/OP_APUT.S
86-atom/OP_APUT_BOOLEAN.S
86-atom/OP_APUT_BYTE.S
86-atom/OP_APUT_CHAR.S
86-atom/OP_APUT_OBJECT.S
86-atom/OP_APUT_SHORT.S
86-atom/OP_APUT_WIDE.S
86-atom/OP_ARRAY_LENGTH.S
86-atom/OP_CHECK_CAST.S
86-atom/OP_CMPG_DOUBLE.S
86-atom/OP_CMPG_FLOAT.S
86-atom/OP_CMPL_DOUBLE.S
86-atom/OP_CMPL_FLOAT.S
86-atom/OP_CMP_LONG.S
86-atom/OP_CONST.S
86-atom/OP_CONST_16.S
86-atom/OP_CONST_4.S
86-atom/OP_CONST_CLASS.S
86-atom/OP_CONST_HIGH16.S
86-atom/OP_CONST_STRING.S
86-atom/OP_CONST_STRING_JUMBO.S
86-atom/OP_CONST_WIDE.S
86-atom/OP_CONST_WIDE_16.S
86-atom/OP_CONST_WIDE_32.S
86-atom/OP_CONST_WIDE_HIGH16.S
86-atom/OP_DIV_DOUBLE.S
86-atom/OP_DIV_DOUBLE_2ADDR.S
86-atom/OP_DIV_FLOAT.S
86-atom/OP_DIV_FLOAT_2ADDR.S
86-atom/OP_DIV_INT.S
86-atom/OP_DIV_INT_2ADDR.S
86-atom/OP_DIV_INT_LIT16.S
86-atom/OP_DIV_INT_LIT8.S
86-atom/OP_DIV_LONG.S
86-atom/OP_DIV_LONG_2ADDR.S
86-atom/OP_DOUBLE_TO_FLOAT.S
86-atom/OP_DOUBLE_TO_INT.S
86-atom/OP_DOUBLE_TO_LONG.S
86-atom/OP_EXECUTE_INLINE.S
86-atom/OP_FILLED_NEW_ARRAY.S
86-atom/OP_FILLED_NEW_ARRAY_RANGE.S
86-atom/OP_FILL_ARRAY_DATA.S
86-atom/OP_FLOAT_TO_DOUBLE.S
86-atom/OP_FLOAT_TO_INT.S
86-atom/OP_FLOAT_TO_LONG.S
86-atom/OP_GOTO.S
86-atom/OP_GOTO_16.S
86-atom/OP_GOTO_32.S
86-atom/OP_IF_EQ.S
86-atom/OP_IF_EQZ.S
86-atom/OP_IF_GE.S
86-atom/OP_IF_GEZ.S
86-atom/OP_IF_GT.S
86-atom/OP_IF_GTZ.S
86-atom/OP_IF_LE.S
86-atom/OP_IF_LEZ.S
86-atom/OP_IF_LT.S
86-atom/OP_IF_LTZ.S
86-atom/OP_IF_NE.S
86-atom/OP_IF_NEZ.S
86-atom/OP_IGET.S
86-atom/OP_IGET_BOOLEAN.S
86-atom/OP_IGET_BYTE.S
86-atom/OP_IGET_CHAR.S
86-atom/OP_IGET_OBJECT.S
86-atom/OP_IGET_OBJECT_QUICK.S
86-atom/OP_IGET_QUICK.S
86-atom/OP_IGET_SHORT.S
86-atom/OP_IGET_WIDE.S
86-atom/OP_IGET_WIDE_QUICK.S
86-atom/OP_INSTANCE_OF.S
86-atom/OP_INT_TO_BYTE.S
86-atom/OP_INT_TO_CHAR.S
86-atom/OP_INT_TO_DOUBLE.S
86-atom/OP_INT_TO_FLOAT.S
86-atom/OP_INT_TO_LONG.S
86-atom/OP_INT_TO_SHORT.S
86-atom/OP_INVOKE_DIRECT.S
86-atom/OP_INVOKE_DIRECT_EMPTY.S
86-atom/OP_INVOKE_DIRECT_RANGE.S
86-atom/OP_INVOKE_INTERFACE.S
86-atom/OP_INVOKE_INTERFACE_RANGE.S
86-atom/OP_INVOKE_STATIC.S
86-atom/OP_INVOKE_STATIC_RANGE.S
86-atom/OP_INVOKE_SUPER.S
86-atom/OP_INVOKE_SUPER_QUICK.S
86-atom/OP_INVOKE_SUPER_QUICK_RANGE.S
86-atom/OP_INVOKE_SUPER_RANGE.S
86-atom/OP_INVOKE_VIRTUAL.S
86-atom/OP_INVOKE_VIRTUAL_QUICK.S
86-atom/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
86-atom/OP_INVOKE_VIRTUAL_RANGE.S
86-atom/OP_IPUT.S
86-atom/OP_IPUT_BOOLEAN.S
86-atom/OP_IPUT_BYTE.S
86-atom/OP_IPUT_CHAR.S
86-atom/OP_IPUT_OBJECT.S
86-atom/OP_IPUT_OBJECT_QUICK.S
86-atom/OP_IPUT_QUICK.S
86-atom/OP_IPUT_SHORT.S
86-atom/OP_IPUT_WIDE.S
86-atom/OP_IPUT_WIDE_QUICK.S
86-atom/OP_LONG_TO_DOUBLE.S
86-atom/OP_LONG_TO_FLOAT.S
86-atom/OP_LONG_TO_INT.S
86-atom/OP_MONITOR_ENTER.S
86-atom/OP_MONITOR_EXIT.S
86-atom/OP_MOVE.S
86-atom/OP_MOVE_16.S
86-atom/OP_MOVE_EXCEPTION.S
86-atom/OP_MOVE_FROM16.S
86-atom/OP_MOVE_OBJECT.S
86-atom/OP_MOVE_OBJECT_16.S
86-atom/OP_MOVE_OBJECT_FROM16.S
86-atom/OP_MOVE_RESULT.S
86-atom/OP_MOVE_RESULT_OBJECT.S
86-atom/OP_MOVE_RESULT_WIDE.S
86-atom/OP_MOVE_WIDE.S
86-atom/OP_MOVE_WIDE_16.S
86-atom/OP_MOVE_WIDE_FROM16.S
86-atom/OP_MUL_DOUBLE.S
86-atom/OP_MUL_DOUBLE_2ADDR.S
86-atom/OP_MUL_FLOAT.S
86-atom/OP_MUL_FLOAT_2ADDR.S
86-atom/OP_MUL_INT.S
86-atom/OP_MUL_INT_2ADDR.S
86-atom/OP_MUL_INT_LIT16.S
86-atom/OP_MUL_INT_LIT8.S
86-atom/OP_MUL_LONG.S
86-atom/OP_MUL_LONG_2ADDR.S
86-atom/OP_NEG_DOUBLE.S
86-atom/OP_NEG_FLOAT.S
86-atom/OP_NEG_INT.S
86-atom/OP_NEG_LONG.S
86-atom/OP_NEW_ARRAY.S
86-atom/OP_NEW_INSTANCE.S
86-atom/OP_NOP.S
86-atom/OP_NOT_INT.S
86-atom/OP_NOT_LONG.S
86-atom/OP_OR_INT.S
86-atom/OP_OR_INT_2ADDR.S
86-atom/OP_OR_INT_LIT16.S
86-atom/OP_OR_INT_LIT8.S
86-atom/OP_OR_LONG.S
86-atom/OP_OR_LONG_2ADDR.S
86-atom/OP_PACKED_SWITCH.S
86-atom/OP_REM_DOUBLE.S
86-atom/OP_REM_DOUBLE_2ADDR.S
86-atom/OP_REM_FLOAT.S
86-atom/OP_REM_FLOAT_2ADDR.S
86-atom/OP_REM_INT.S
86-atom/OP_REM_INT_2ADDR.S
86-atom/OP_REM_INT_LIT16.S
86-atom/OP_REM_INT_LIT8.S
86-atom/OP_REM_LONG.S
86-atom/OP_REM_LONG_2ADDR.S
86-atom/OP_RETURN.S
86-atom/OP_RETURN_COMMON.S
86-atom/OP_RETURN_OBJECT.S
86-atom/OP_RETURN_VOID.S
86-atom/OP_RETURN_WIDE.S
86-atom/OP_RSUB_INT.S
86-atom/OP_RSUB_INT_LIT8.S
86-atom/OP_SGET.S
86-atom/OP_SGET_BOOLEAN.S
86-atom/OP_SGET_BYTE.S
86-atom/OP_SGET_CHAR.S
86-atom/OP_SGET_OBJECT.S
86-atom/OP_SGET_SHORT.S
86-atom/OP_SGET_WIDE.S
86-atom/OP_SHL_INT.S
86-atom/OP_SHL_INT_2ADDR.S
86-atom/OP_SHL_INT_LIT8.S
86-atom/OP_SHL_LONG.S
86-atom/OP_SHL_LONG_2ADDR.S
86-atom/OP_SHR_INT.S
86-atom/OP_SHR_INT_2ADDR.S
86-atom/OP_SHR_INT_LIT8.S
86-atom/OP_SHR_LONG.S
86-atom/OP_SHR_LONG_2ADDR.S
86-atom/OP_SPARSE_SWITCH.S
86-atom/OP_SPUT.S
86-atom/OP_SPUT_BOOLEAN.S
86-atom/OP_SPUT_BYTE.S
86-atom/OP_SPUT_CHAR.S
86-atom/OP_SPUT_OBJECT.S
86-atom/OP_SPUT_SHORT.S
86-atom/OP_SPUT_WIDE.S
86-atom/OP_SUB_DOUBLE.S
86-atom/OP_SUB_DOUBLE_2ADDR.S
86-atom/OP_SUB_FLOAT.S
86-atom/OP_SUB_FLOAT_2ADDR.S
86-atom/OP_SUB_INT.S
86-atom/OP_SUB_INT_2ADDR.S
86-atom/OP_SUB_INT_LIT8.S
86-atom/OP_SUB_LONG.S
86-atom/OP_SUB_LONG_2ADDR.S
86-atom/OP_THROW.S
86-atom/OP_THROW_VERIFICATION_ERROR.S
86-atom/OP_UNUSED_3E.S
86-atom/OP_UNUSED_3F.S
86-atom/OP_UNUSED_40.S
86-atom/OP_UNUSED_41.S
86-atom/OP_UNUSED_42.S
86-atom/OP_UNUSED_43.S
86-atom/OP_UNUSED_73.S
86-atom/OP_UNUSED_79.S
86-atom/OP_UNUSED_7A.S
86-atom/OP_UNUSED_E3.S
86-atom/OP_UNUSED_E4.S
86-atom/OP_UNUSED_E5.S
86-atom/OP_UNUSED_E6.S
86-atom/OP_UNUSED_E7.S
86-atom/OP_UNUSED_E8.S
86-atom/OP_UNUSED_E9.S
86-atom/OP_UNUSED_EA.S
86-atom/OP_UNUSED_EB.S
86-atom/OP_UNUSED_EC.S
86-atom/OP_UNUSED_EF.S
86-atom/OP_UNUSED_F1.S
86-atom/OP_UNUSED_FC.S
86-atom/OP_UNUSED_FD.S
86-atom/OP_UNUSED_FE.S
86-atom/OP_UNUSED_FF.S
86-atom/OP_USHR_INT.S
86-atom/OP_USHR_INT_2ADDR.S
86-atom/OP_USHR_INT_LIT8.S
86-atom/OP_USHR_LONG.S
86-atom/OP_USHR_LONG_2ADDR.S
86-atom/OP_XOR_INT.S
86-atom/OP_XOR_INT_2ADDR.S
86-atom/OP_XOR_INT_LIT16.S
86-atom/OP_XOR_INT_LIT8.S
86-atom/OP_XOR_LONG.S
86-atom/OP_XOR_LONG_2ADDR.S
86-atom/bincmp.S
86-atom/binop.S
86-atom/binop2addr.S
86-atom/binopD.S
86-atom/binopD2addr.S
86-atom/binopDLit16.S
86-atom/binopDLit8.S
86-atom/binopDivRemLong.S
86-atom/binopDivRemLong2Addr.S
86-atom/binopF.S
86-atom/binopF2addr.S
86-atom/binopLit16.S
86-atom/binopLit8.S
86-atom/binopLit8S.S
86-atom/binopS.S
86-atom/binopS2addr.S
86-atom/binopWide.S
86-atom/binopWide2addr.S
86-atom/entry.S
86-atom/footer.S
86-atom/header.S
86-atom/stub.S
86-atom/unop.S
86-atom/unopWide.S
86-atom/unused.S
86-atom/zcmp.S
|
6bbdd6b005ec5cb567ec9576190a7cd784248c5c |
16-Feb-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Monitor exit, possible fix for Issue 2396073 Two problems with monitor-exit: 1. The Jit code wasn't checking for exception thrown following unlocks of fat locks using dvmUnlockObject(). 2. The mterp interpreter unlock code branched to handle exceptions thrown during dvmUnlockObject() with the wrong dalvik PC (the dPC of the unlock, rather than the instruction following the unlock). Similar issue with the x86 interpreter fixed. Also, deleted armv7-a MONITOR_ENTER template, which turned out to be identical to the armv5te one.
rmv5te/OP_MONITOR_EXIT.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
86/OP_MONITOR_EXIT.S
|
5540f6e420ffab7bb0c39dc508bdc3a2e0d67507 |
08-Feb-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Remove references to interpState from C interpreter Fix for Issue 2157987: Eventual isssue with interpState->jitState in <dalvik/vm/mterp/c/header.c
/gotoTargets.c
/header.c
stubs/stubdefs.c
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/portdbg.c
ortable/portstd.c
|
7b133ef7c84e68c3c4042176d830ea5b52e84139 |
05-Feb-2010 |
Ben Cheng <bccheng@android.com> |
Enable JIT parameters to be initialized in an architecture dependent way. The search for optimial value is still ongoing. The current settings are: v5 v7 JIT profile table 512 2048 JIT code cache 512K 1M JIT threshold 200 40
rmv5te/footer.S
rmv5te/header.S
ommon/jit-config.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
eb695c6f814f6b0bdbba0e837555d3fe5ad23104 |
05-Feb-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Start the Jit when framework signals on first screen draw Cleanup of delayed start - introduce dvmRelativeCondWait in Sync.c. Additionally, support for deadman timer to start Jit when no screen draws happen, and to start immediately when running stand-alone. Fixed bug in assert variant of libdvm - recent MONITOR change had neglected to add a new type of exit to the exit stats.
ommon/asm-constants.h
|
4fbba1f95b3e27bdc5f5572bb0420b5f928aa54e |
03-Feb-2010 |
Andy McFadden <fadden@android.com> |
Fix stack overflow edge case. When a stack overflows, Dalvik allows the stack to expand into a "reserved" area, so that it has enough room to create and initialize the StackOverflowError object. While the stack is expanded we also do the search for an appropriate "catch" block, which may require resolving some exception classes. As it happens, things go badly when the "catch" resolution throws an exception. The VM tries to shrink the stack back down after the second exception is finished, rather than waiting for the initial SOE to finish. Since we still have some additional frames on the stack, we're still occupying the "reserved" area, and the VM aborts when it detects the situation. This changes the stack cleanup to wait until the SOE is being dealt with. For bug 2398031.
rmv5te/footer.S
/gotoTargets.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
|
6999d84e2c55dc4a46a6c311b55bd5811336d9c4 |
27-Jan-2010 |
Ben Cheng <bccheng@android.com> |
Fix performance issues related to chaining and unchaining. 1) Patching requests for predicted chaining cells (used by virtual/interface methods) are now batched in a queue and processed when the VM is paused for GC. 2) When the code cache is full the reset operation is also conducted at the end of GC pauses so this totally eliminates the need for the compiler thread to issue suspend-all requests. This is a very rare event and when happening it takes less than 5ms to finish. 3) Change the initial value of the branch in a predicted chaining cell from 0 (ie lsl r0, r0, #0) to 0xe7fe (ie branch to self) so that initializing a predicted chaining cell doesn't need to suspend all threads. Together with 1) seeing 20% speedup on some benchmarks. 4) Add TestCompability.c where defining "TEST_VM_IN_ECLAIR := true" in buildspec.mk will activate dummy symbols needed to run libdvm.so in older releases. Bug: 2397689 Bug: 2396513 Bug: 2331313
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
c1d9ed490a7bd6caab51df41f3c9e590fcecb727 |
02-Feb-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Rework monitor enter/exit to simplify thread suspension The Jit must stop all threads in order to flush the translation cache (and other tables). Threads which are blocked in a monitor wait cause some headache here because they effectively hold a references to the translation cache (though the return address on the native stack). The new model introduced in this CL is that for the fast path of monitor enter, control is allowed to resume in the translation cache. However, if we need to do a heavyweight lock (which may cause us to block) control does not return to the translation cache but instead bails out to the interpreter. This allows us to safely clear the code cache even if some threads are in THREAD_MONITOR state.
ommon/asm-constants.h
|
06bb83906737fec543c86ab36f450cc62066b58a |
01-Feb-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: MethodTrace + Jit fix Add checks for debug & trace mode to avoid re-entering Jit'd code. This is the conversative solution - we'll eventually want the Jit to integrate support for tracing and debug into Jit'd code.
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/entry.c
|
964a7b06a9134947b5985c7f712d18d57ed665d2 |
28-Jan-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Rework delayed start plus misc. cleanup Defer initialization of jit to support upcoming feature to wait until first screen is painted to start in order to avoid wasting effort on jit'ng initialization code. Timed delay in place for the moment. To change the on/off state, call dvmSuspendAllThreads(), update the value of gDvmJit.pJitTable and then dvmResumeAllThreads(). Each time a thread goes through the heavyweight check suspend path, returns from a monitor lock/unlock or returns from a JNI call, it will refresh its on/off state. Also: Recognize and handle failure to increase size of JitTable. Avoid repeated lock/unlock of JitTable modification mutex during resize Make all work order enqueue actions non-blocking, which includes adding a non-blocking mutex lock: dvmTryLockMutex(). Fix bug Jeff noticed where we were using a half-word form of a Thumb2 instruction rather than the byte form. Minor comment changes.
terp.c
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
7a0bcd0de6c4da6499a088a18d1750e51204c2a6 |
23-Jan-2010 |
Ben Cheng <bccheng@android.com> |
Tighten the safe points for code cache resets to happen. Add a new flag in the Thread struct to track the whereabout of the top frame in each Java thread. It is not safe to blow away the code cache if any thread is in the JIT'ed land.
terp.c
rmv5te/entry.S
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
9797a237b48e880c33e2a2f497f48fb6f67c7a16 |
12-Jan-2010 |
Bill Buzbee <buzbee@google.com> |
Performance tweak for Jit lookup & adjust table sizes for better performance Also, move setting of Jit table parameters to architecture-specific init funciton.
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
7bbb9ceaeeb18e34341ad7cc488f8f81c9997f36 |
22-Dec-2009 |
Carl Shapiro <cshapiro@google.com> |
Initialize the arg variables to avoid an uninitialized use compiler warning. While this effects performance, with the native interpreter the speed of the portable interpreter is of diminished importance.
/OP_EXECUTE_INLINE.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
|
b1d8044ee3a7503b94eb54459f3077d7200cd675 |
17-Dec-2009 |
Bill Buzbee <buzbee@google.com> |
Jit: Briefly delay start of Jit'ng in attempt to avoid compiling init code Via subjective manual side-by-side testing of jit vs. no-jit, the mterp version looked like it tended to reach first screen on application launch very slightly before the Jit version. This change adds an old and commonly-used Jit trick to delay jit startup in an attempt to avoid wasting effort compiling initialization code. Also, deletes some code no longer in use.
rmv5te/header.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
fcccb3bfa5f42fc728c307cfcf77db4d685583c0 |
30-Oct-2009 |
Barry Hayes <bhayes@google.com> |
Remove arrayClass from ClassObject. It seems to get only dozens of hits in all of Zygote start-up. There doesn't seem to be a measurable difference in the time printed in: I/Zygote ( 2247): ...preloaded 1147 classes in NNNNms.
ommon/asm-constants.h
|
342806dae77556290dfe0760e6fe3117d812c7ba |
08-Dec-2009 |
Bill Buzbee <buzbee@google.com> |
Jit: Save/restore callee-save floating point registers at interpreter entry/exit
ommon/asm-constants.h
|
b0a0541b59d1126ff77c88de742b4a74579fe296 |
19-Nov-2009 |
Andy McFadden <fadden@android.com> |
Add execute-inline/range instruction. Like "execute-inline", this is an instruction generated by dexopt that replaces a method invoke instruction. It's useful for small, frequently called methods in the core libs. As with execute-inline, we allow at most 4 arguments, but with /range we're no longer limited to the low 16 registers. Also: marked execute-inline as being able to throw an exception. Needed: native x86 implementation; support in JIT. For bug 2268232.
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_EXECUTE_INLINE_RANGE.S
rmv5te/OP_UNUSED_EF.S
/OP_EXECUTE_INLINE_RANGE.c
/OP_UNUSED_EF.c
onfig-x86
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
86/OP_EXECUTE_INLINE_RANGE.S
86/OP_UNUSED_EF.S
|
96516932f1557d8f48a8b2dbbb885af01a11ef6e |
29-Oct-2009 |
Andy McFadden <fadden@android.com> |
Change the way breakpoints work. This replaces the breakpoint mechanism with a more efficient approach. We now insert breakpoint instructions into the bytecode stream instead of maintaining a table. This requires mapping DEX files as private instead of shared, which allows copy-on-write to work. mprotect() is used to guard the pages against inadvertent writes. Unused opcode EC is now OP_BREAKPOINT. It's not recognized by dexdump or any interpreter except portdbg, but it can be encountered by the bytecode verifier (the debugger can request breakpoints in unverified code). Breakpoint changes are blocked while the verifier runs to avoid races. This eliminates method->debugBreakpointCount, which is no longer needed. (Also, it clashed with LinearAlloc's read-only mode.) The deferred verification error mechanism was using a code-copying approach to modify the bytecode stream. That has been changed to use the same copy-on-write modification mechanism. Also, normalized all PAGE_SIZE/PAGESIZE references to a single SYSTEM_PAGE_SIZE define. Simple Fibonacci computation test times (opal-eng): JIT, no debugger: 10.6ms Fast interp, no debugger: 36ms Portable interp, no debugger: 43.8ms ORIG debug interp, no breakpoints set: 458ms ORIG debug interp, breakpoint set nearby: 697ms NEW debug interp, no breakpoints set: 341ms NEW debug interp, breakpoints set nearby: 341ms Where "nearby" means there's a breakpoint in the method doing the computation that isn't actually hit -- the VM had an optimization where it flagged methods with breakpoints and skipped some of the processing when possible. The bottom line is that code should run noticeably faster while a debugger is attached.
rmv5te/OP_BREAKPOINT.S
rmv5te/OP_UNUSED_EC.S
/OP_BREAKPOINT.c
/OP_UNUSED_EC.c
/header.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/debug.c
ortable/stubdefs.c
86/OP_BREAKPOINT.S
86/OP_UNUSED_EC.S
|
72e93344b4d1ffc71e9c832ec23de0657e5b04a5 |
13-Nov-2009 |
Jean-Baptiste Queru <jbq@google.com> |
eclair snapshot
terp.c
terp.h
rm-vfp/OP_ADD_DOUBLE.S
rm-vfp/OP_ADD_DOUBLE_2ADDR.S
rm-vfp/OP_ADD_FLOAT.S
rm-vfp/OP_ADD_FLOAT_2ADDR.S
rm-vfp/OP_CMPG_DOUBLE.S
rm-vfp/OP_CMPG_FLOAT.S
rm-vfp/OP_CMPL_DOUBLE.S
rm-vfp/OP_CMPL_FLOAT.S
rm-vfp/OP_DIV_DOUBLE.S
rm-vfp/OP_DIV_DOUBLE_2ADDR.S
rm-vfp/OP_DIV_FLOAT.S
rm-vfp/OP_DIV_FLOAT_2ADDR.S
rm-vfp/OP_DOUBLE_TO_FLOAT.S
rm-vfp/OP_DOUBLE_TO_INT.S
rm-vfp/OP_FLOAT_TO_DOUBLE.S
rm-vfp/OP_FLOAT_TO_INT.S
rm-vfp/OP_INT_TO_DOUBLE.S
rm-vfp/OP_INT_TO_FLOAT.S
rm-vfp/OP_MUL_DOUBLE.S
rm-vfp/OP_MUL_DOUBLE_2ADDR.S
rm-vfp/OP_MUL_FLOAT.S
rm-vfp/OP_MUL_FLOAT_2ADDR.S
rm-vfp/OP_SUB_DOUBLE.S
rm-vfp/OP_SUB_DOUBLE_2ADDR.S
rm-vfp/OP_SUB_FLOAT.S
rm-vfp/OP_SUB_FLOAT_2ADDR.S
rm-vfp/README.txt
rm-vfp/fbinop.S
rm-vfp/fbinop2addr.S
rm-vfp/fbinopWide.S
rm-vfp/fbinopWide2addr.S
rm-vfp/funop.S
rm-vfp/funopNarrower.S
rm-vfp/funopWider.S
rmv5te/OP_DOUBLE_TO_INT.S
rmv5te/OP_DOUBLE_TO_LONG.S
rmv5te/OP_GOTO.S
rmv5te/OP_GOTO_16.S
rmv5te/OP_GOTO_32.S
rmv5te/OP_MONITOR_ENTER.S
rmv5te/OP_MOVE_WIDE_16.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_PACKED_SWITCH.S
rmv5te/OP_THROW_VERIFICATION_ERROR.S
rmv5te/OP_UNUSED_ED.S
rmv5te/bincmp.S
rmv5te/binop2addr.S
rmv5te/debug.c
rmv5te/entry.S
rmv5te/footer.S
rmv5te/header.S
rmv5te/zcmp.S
rmv6/OP_INT_TO_BYTE.S
rmv6/OP_INT_TO_CHAR.S
rmv6/OP_INT_TO_SHORT.S
rmv6t2/OP_ADD_DOUBLE_2ADDR.S
rmv6t2/OP_ADD_FLOAT_2ADDR.S
rmv6t2/OP_ADD_INT_2ADDR.S
rmv6t2/OP_ADD_INT_LIT16.S
rmv6t2/OP_ADD_LONG_2ADDR.S
rmv6t2/OP_AND_INT_2ADDR.S
rmv6t2/OP_AND_INT_LIT16.S
rmv6t2/OP_AND_LONG_2ADDR.S
rmv6t2/OP_ARRAY_LENGTH.S
rmv6t2/OP_CONST_4.S
rmv6t2/OP_DIV_DOUBLE_2ADDR.S
rmv6t2/OP_DIV_FLOAT_2ADDR.S
rmv6t2/OP_DIV_INT_2ADDR.S
rmv6t2/OP_DIV_INT_LIT16.S
rmv6t2/OP_DIV_LONG_2ADDR.S
rmv6t2/OP_DOUBLE_TO_FLOAT.S
rmv6t2/OP_DOUBLE_TO_INT.S
rmv6t2/OP_DOUBLE_TO_LONG.S
rmv6t2/OP_FLOAT_TO_DOUBLE.S
rmv6t2/OP_FLOAT_TO_INT.S
rmv6t2/OP_FLOAT_TO_LONG.S
rmv6t2/OP_IF_EQ.S
rmv6t2/OP_IF_GE.S
rmv6t2/OP_IF_GT.S
rmv6t2/OP_IF_LE.S
rmv6t2/OP_IF_LT.S
rmv6t2/OP_IF_NE.S
rmv6t2/OP_IGET.S
rmv6t2/OP_IGET_QUICK.S
rmv6t2/OP_IGET_WIDE.S
rmv6t2/OP_IGET_WIDE_QUICK.S
rmv6t2/OP_INT_TO_BYTE.S
rmv6t2/OP_INT_TO_CHAR.S
rmv6t2/OP_INT_TO_DOUBLE.S
rmv6t2/OP_INT_TO_FLOAT.S
rmv6t2/OP_INT_TO_LONG.S
rmv6t2/OP_INT_TO_SHORT.S
rmv6t2/OP_IPUT.S
rmv6t2/OP_IPUT_QUICK.S
rmv6t2/OP_IPUT_WIDE.S
rmv6t2/OP_IPUT_WIDE_QUICK.S
rmv6t2/OP_LONG_TO_DOUBLE.S
rmv6t2/OP_LONG_TO_FLOAT.S
rmv6t2/OP_MOVE.S
rmv6t2/OP_MOVE_WIDE.S
rmv6t2/OP_MUL_DOUBLE_2ADDR.S
rmv6t2/OP_MUL_FLOAT_2ADDR.S
rmv6t2/OP_MUL_INT_2ADDR.S
rmv6t2/OP_MUL_INT_LIT16.S
rmv6t2/OP_MUL_LONG_2ADDR.S
rmv6t2/OP_NEG_DOUBLE.S
rmv6t2/OP_NEG_FLOAT.S
rmv6t2/OP_NEG_INT.S
rmv6t2/OP_NEG_LONG.S
rmv6t2/OP_NOT_INT.S
rmv6t2/OP_NOT_LONG.S
rmv6t2/OP_OR_INT_2ADDR.S
rmv6t2/OP_OR_INT_LIT16.S
rmv6t2/OP_OR_LONG_2ADDR.S
rmv6t2/OP_REM_DOUBLE_2ADDR.S
rmv6t2/OP_REM_FLOAT_2ADDR.S
rmv6t2/OP_REM_INT_2ADDR.S
rmv6t2/OP_REM_INT_LIT16.S
rmv6t2/OP_REM_LONG_2ADDR.S
rmv6t2/OP_RSUB_INT.S
rmv6t2/OP_SHL_INT_2ADDR.S
rmv6t2/OP_SHL_LONG_2ADDR.S
rmv6t2/OP_SHR_INT_2ADDR.S
rmv6t2/OP_SHR_LONG_2ADDR.S
rmv6t2/OP_SUB_DOUBLE_2ADDR.S
rmv6t2/OP_SUB_FLOAT_2ADDR.S
rmv6t2/OP_SUB_INT_2ADDR.S
rmv6t2/OP_SUB_LONG_2ADDR.S
rmv6t2/OP_USHR_INT_2ADDR.S
rmv6t2/OP_USHR_LONG_2ADDR.S
rmv6t2/OP_XOR_INT_2ADDR.S
rmv6t2/OP_XOR_INT_LIT16.S
rmv6t2/OP_XOR_LONG_2ADDR.S
rmv6t2/bincmp.S
rmv6t2/binop2addr.S
rmv6t2/binopLit16.S
rmv6t2/binopWide2addr.S
rmv6t2/unop.S
rmv6t2/unopNarrower.S
rmv6t2/unopWide.S
rmv6t2/unopWider.S
/OP_MONITOR_ENTER.c
/OP_NEW_INSTANCE.c
/OP_THROW_VERIFICATION_ERROR.c
/OP_UNUSED_ED.c
/gotoTargets.c
/header.c
ommon/FindInterface.h
ommon/asm-constants.h
onfig-armv5te-vfp
onfig-armv7-a
stubs/stubdefs.c
en-mterp.py
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/debug.c
ortable/entry.c
ortable/portdbg.c
ortable/portstd.c
ortable/stubdefs.c
ebuild.sh
86/OP_INVOKE_DIRECT.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_QUICK.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_QUICK.S
86/OP_MONITOR_ENTER.S
86/OP_NEW_INSTANCE.S
86/OP_THROW_VERIFICATION_ERROR.S
86/OP_UNUSED_ED.S
86/footer.S
|
d726991ba52466cde88e37aba4de2395b62477fa |
10-Nov-2009 |
Bill Buzbee <buzbee@google.com> |
Jit stress mode: translate everything we can and self verify. This represents a general clean-up of some existing command-line options: -Xjitthreshold:num and -Xjitblocking. The jit threshold controls how quickly we treat a Dalvik address as a potential trace head. Normally this is set around 200 (and the range is 0..255, where 0 is in effect 256 and 1 means begin trace selection on first visit). -Xjitblocking forces the system to pause execution whenever a translation request is made and resume when that translation is complete. Normally the system make a request but continues execution (to avoid jitter). Additionally, if WITH_SELF_VERIFICATION is defined, we force blocking to be true, and set the threshold to 1. And finally, we treat threshold==1 as a special case and disable the 2nd-level trace-building filter - which causes the system to immediately start trace selection.
terp.c
rmv5te/footer.S
rmv5te/header.S
/gotoTargets.c
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
|
9a8c75adb2abf551d06dbf757bff558c1feded08 |
08-Nov-2009 |
Bill Buzbee <buzbee@google.com> |
Introduce "just interpret" chainable pseudo-translation. This is the first step towards enabling translation & self-cosim stress modes. When trace selection begins, the trace head address is pinned and remains in a limbo state until the translation is complete. Previously, if the trace selected aborted for any reason, the trace head would remain forever in limbo. This was not a correctness problem, but caused some small performance anomolies and made life more difficult for self-cosimulation mode. This CL introduces a pseudo-translation that simply routes control to the interpreter. When we detect that a trace selection attempt has failed, the trace head is associated with this fully-chainable pseudo-translation. This also has the benefit for self-cosimulation that we are guaranteed forward progress.
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
93c995b8eab585a05b058ed17ec1b391c4946d77 |
03-Nov-2009 |
Ben Cheng <bccheng@google.com> |
Hide JIT-specific constants when JIT is not configured.
ommon/asm-constants.h
|
6c10a977ec892c26c8e306356491833bbb073d40 |
29-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Implement chaining up to the first 64 cases in a switch statement.
ommon/asm-constants.h
|
fd023aaec5f2b0df61d1702ea2f29a70abe90158 |
02-Nov-2009 |
Bill Buzbee <buzbee@google.com> |
Jit - optimized inline string compareto, indexof; fill_array_data bug fix Added flushAllRegs() prior to C handlers in preparation for upcoming support for holding live/dirty values in physical registers.
ommon/asm-constants.h
|
ccd6c0102d1f898aaea1c94761167fdd083b5275 |
15-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Make the traige process for self-verification found divergence easier. 1. Automatically replay the code compilation with verbose mode turned on for the offending compilation. 3. Mark the registers with divergence explicitly. 2. Print accurate operand names using the dataflow attributes. Constant values are still printed for reference only. 3. Fixed a few correctness/style issues in self-verification code.
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
30f1f463b132c7b6daf2de825c5fa44ce356ca13 |
12-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Set the debug interpreter entry point properly on the self-verification path. Also fix the encoding for SFP/DFP register names to make self-verification happy on FP benchmarks.
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
9c147b84ff7fe2c39228742b06a9ef180d39b48f |
08-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Fix various bugs found when debugger is attached to the VM. See b/2161257 for details.
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/entry.c
ortable/portdbg.c
ortable/portstd.c
ortable/stubdefs.c
|
dc84bb2b1657d88c5543eb22b875c297d49e709d |
02-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Fix trace builder to not confuse self-verification.
/gotoTargets.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
|
79d173cad420b2ef99a09688e603df7ea4f890e9 |
30-Sep-2009 |
Ben Cheng <bccheng@google.com> |
Fixed the trace builder to correctly handle excpetion throwing instruction. Added a new unit test 081-hot-exceptions to target this problem.
/gotoTargets.c
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
|
6ed1a0f396a1857c31b486d3e93ee2dbeb49a6cd |
11-Sep-2009 |
Andy McFadden <fadden@android.com> |
Display additional information on stack overflow. This required passing an additional argument into dvmHandleStackOverflow, which is called directly from mterp. Fortunately the method being called is sitting in a register for both ARM and x86, so this is a fairly simple change. For internal bug 2110533.
rmv5te/footer.S
/gotoTargets.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
86/footer.S
|
ce114ac196211d6b2673650d9d565d689f6c094f |
26-Aug-2009 |
Andy McFadden <fadden@android.com> |
am f7fb0086: Merge change 22659 into eclair Merge commit 'f7fb00865dd05c32aab5b968fd79ae0ef63e9d6c' * commit 'f7fb00865dd05c32aab5b968fd79ae0ef63e9d6c': Another round of scary indirect ref changes.
|
d5ab726b65d7271be261864c7e224fb90bfe06e0 |
25-Aug-2009 |
Andy McFadden <fadden@android.com> |
Another round of scary indirect ref changes. This change adds a not-really-working implementation to Jni.c, with various changes #ifdefed throughout the code. The ifdef is currently disabled, so the old behavior should continue. Eventually the old version will be stripped out and the ifdefs removed. This renames the stack's "localRefTop" field, which nudged a bunch of code. The name wasn't really right before (it's the *bottom* of the local references), and it's even less right now. This and one other mterp-visible constant were changed, which caused some ripples through mterp and the JIT, but the ifdeffing was limited to one in asm-constants.h (and the constant is the same both ways, so toggling the ifdef won't require rebuilding asm sources). Some comments and arg names in ReferenceTable were updated for the correct orientation of bottom vs. top. Some adjustments were made to the JNI code, e.g. dvmCallMethod now needs to understand if it needs to convert reference arguments from local/global refs to pointers (it's called from various places throughout the VM).
rmv5te/footer.S
/gotoTargets.c
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
86/footer.S
|
97319a8a234e9fe1cf90ca39aa6eca37d729afd5 |
13-Aug-2009 |
Jeff Hao <jeffhao@google.com> |
New changes to enable self verification mode.
rmv5te/footer.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ortable/entry.c
|
1eb76ad0a070c10e03a287301636733a90e96af8 |
11-Aug-2009 |
Android (Google) Code Review <android-gerrit@google.com> |
Merge change 8107 * changes: First parts of enabling a host Dalvik build.
|
4212241f98a49adcb955aee67a302cea57f3d984 |
22-Jul-2009 |
Dan Bornstein <danfuzz@android.com> |
First parts of enabling a host Dalvik build. Most of this is just factoring out common make defs to include both on the host and device side, though there is a little bit of code change to be slightly POSIX friendlier and to avoid unnecessary sanity checks when compiling without an asm version of the interpreter. This patch should cause no difference in build results, except if you turn on the newly-defined WITH_HOST_DALVIK build flag. If you do turn it on, at this point you should probably expect the build to fail due to insufficient dependencies, which I of course expect to address in upcoming patches.
terp.c
|
be323ec573918ef1674e4883c8766ddc4ee2a10c |
10-Aug-2009 |
Jean-Baptiste Queru <jbq@google.com> |
merge from open-source master
|
d51370ff814e88b63baa3b1f5300b6560330c12d |
06-Aug-2009 |
Andy McFadden <fadden@android.com> |
Switch to <stdbool.h> in the VM. We were using an enum that made the compiler unhappy on MacOS X. This switches us to using <stdbool.h> when it's available. The size of a "bool" is either sizeof(_Bool) or sizeof(enum bool), and the assembly sources dislike ambiguity, so this also changes gDvm.debuggerActive to always be a single byte. The ARM and x86 code was already assuming that -- held over from when enums were variable-width, and never fixed because we get the right answer on little-endian platforms -- so it doesn't look like we need to change anything in mterp.
ommon/asm-constants.h
|
080ca4a5498eab5548856a0b8de91e3ab1e89a64 |
05-Aug-2009 |
Andy McFadden <fadden@android.com> |
Regenerate mterp. Whoops! Should've been part of d33b0c3fbd81ae96c5d5c034030d62caac33c310.
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-armv7-a.c
ut/InterpC-x86.c
|
d33b0c3fbd81ae96c5d5c034030d62caac33c310 |
01-Aug-2009 |
Andy McFadden <fadden@android.com> |
Fix a LOGVV. Somebody on android-porting stumbled over this.
stubs/stubdefs.c
|
be74aeb457df67355ce7c16721ecc436c8fd770a |
29-Jul-2009 |
Bill Buzbee <buzbee@google.com> |
Fix for 1857865: Need x86 implementation for OP_THROW_VERIFICATION_ERROR
onfig-x86
ut/InterpAsm-x86.S
ut/InterpC-x86.c
86/OP_THROW_VERIFICATION_ERROR.S
|
6a95adec3a5fa107f2bec11d77a66408f239c5ac |
26-Jul-2009 |
Jean-Baptiste Queru <jbq@google.com> |
Merge korg/donut into korg/master Conflicts: libcore/luni/src/main/java/org/apache/harmony/luni/platform/PlatformAddressFactory.java vm/oo/Class.c
|
85745e148153894aac52ad3d7f6a36a7767b45a0 |
08-Jul-2009 |
Mike Lockwood <lockwood@android.com> |
Fix variable names related to bytecode tracing. Signed-off-by: Tony Yokoyama <chuuoudai@gmail.com> The compile errors, encountered in the case that macro LOG_INSTR is turned on, are fixed. On branch log_instr Changes to be committed: modified: vm/mterp/armv5te/debug.c modified: vm/mterp/c/gotoTargets.c modified: vm/mterp/out/InterpC-allstubs.c modified: vm/mterp/out/InterpC-armv4.c modified: vm/mterp/out/InterpC-armv5te.c modified: vm/mterp/out/InterpC-portdbg.c modified: vm/mterp/out/InterpC-portstd.c modified: vm/mterp/out/InterpC-x86.c modified: vm/mterp/portable/debug.c modified: vm/oo/Class.c
rmv5te/debug.c
/gotoTargets.c
ut/InterpC-allstubs.c
ut/InterpC-armv4.c
ut/InterpC-armv5te.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/debug.c
|
2d27d13958715bc955ca28b043122d8571a7eb60 |
14-Jul-2009 |
Andy McFadden <fadden@android.com> |
Added note about unaligned doubles.
rm-vfp/README.txt
|
38329f5678fd7a4879528b02a0ab60322d38a897 |
07-Jul-2009 |
Ben Cheng <bccheng@android.com> |
Improved method invocation performance: 1.5x for virtual and 2.8x for interface. - Implemented predicted chaining for invoke virtual and interface. - Eliminated a little bit of fat for invoke native. - Added 078-polymorphic-virtual for stress tests.
ut/InterpAsm-armv7-a.S
|
48f1824fd36241067e7bed2302cc00b2d880be7f |
20-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
New threshold mechanism for trace selections. Intended to reduce number of junk traces.
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
|
5162c5fbc20b7ba7791e79c640ac51b9fcd7937a |
20-Jun-2009 |
Andy McFadden <fadden@android.com> |
Use paired immediates for large constants. The double-to-int and double-to-long instructions were loading constants from .word directives, which wastes space in the CPU data cache. This replaces a single LDR with a pair of data operations. We don't actually use the double-to-long handler (the ARM EABI lib does the right thing), and double-to-int is handled by VFP on newer devices, but on older devices this may help a smidgeon. Mostly it just looks nicer when you don't have .words lying around. Also picks up a change that should be in the armv7-a generated file but got lost in all of today's various mergings (float compare tweak).
rmv5te/OP_DOUBLE_TO_INT.S
rmv5te/OP_DOUBLE_TO_LONG.S
rmv6t2/OP_DOUBLE_TO_INT.S
rmv6t2/OP_DOUBLE_TO_LONG.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
|
a5069fb7eb2da846ff1fc2c903ebd8ce9fa3647f |
20-Jun-2009 |
Andy McFadden <fadden@android.com> |
Added ARMv6T2 experiment. These adds replacements for handlers that benefit from the use of new instructions introduced in ARMv6T2 (notably UBFX, unsigned bit-field extraction). This also adds an "armv7-a" mterp config file. The benchmark improvement was tiny, so there's no real motivation to convince the build system to use them. This also includes an interleave fix for binop2addr.
rmv5te/binop2addr.S
rmv6t2/OP_ADD_DOUBLE_2ADDR.S
rmv6t2/OP_ADD_FLOAT_2ADDR.S
rmv6t2/OP_ADD_INT_2ADDR.S
rmv6t2/OP_ADD_INT_LIT16.S
rmv6t2/OP_ADD_LONG_2ADDR.S
rmv6t2/OP_AND_INT_2ADDR.S
rmv6t2/OP_AND_INT_LIT16.S
rmv6t2/OP_AND_LONG_2ADDR.S
rmv6t2/OP_ARRAY_LENGTH.S
rmv6t2/OP_CONST_4.S
rmv6t2/OP_DIV_DOUBLE_2ADDR.S
rmv6t2/OP_DIV_FLOAT_2ADDR.S
rmv6t2/OP_DIV_INT_2ADDR.S
rmv6t2/OP_DIV_INT_LIT16.S
rmv6t2/OP_DIV_LONG_2ADDR.S
rmv6t2/OP_DOUBLE_TO_FLOAT.S
rmv6t2/OP_DOUBLE_TO_INT.S
rmv6t2/OP_DOUBLE_TO_LONG.S
rmv6t2/OP_FLOAT_TO_DOUBLE.S
rmv6t2/OP_FLOAT_TO_INT.S
rmv6t2/OP_FLOAT_TO_LONG.S
rmv6t2/OP_IF_EQ.S
rmv6t2/OP_IF_GE.S
rmv6t2/OP_IF_GT.S
rmv6t2/OP_IF_LE.S
rmv6t2/OP_IF_LT.S
rmv6t2/OP_IF_NE.S
rmv6t2/OP_IGET.S
rmv6t2/OP_IGET_QUICK.S
rmv6t2/OP_IGET_WIDE.S
rmv6t2/OP_IGET_WIDE_QUICK.S
rmv6t2/OP_INT_TO_BYTE.S
rmv6t2/OP_INT_TO_CHAR.S
rmv6t2/OP_INT_TO_DOUBLE.S
rmv6t2/OP_INT_TO_FLOAT.S
rmv6t2/OP_INT_TO_LONG.S
rmv6t2/OP_INT_TO_SHORT.S
rmv6t2/OP_IPUT.S
rmv6t2/OP_IPUT_QUICK.S
rmv6t2/OP_IPUT_WIDE.S
rmv6t2/OP_IPUT_WIDE_QUICK.S
rmv6t2/OP_LONG_TO_DOUBLE.S
rmv6t2/OP_LONG_TO_FLOAT.S
rmv6t2/OP_MOVE.S
rmv6t2/OP_MOVE_WIDE.S
rmv6t2/OP_MUL_DOUBLE_2ADDR.S
rmv6t2/OP_MUL_FLOAT_2ADDR.S
rmv6t2/OP_MUL_INT_2ADDR.S
rmv6t2/OP_MUL_INT_LIT16.S
rmv6t2/OP_MUL_LONG_2ADDR.S
rmv6t2/OP_NEG_DOUBLE.S
rmv6t2/OP_NEG_FLOAT.S
rmv6t2/OP_NEG_INT.S
rmv6t2/OP_NEG_LONG.S
rmv6t2/OP_NOT_INT.S
rmv6t2/OP_NOT_LONG.S
rmv6t2/OP_OR_INT_2ADDR.S
rmv6t2/OP_OR_INT_LIT16.S
rmv6t2/OP_OR_LONG_2ADDR.S
rmv6t2/OP_REM_DOUBLE_2ADDR.S
rmv6t2/OP_REM_FLOAT_2ADDR.S
rmv6t2/OP_REM_INT_2ADDR.S
rmv6t2/OP_REM_INT_LIT16.S
rmv6t2/OP_REM_LONG_2ADDR.S
rmv6t2/OP_RSUB_INT.S
rmv6t2/OP_SHL_INT_2ADDR.S
rmv6t2/OP_SHL_LONG_2ADDR.S
rmv6t2/OP_SHR_INT_2ADDR.S
rmv6t2/OP_SHR_LONG_2ADDR.S
rmv6t2/OP_SUB_DOUBLE_2ADDR.S
rmv6t2/OP_SUB_FLOAT_2ADDR.S
rmv6t2/OP_SUB_INT_2ADDR.S
rmv6t2/OP_SUB_LONG_2ADDR.S
rmv6t2/OP_USHR_INT_2ADDR.S
rmv6t2/OP_USHR_LONG_2ADDR.S
rmv6t2/OP_XOR_INT_2ADDR.S
rmv6t2/OP_XOR_INT_LIT16.S
rmv6t2/OP_XOR_LONG_2ADDR.S
rmv6t2/bincmp.S
rmv6t2/binop2addr.S
rmv6t2/binopLit16.S
rmv6t2/binopWide2addr.S
rmv6t2/unop.S
rmv6t2/unopNarrower.S
rmv6t2/unopWide.S
rmv6t2/unopWider.S
onfig-armv7-a
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-armv7-a.S
ut/InterpC-armv7-a.c
ebuild.sh
|
eb4505880819b2336303ce84898f7046c811aeb1 |
19-Jun-2009 |
Android (Google) Code Review <android-gerrit@google.com> |
Merge change 4809 * changes: Warn when one handler replaces another.
|
1f7d289a8f7e49bf9a52a7301ff9fea5b1157d20 |
19-Jun-2009 |
Andy McFadden <fadden@android.com> |
Warn when one handler replaces another. The mterp generation script silently allows you to specify handlers for the same opcode more than once. This can cause some confusion. We now issue a warning when that happens. This also reduces the overall verbosity level, so the warnings are visible.
en-mterp.py
|
8fd923e066208c4bbebe5677cac4d11a629bac1b |
19-Jun-2009 |
Andy McFadden <fadden@android.com> |
Improve interleave on VFP compare. Improves FloatOps/FloatOpsD from 229/230ns to 228/229ns, an exciting half-percentage-point gain.
rm-vfp/OP_CMPG_DOUBLE.S
rm-vfp/OP_CMPG_FLOAT.S
rm-vfp/OP_CMPL_DOUBLE.S
rm-vfp/OP_CMPL_FLOAT.S
rm-vfp/README.txt
ut/InterpAsm-armv5te-vfp.S
|
47309850f9ad8f1ba446772b6f2a40d0e3499fc1 |
19-Jun-2009 |
Android (Google) Code Review <android-gerrit@google.com> |
Merge change 4695 * changes: Quick experiment with ARMv6 instructions.
|
697689aa9da98b9a8de5bb2dcff28a500daf8a16 |
19-Jun-2009 |
Andy McFadden <fadden@android.com> |
Quick experiment with ARMv6 instructions. This is a commented-out experiment with ARMv6 instructions, which our existing products support. (We can't use these unless we want to define an ARMv6 target. For what we gain with these, it's not worthwhile.)
rmv6/OP_INT_TO_BYTE.S
rmv6/OP_INT_TO_CHAR.S
rmv6/OP_INT_TO_SHORT.S
onfig-armv5te-vfp
|
5abc6e77ff476217f0871d800977ef50fc000d00 |
19-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
Neglected to rebuild template/out/* and mterp/out* in #4536
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
|
6e963e1cfbaeac377fed3ba8d5715c1dccfc1a57 |
18-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
Trace profiling support for the jit
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
|
d8125c62642bd71df7485a85f787a1c6e2124c48 |
13-Jun-2009 |
Andy McFadden <fadden@android.com> |
Added a VFP utility function for future use.
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
|
968d32c2b6160c19c2308793dca6d747cbfea8fe |
12-Jun-2009 |
Andy McFadden <fadden@android.com> |
Rename vfp to arm-vfp.
rm-vfp/OP_ADD_DOUBLE.S
rm-vfp/OP_ADD_DOUBLE_2ADDR.S
rm-vfp/OP_ADD_FLOAT.S
rm-vfp/OP_ADD_FLOAT_2ADDR.S
rm-vfp/OP_CMPG_DOUBLE.S
rm-vfp/OP_CMPG_FLOAT.S
rm-vfp/OP_CMPL_DOUBLE.S
rm-vfp/OP_CMPL_FLOAT.S
rm-vfp/OP_DIV_DOUBLE.S
rm-vfp/OP_DIV_DOUBLE_2ADDR.S
rm-vfp/OP_DIV_FLOAT.S
rm-vfp/OP_DIV_FLOAT_2ADDR.S
rm-vfp/OP_DOUBLE_TO_FLOAT.S
rm-vfp/OP_DOUBLE_TO_INT.S
rm-vfp/OP_FLOAT_TO_DOUBLE.S
rm-vfp/OP_FLOAT_TO_INT.S
rm-vfp/OP_INT_TO_DOUBLE.S
rm-vfp/OP_INT_TO_FLOAT.S
rm-vfp/OP_MUL_DOUBLE.S
rm-vfp/OP_MUL_DOUBLE_2ADDR.S
rm-vfp/OP_MUL_FLOAT.S
rm-vfp/OP_MUL_FLOAT_2ADDR.S
rm-vfp/OP_SUB_DOUBLE.S
rm-vfp/OP_SUB_DOUBLE_2ADDR.S
rm-vfp/OP_SUB_FLOAT.S
rm-vfp/OP_SUB_FLOAT_2ADDR.S
rm-vfp/fbinop.S
rm-vfp/fbinop2addr.S
rm-vfp/fbinopWide.S
rm-vfp/fbinopWide2addr.S
rm-vfp/funop.S
rm-vfp/funopNarrower.S
rm-vfp/funopWider.S
onfig-armv5te-vfp
ut/InterpAsm-armv5te-vfp.S
fp/OP_ADD_DOUBLE.S
fp/OP_ADD_DOUBLE_2ADDR.S
fp/OP_ADD_FLOAT.S
fp/OP_ADD_FLOAT_2ADDR.S
fp/OP_CMPG_DOUBLE.S
fp/OP_CMPG_FLOAT.S
fp/OP_CMPL_DOUBLE.S
fp/OP_CMPL_FLOAT.S
fp/OP_DIV_DOUBLE.S
fp/OP_DIV_DOUBLE_2ADDR.S
fp/OP_DIV_FLOAT.S
fp/OP_DIV_FLOAT_2ADDR.S
fp/OP_DOUBLE_TO_FLOAT.S
fp/OP_DOUBLE_TO_INT.S
fp/OP_FLOAT_TO_DOUBLE.S
fp/OP_FLOAT_TO_INT.S
fp/OP_INT_TO_DOUBLE.S
fp/OP_INT_TO_FLOAT.S
fp/OP_MUL_DOUBLE.S
fp/OP_MUL_DOUBLE_2ADDR.S
fp/OP_MUL_FLOAT.S
fp/OP_MUL_FLOAT_2ADDR.S
fp/OP_SUB_DOUBLE.S
fp/OP_SUB_DOUBLE_2ADDR.S
fp/OP_SUB_FLOAT.S
fp/OP_SUB_FLOAT_2ADDR.S
fp/fbinop.S
fp/fbinop2addr.S
fp/fbinopWide.S
fp/fbinopWide2addr.S
fp/funop.S
fp/funopNarrower.S
fp/funopWider.S
|
2717622484eb0f7ad537275f7260b2f93324eda2 |
09-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
Makes the primary Jit table growable. Also includes a change suggested earlier by Dan to use a pre-defined mask in the hash function. Reduce the default JitTable size from 2048 entries to 512 entries. Update per Ben's comments.
terp.c
rmv5te/footer.S
rmv5te/header.S
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
|
445194bc141dc67e2f678aa1bbd5e59ca66254e5 |
08-Jun-2009 |
Andy McFadden <fadden@android.com> |
Correct instruction width for move-wide/16. We were advancing the PC by 2 code units instead of 3, which made the VM crash whenever the instruction was used.
rmv5te/OP_MOVE_WIDE_16.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
|
46cd5b63c29d3284a9ff3e0d0711fb136f409313 |
06-Jun-2009 |
Bill Buzbee <buzbee@google.com> |
Support for stopping all threads in a Jit environment.
rmv5te/footer.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
|
1da12167d913efde56ec3b40491524b051679f2c |
06-Jun-2009 |
Andy McFadden <fadden@android.com> |
Swap the meaning of r7 and r8. This swaps rIBASE and rINST, so that we can access rINST with 16-bit THUMB instructions.
rmv5te/debug.c
rmv5te/footer.S
rmv5te/header.S
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
|
ba4fc8bfc1bccae048403bd1cea3b869dca61dd7 |
01-Jun-2009 |
Ben Cheng <bccheng@android.com> |
Initial port of the Dalvik JIT enging to the internal repository. Fixed files with trailing spaces. Addressed review comments from Dan. Addressed review comments from fadden. Addressed review comments from Dan x 2. Addressed review comments from Dan x 3.
terp.c
terp.h
rmv5te/OP_GOTO.S
rmv5te/OP_GOTO_16.S
rmv5te/OP_GOTO_32.S
rmv5te/OP_PACKED_SWITCH.S
rmv5te/bincmp.S
rmv5te/entry.S
rmv5te/footer.S
rmv5te/header.S
rmv5te/zcmp.S
/gotoTargets.c
/header.c
ommon/FindInterface.h
ommon/asm-constants.h
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/entry.c
ortable/portdbg.c
ortable/portstd.c
ortable/stubdefs.c
|
38214bbeeb2980609919978f17b009d896023491 |
30-May-2009 |
Andy McFadden <fadden@android.com> |
Move stuff around in an attempt to make VFP faster. No effect on floating-point benchmarks. I suspect I've just moving instructions from one delay slot to another, but I feel a little better because the delay is in the VFP co-processor instead of the ARM CPU.
ut/InterpAsm-armv5te-vfp.S
fp/fbinop.S
fp/fbinop2addr.S
fp/fbinopWide.S
fp/fbinopWide2addr.S
fp/funop.S
fp/funopNarrower.S
fp/funopWider.S
|
a80b76553c2b9f33c4063ae8c69c5362d961de81 |
19-May-2009 |
Andy McFadden <fadden@android.com> |
Added basic VFP support to Dalvik interpreter. This adds opcode handlers for all instructions that have a VFP equivalent or (for the compare operations) near-equivalent. The inclusion of VFP is keyed off of TARGET_ARCH_VERSION, so enabling this requires setting "TARGET_ARCH_VERSION=armv5te-vfp" in a buildspec.
rmv5te/debug.c
rmv5te/header.S
onfig-armv5te-vfp
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te-vfp.S
ut/InterpAsm-armv5te.S
ut/InterpC-armv4t.c
ut/InterpC-armv5te-vfp.c
ut/InterpC-armv5te.c
ebuild.sh
fp/OP_ADD_DOUBLE.S
fp/OP_ADD_DOUBLE_2ADDR.S
fp/OP_ADD_FLOAT.S
fp/OP_ADD_FLOAT_2ADDR.S
fp/OP_CMPG_DOUBLE.S
fp/OP_CMPG_FLOAT.S
fp/OP_CMPL_DOUBLE.S
fp/OP_CMPL_FLOAT.S
fp/OP_DIV_DOUBLE.S
fp/OP_DIV_DOUBLE_2ADDR.S
fp/OP_DIV_FLOAT.S
fp/OP_DIV_FLOAT_2ADDR.S
fp/OP_DOUBLE_TO_FLOAT.S
fp/OP_DOUBLE_TO_INT.S
fp/OP_FLOAT_TO_DOUBLE.S
fp/OP_FLOAT_TO_INT.S
fp/OP_INT_TO_DOUBLE.S
fp/OP_INT_TO_FLOAT.S
fp/OP_MUL_DOUBLE.S
fp/OP_MUL_DOUBLE_2ADDR.S
fp/OP_MUL_FLOAT.S
fp/OP_MUL_FLOAT_2ADDR.S
fp/OP_SUB_DOUBLE.S
fp/OP_SUB_DOUBLE_2ADDR.S
fp/OP_SUB_FLOAT.S
fp/OP_SUB_FLOAT_2ADDR.S
fp/fbinop.S
fp/fbinop2addr.S
fp/fbinopWide.S
fp/fbinopWide2addr.S
fp/funop.S
fp/funopNarrower.S
fp/funopWider.S
|
b51ea11c70602918c42764bfafe92a997d3b1803 |
09-May-2009 |
Andy McFadden <fadden@android.com> |
Defer reporting of certain verifier failures. The verifier currently reports all failures immediately. Certain failures, such as the failure to resolve a method, or the determination that access to a field is not allowed, are supposed to deferred until the first time that executing code does something that could cause the resolution. With this change, several kinds of verification failures are deferred. This is done by making a writable copy of the bytecode and replacing the failing instruction with an "always throw" opcode. Gory details: - Added throw-verification-error instruction. Implemented in "portable" and ARM interpreters. x86 uses portable form through stub. - Added a function that creates a copy of a DexCode area and makes the bytecodes writable. - Added code that replaces a single instruction with an "always throw". - Replaced runtime check for abstract/interface in new-instance with a check at verification time. - Added a test to exercise the deferred error mechanism. - Minor cleanups (replaced tab, bad valgrind command, ...).
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_THROW_VERIFICATION_ERROR.S
/OP_NEW_INSTANCE.c
/OP_THROW_VERIFICATION_ERROR.c
onfig-x86
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
86/OP_NEW_INSTANCE.S
|
3a1aedbc9777eab6275a360b93b81b079464238e |
07-May-2009 |
Andy McFadden <fadden@android.com> |
Added throw-verification-error instruction. This is for the deferred verifier error reporting. It replaces OP_UNUSED_ED. The instructions aren't actually used yet, which is good since the x86 version hasn't been written yet. The mterp regen also pushed out some recent-ish changes that hadn't propagated to the armv4t sources.
rmv5te/OP_THROW_VERIFICATION_ERROR.S
rmv5te/OP_UNUSED_ED.S
/OP_THROW_VERIFICATION_ERROR.c
/OP_UNUSED_ED.c
ut/InterpAsm-armv4t.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4t.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86/OP_THROW_VERIFICATION_ERROR.S
86/OP_UNUSED_ED.S
|
a02244e097ee05a6842cdf489155fb72aa3c7183 |
08-Apr-2009 |
Andy McFadden <> |
Merge branch 'readonly-p4-master'
|
d7bf3656e8c57e630aec26aa29eeea3eb4ca99ab |
08-Apr-2009 |
Andy McFadden <> |
AI 144929: Manual integration of 144925. The auto-merger doesn't specify "-d", and it got hung up on out/InterpAsm-armv4.S. Automated import of CL 144929
rmv4/OP_AGET_WIDE.S
rmv4/OP_APUT_WIDE.S
rmv4/OP_IGET_WIDE.S
rmv4/OP_IGET_WIDE_QUICK.S
rmv4/OP_IPUT_WIDE.S
rmv4/OP_IPUT_WIDE_QUICK.S
rmv4/OP_SGET_WIDE.S
rmv4/OP_SPUT_WIDE.S
rmv4/platform.S
rmv4t/OP_AGET_WIDE.S
rmv4t/OP_APUT_WIDE.S
rmv4t/OP_IGET_WIDE.S
rmv4t/OP_IGET_WIDE_QUICK.S
rmv4t/OP_IPUT_WIDE.S
rmv4t/OP_IPUT_WIDE_QUICK.S
rmv4t/OP_SGET_WIDE.S
rmv4t/OP_SPUT_WIDE.S
rmv4t/platform.S
onfig-armv4
onfig-armv4t
ut/InterpAsm-armv4.S
ut/InterpAsm-armv4t.S
ut/InterpC-armv4.c
ut/InterpC-armv4t.c
ebuild.sh
|
fb77555d31f79071b4378a9532d78b3d2e3cbf6d |
07-Apr-2009 |
Andy McFadden <> |
AI 144925: Rename armv4 to armv4t, which is what it really is. We don't build armv4t internally, so this is mostly for the benefit of external people working on older devices. BUG=1775623 Automated import of CL 144925
rmv4/OP_AGET_WIDE.S
rmv4/OP_APUT_WIDE.S
rmv4/OP_IGET_WIDE.S
rmv4/OP_IGET_WIDE_QUICK.S
rmv4/OP_IPUT_WIDE.S
rmv4/OP_IPUT_WIDE_QUICK.S
rmv4/OP_SGET_WIDE.S
rmv4/OP_SPUT_WIDE.S
rmv4/platform.S
rmv4t/OP_AGET_WIDE.S
rmv4t/OP_APUT_WIDE.S
rmv4t/OP_IGET_WIDE.S
rmv4t/OP_IGET_WIDE_QUICK.S
rmv4t/OP_IPUT_WIDE.S
rmv4t/OP_IPUT_WIDE_QUICK.S
rmv4t/OP_SGET_WIDE.S
rmv4t/OP_SPUT_WIDE.S
rmv4t/platform.S
onfig-armv4
onfig-armv4t
ut/InterpAsm-armv4.S
ut/InterpAsm-armv4t.S
ut/InterpC-armv4.c
ut/InterpC-armv4t.c
ebuild.sh
|
c4a5112197976eee186fd2e6a740c1dcc0860b4b |
29-Mar-2009 |
The Android Open Source Project <initial-contribution@android.com> |
Merge branch 'open_source' into google_internal
|
642d9646f0399648e377ed8e1b36eba9b12f84b2 |
26-Mar-2009 |
Ben Cheng <> |
Automated import from //branches/master/...@142811,142811
rmv5te/footer.S
rmv5te/header.S
ut/InterpAsm-armv4.S
ut/InterpAsm-armv5te.S
|
99409883d9c4c0ffb49b070ce307bb33a9dfe9f1 |
19-Mar-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import //branches/master/...@140412
rmv5te/OP_MONITOR_ENTER.S
rmv5te/footer.S
/OP_MONITOR_ENTER.c
/header.c
stubs/stubdefs.c
ut/InterpAsm-armv4.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4.c
ut/InterpC-armv5te.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/stubdefs.c
86/OP_MONITOR_ENTER.S
86/footer.S
|
6964d8bb917798d3296f0b42c15515de7bc81b1c |
19-Mar-2009 |
Jean-Baptiste Queru <jbq@google.com> |
Merge commit 'remotes/korg/cupcake' into cupcake_to_master
|
f6c387128427e121477c1b32ad35cdcaa5101ba3 |
04-Mar-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //depot/cupcake/@135843
akefile-mterp
terp.c
terp.h
OTES.txt
EADME.txt
rmv4/OP_AGET_WIDE.S
rmv4/OP_APUT_WIDE.S
rmv4/OP_IGET_WIDE.S
rmv4/OP_IGET_WIDE_QUICK.S
rmv4/OP_IPUT_WIDE.S
rmv4/OP_IPUT_WIDE_QUICK.S
rmv4/OP_SGET_WIDE.S
rmv4/OP_SPUT_WIDE.S
rmv4/platform.S
rmv5te/OP_ADD_DOUBLE.S
rmv5te/OP_ADD_DOUBLE_2ADDR.S
rmv5te/OP_ADD_FLOAT.S
rmv5te/OP_ADD_FLOAT_2ADDR.S
rmv5te/OP_ADD_INT.S
rmv5te/OP_ADD_INT_2ADDR.S
rmv5te/OP_ADD_INT_LIT16.S
rmv5te/OP_ADD_INT_LIT8.S
rmv5te/OP_ADD_LONG.S
rmv5te/OP_ADD_LONG_2ADDR.S
rmv5te/OP_AGET.S
rmv5te/OP_AGET_BOOLEAN.S
rmv5te/OP_AGET_BYTE.S
rmv5te/OP_AGET_CHAR.S
rmv5te/OP_AGET_OBJECT.S
rmv5te/OP_AGET_SHORT.S
rmv5te/OP_AGET_WIDE.S
rmv5te/OP_AND_INT.S
rmv5te/OP_AND_INT_2ADDR.S
rmv5te/OP_AND_INT_LIT16.S
rmv5te/OP_AND_INT_LIT8.S
rmv5te/OP_AND_LONG.S
rmv5te/OP_AND_LONG_2ADDR.S
rmv5te/OP_APUT.S
rmv5te/OP_APUT_BOOLEAN.S
rmv5te/OP_APUT_BYTE.S
rmv5te/OP_APUT_CHAR.S
rmv5te/OP_APUT_OBJECT.S
rmv5te/OP_APUT_SHORT.S
rmv5te/OP_APUT_WIDE.S
rmv5te/OP_ARRAY_LENGTH.S
rmv5te/OP_CHECK_CAST.S
rmv5te/OP_CMPG_DOUBLE.S
rmv5te/OP_CMPG_FLOAT.S
rmv5te/OP_CMPL_DOUBLE.S
rmv5te/OP_CMPL_FLOAT.S
rmv5te/OP_CMP_LONG.S
rmv5te/OP_CONST.S
rmv5te/OP_CONST_16.S
rmv5te/OP_CONST_4.S
rmv5te/OP_CONST_CLASS.S
rmv5te/OP_CONST_HIGH16.S
rmv5te/OP_CONST_STRING.S
rmv5te/OP_CONST_STRING_JUMBO.S
rmv5te/OP_CONST_WIDE.S
rmv5te/OP_CONST_WIDE_16.S
rmv5te/OP_CONST_WIDE_32.S
rmv5te/OP_CONST_WIDE_HIGH16.S
rmv5te/OP_DIV_DOUBLE.S
rmv5te/OP_DIV_DOUBLE_2ADDR.S
rmv5te/OP_DIV_FLOAT.S
rmv5te/OP_DIV_FLOAT_2ADDR.S
rmv5te/OP_DIV_INT.S
rmv5te/OP_DIV_INT_2ADDR.S
rmv5te/OP_DIV_INT_LIT16.S
rmv5te/OP_DIV_INT_LIT8.S
rmv5te/OP_DIV_LONG.S
rmv5te/OP_DIV_LONG_2ADDR.S
rmv5te/OP_DOUBLE_TO_FLOAT.S
rmv5te/OP_DOUBLE_TO_INT.S
rmv5te/OP_DOUBLE_TO_LONG.S
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_FILLED_NEW_ARRAY_RANGE.S
rmv5te/OP_FILL_ARRAY_DATA.S
rmv5te/OP_FLOAT_TO_DOUBLE.S
rmv5te/OP_FLOAT_TO_INT.S
rmv5te/OP_FLOAT_TO_LONG.S
rmv5te/OP_GOTO.S
rmv5te/OP_GOTO_16.S
rmv5te/OP_GOTO_32.S
rmv5te/OP_IF_EQ.S
rmv5te/OP_IF_EQZ.S
rmv5te/OP_IF_GE.S
rmv5te/OP_IF_GEZ.S
rmv5te/OP_IF_GT.S
rmv5te/OP_IF_GTZ.S
rmv5te/OP_IF_LE.S
rmv5te/OP_IF_LEZ.S
rmv5te/OP_IF_LT.S
rmv5te/OP_IF_LTZ.S
rmv5te/OP_IF_NE.S
rmv5te/OP_IF_NEZ.S
rmv5te/OP_IGET.S
rmv5te/OP_IGET_BOOLEAN.S
rmv5te/OP_IGET_BYTE.S
rmv5te/OP_IGET_CHAR.S
rmv5te/OP_IGET_OBJECT.S
rmv5te/OP_IGET_OBJECT_QUICK.S
rmv5te/OP_IGET_QUICK.S
rmv5te/OP_IGET_SHORT.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IGET_WIDE_QUICK.S
rmv5te/OP_INSTANCE_OF.S
rmv5te/OP_INT_TO_BYTE.S
rmv5te/OP_INT_TO_CHAR.S
rmv5te/OP_INT_TO_DOUBLE.S
rmv5te/OP_INT_TO_FLOAT.S
rmv5te/OP_INT_TO_LONG.S
rmv5te/OP_INT_TO_SHORT.S
rmv5te/OP_INVOKE_DIRECT.S
rmv5te/OP_INVOKE_DIRECT_EMPTY.S
rmv5te/OP_INVOKE_DIRECT_RANGE.S
rmv5te/OP_INVOKE_INTERFACE.S
rmv5te/OP_INVOKE_INTERFACE_RANGE.S
rmv5te/OP_INVOKE_STATIC.S
rmv5te/OP_INVOKE_STATIC_RANGE.S
rmv5te/OP_INVOKE_SUPER.S
rmv5te/OP_INVOKE_SUPER_QUICK.S
rmv5te/OP_INVOKE_SUPER_QUICK_RANGE.S
rmv5te/OP_INVOKE_SUPER_RANGE.S
rmv5te/OP_INVOKE_VIRTUAL.S
rmv5te/OP_INVOKE_VIRTUAL_QUICK.S
rmv5te/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
rmv5te/OP_INVOKE_VIRTUAL_RANGE.S
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_BOOLEAN.S
rmv5te/OP_IPUT_BYTE.S
rmv5te/OP_IPUT_CHAR.S
rmv5te/OP_IPUT_OBJECT.S
rmv5te/OP_IPUT_OBJECT_QUICK.S
rmv5te/OP_IPUT_QUICK.S
rmv5te/OP_IPUT_SHORT.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_IPUT_WIDE_QUICK.S
rmv5te/OP_LONG_TO_DOUBLE.S
rmv5te/OP_LONG_TO_FLOAT.S
rmv5te/OP_LONG_TO_INT.S
rmv5te/OP_MONITOR_ENTER.S
rmv5te/OP_MONITOR_EXIT.S
rmv5te/OP_MOVE.S
rmv5te/OP_MOVE_16.S
rmv5te/OP_MOVE_EXCEPTION.S
rmv5te/OP_MOVE_FROM16.S
rmv5te/OP_MOVE_OBJECT.S
rmv5te/OP_MOVE_OBJECT_16.S
rmv5te/OP_MOVE_OBJECT_FROM16.S
rmv5te/OP_MOVE_RESULT.S
rmv5te/OP_MOVE_RESULT_OBJECT.S
rmv5te/OP_MOVE_RESULT_WIDE.S
rmv5te/OP_MOVE_WIDE.S
rmv5te/OP_MOVE_WIDE_16.S
rmv5te/OP_MOVE_WIDE_FROM16.S
rmv5te/OP_MUL_DOUBLE.S
rmv5te/OP_MUL_DOUBLE_2ADDR.S
rmv5te/OP_MUL_FLOAT.S
rmv5te/OP_MUL_FLOAT_2ADDR.S
rmv5te/OP_MUL_INT.S
rmv5te/OP_MUL_INT_2ADDR.S
rmv5te/OP_MUL_INT_LIT16.S
rmv5te/OP_MUL_INT_LIT8.S
rmv5te/OP_MUL_LONG.S
rmv5te/OP_MUL_LONG_2ADDR.S
rmv5te/OP_NEG_DOUBLE.S
rmv5te/OP_NEG_FLOAT.S
rmv5te/OP_NEG_INT.S
rmv5te/OP_NEG_LONG.S
rmv5te/OP_NEW_ARRAY.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_NOP.S
rmv5te/OP_NOT_INT.S
rmv5te/OP_NOT_LONG.S
rmv5te/OP_OR_INT.S
rmv5te/OP_OR_INT_2ADDR.S
rmv5te/OP_OR_INT_LIT16.S
rmv5te/OP_OR_INT_LIT8.S
rmv5te/OP_OR_LONG.S
rmv5te/OP_OR_LONG_2ADDR.S
rmv5te/OP_PACKED_SWITCH.S
rmv5te/OP_REM_DOUBLE.S
rmv5te/OP_REM_DOUBLE_2ADDR.S
rmv5te/OP_REM_FLOAT.S
rmv5te/OP_REM_FLOAT_2ADDR.S
rmv5te/OP_REM_INT.S
rmv5te/OP_REM_INT_2ADDR.S
rmv5te/OP_REM_INT_LIT16.S
rmv5te/OP_REM_INT_LIT8.S
rmv5te/OP_REM_LONG.S
rmv5te/OP_REM_LONG_2ADDR.S
rmv5te/OP_RETURN.S
rmv5te/OP_RETURN_OBJECT.S
rmv5te/OP_RETURN_VOID.S
rmv5te/OP_RETURN_WIDE.S
rmv5te/OP_RSUB_INT.S
rmv5te/OP_RSUB_INT_LIT8.S
rmv5te/OP_SGET.S
rmv5te/OP_SGET_BOOLEAN.S
rmv5te/OP_SGET_BYTE.S
rmv5te/OP_SGET_CHAR.S
rmv5te/OP_SGET_OBJECT.S
rmv5te/OP_SGET_SHORT.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SHL_INT.S
rmv5te/OP_SHL_INT_2ADDR.S
rmv5te/OP_SHL_INT_LIT8.S
rmv5te/OP_SHL_LONG.S
rmv5te/OP_SHL_LONG_2ADDR.S
rmv5te/OP_SHR_INT.S
rmv5te/OP_SHR_INT_2ADDR.S
rmv5te/OP_SHR_INT_LIT8.S
rmv5te/OP_SHR_LONG.S
rmv5te/OP_SHR_LONG_2ADDR.S
rmv5te/OP_SPARSE_SWITCH.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_BOOLEAN.S
rmv5te/OP_SPUT_BYTE.S
rmv5te/OP_SPUT_CHAR.S
rmv5te/OP_SPUT_OBJECT.S
rmv5te/OP_SPUT_SHORT.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_SUB_DOUBLE.S
rmv5te/OP_SUB_DOUBLE_2ADDR.S
rmv5te/OP_SUB_FLOAT.S
rmv5te/OP_SUB_FLOAT_2ADDR.S
rmv5te/OP_SUB_INT.S
rmv5te/OP_SUB_INT_2ADDR.S
rmv5te/OP_SUB_LONG.S
rmv5te/OP_SUB_LONG_2ADDR.S
rmv5te/OP_THROW.S
rmv5te/OP_UNUSED_3E.S
rmv5te/OP_UNUSED_3F.S
rmv5te/OP_UNUSED_40.S
rmv5te/OP_UNUSED_41.S
rmv5te/OP_UNUSED_42.S
rmv5te/OP_UNUSED_43.S
rmv5te/OP_UNUSED_73.S
rmv5te/OP_UNUSED_79.S
rmv5te/OP_UNUSED_7A.S
rmv5te/OP_UNUSED_E3.S
rmv5te/OP_UNUSED_E4.S
rmv5te/OP_UNUSED_E5.S
rmv5te/OP_UNUSED_E6.S
rmv5te/OP_UNUSED_E7.S
rmv5te/OP_UNUSED_E8.S
rmv5te/OP_UNUSED_E9.S
rmv5te/OP_UNUSED_EA.S
rmv5te/OP_UNUSED_EB.S
rmv5te/OP_UNUSED_EC.S
rmv5te/OP_UNUSED_ED.S
rmv5te/OP_UNUSED_EF.S
rmv5te/OP_UNUSED_F1.S
rmv5te/OP_UNUSED_FC.S
rmv5te/OP_UNUSED_FD.S
rmv5te/OP_UNUSED_FE.S
rmv5te/OP_UNUSED_FF.S
rmv5te/OP_USHR_INT.S
rmv5te/OP_USHR_INT_2ADDR.S
rmv5te/OP_USHR_INT_LIT8.S
rmv5te/OP_USHR_LONG.S
rmv5te/OP_USHR_LONG_2ADDR.S
rmv5te/OP_XOR_INT.S
rmv5te/OP_XOR_INT_2ADDR.S
rmv5te/OP_XOR_INT_LIT16.S
rmv5te/OP_XOR_INT_LIT8.S
rmv5te/OP_XOR_LONG.S
rmv5te/OP_XOR_LONG_2ADDR.S
rmv5te/bincmp.S
rmv5te/binop.S
rmv5te/binop2addr.S
rmv5te/binopLit16.S
rmv5te/binopLit8.S
rmv5te/binopWide.S
rmv5te/binopWide2addr.S
rmv5te/debug.c
rmv5te/entry.S
rmv5te/footer.S
rmv5te/header.S
rmv5te/platform.S
rmv5te/stub.S
rmv5te/unop.S
rmv5te/unopNarrower.S
rmv5te/unopWide.S
rmv5te/unopWider.S
rmv5te/unused.S
rmv5te/zcmp.S
/OP_ADD_DOUBLE.c
/OP_ADD_DOUBLE_2ADDR.c
/OP_ADD_FLOAT.c
/OP_ADD_FLOAT_2ADDR.c
/OP_ADD_INT.c
/OP_ADD_INT_2ADDR.c
/OP_ADD_INT_LIT16.c
/OP_ADD_INT_LIT8.c
/OP_ADD_LONG.c
/OP_ADD_LONG_2ADDR.c
/OP_AGET.c
/OP_AGET_BOOLEAN.c
/OP_AGET_BYTE.c
/OP_AGET_CHAR.c
/OP_AGET_OBJECT.c
/OP_AGET_SHORT.c
/OP_AGET_WIDE.c
/OP_AND_INT.c
/OP_AND_INT_2ADDR.c
/OP_AND_INT_LIT16.c
/OP_AND_INT_LIT8.c
/OP_AND_LONG.c
/OP_AND_LONG_2ADDR.c
/OP_APUT.c
/OP_APUT_BOOLEAN.c
/OP_APUT_BYTE.c
/OP_APUT_CHAR.c
/OP_APUT_OBJECT.c
/OP_APUT_SHORT.c
/OP_APUT_WIDE.c
/OP_ARRAY_LENGTH.c
/OP_CHECK_CAST.c
/OP_CMPG_DOUBLE.c
/OP_CMPG_FLOAT.c
/OP_CMPL_DOUBLE.c
/OP_CMPL_FLOAT.c
/OP_CMP_LONG.c
/OP_CONST.c
/OP_CONST_16.c
/OP_CONST_4.c
/OP_CONST_CLASS.c
/OP_CONST_HIGH16.c
/OP_CONST_STRING.c
/OP_CONST_STRING_JUMBO.c
/OP_CONST_WIDE.c
/OP_CONST_WIDE_16.c
/OP_CONST_WIDE_32.c
/OP_CONST_WIDE_HIGH16.c
/OP_DIV_DOUBLE.c
/OP_DIV_DOUBLE_2ADDR.c
/OP_DIV_FLOAT.c
/OP_DIV_FLOAT_2ADDR.c
/OP_DIV_INT.c
/OP_DIV_INT_2ADDR.c
/OP_DIV_INT_LIT16.c
/OP_DIV_INT_LIT8.c
/OP_DIV_LONG.c
/OP_DIV_LONG_2ADDR.c
/OP_DOUBLE_TO_FLOAT.c
/OP_DOUBLE_TO_INT.c
/OP_DOUBLE_TO_LONG.c
/OP_EXECUTE_INLINE.c
/OP_FILLED_NEW_ARRAY.c
/OP_FILLED_NEW_ARRAY_RANGE.c
/OP_FILL_ARRAY_DATA.c
/OP_FLOAT_TO_DOUBLE.c
/OP_FLOAT_TO_INT.c
/OP_FLOAT_TO_LONG.c
/OP_GOTO.c
/OP_GOTO_16.c
/OP_GOTO_32.c
/OP_IF_EQ.c
/OP_IF_EQZ.c
/OP_IF_GE.c
/OP_IF_GEZ.c
/OP_IF_GT.c
/OP_IF_GTZ.c
/OP_IF_LE.c
/OP_IF_LEZ.c
/OP_IF_LT.c
/OP_IF_LTZ.c
/OP_IF_NE.c
/OP_IF_NEZ.c
/OP_IGET.c
/OP_IGET_BOOLEAN.c
/OP_IGET_BYTE.c
/OP_IGET_CHAR.c
/OP_IGET_OBJECT.c
/OP_IGET_OBJECT_QUICK.c
/OP_IGET_QUICK.c
/OP_IGET_SHORT.c
/OP_IGET_WIDE.c
/OP_IGET_WIDE_QUICK.c
/OP_INSTANCE_OF.c
/OP_INT_TO_BYTE.c
/OP_INT_TO_CHAR.c
/OP_INT_TO_DOUBLE.c
/OP_INT_TO_FLOAT.c
/OP_INT_TO_LONG.c
/OP_INT_TO_SHORT.c
/OP_INVOKE_DIRECT.c
/OP_INVOKE_DIRECT_EMPTY.c
/OP_INVOKE_DIRECT_RANGE.c
/OP_INVOKE_INTERFACE.c
/OP_INVOKE_INTERFACE_RANGE.c
/OP_INVOKE_STATIC.c
/OP_INVOKE_STATIC_RANGE.c
/OP_INVOKE_SUPER.c
/OP_INVOKE_SUPER_QUICK.c
/OP_INVOKE_SUPER_QUICK_RANGE.c
/OP_INVOKE_SUPER_RANGE.c
/OP_INVOKE_VIRTUAL.c
/OP_INVOKE_VIRTUAL_QUICK.c
/OP_INVOKE_VIRTUAL_QUICK_RANGE.c
/OP_INVOKE_VIRTUAL_RANGE.c
/OP_IPUT.c
/OP_IPUT_BOOLEAN.c
/OP_IPUT_BYTE.c
/OP_IPUT_CHAR.c
/OP_IPUT_OBJECT.c
/OP_IPUT_OBJECT_QUICK.c
/OP_IPUT_QUICK.c
/OP_IPUT_SHORT.c
/OP_IPUT_WIDE.c
/OP_IPUT_WIDE_QUICK.c
/OP_LONG_TO_DOUBLE.c
/OP_LONG_TO_FLOAT.c
/OP_LONG_TO_INT.c
/OP_MONITOR_ENTER.c
/OP_MONITOR_EXIT.c
/OP_MOVE.c
/OP_MOVE_16.c
/OP_MOVE_EXCEPTION.c
/OP_MOVE_FROM16.c
/OP_MOVE_OBJECT.c
/OP_MOVE_OBJECT_16.c
/OP_MOVE_OBJECT_FROM16.c
/OP_MOVE_RESULT.c
/OP_MOVE_RESULT_OBJECT.c
/OP_MOVE_RESULT_WIDE.c
/OP_MOVE_WIDE.c
/OP_MOVE_WIDE_16.c
/OP_MOVE_WIDE_FROM16.c
/OP_MUL_DOUBLE.c
/OP_MUL_DOUBLE_2ADDR.c
/OP_MUL_FLOAT.c
/OP_MUL_FLOAT_2ADDR.c
/OP_MUL_INT.c
/OP_MUL_INT_2ADDR.c
/OP_MUL_INT_LIT16.c
/OP_MUL_INT_LIT8.c
/OP_MUL_LONG.c
/OP_MUL_LONG_2ADDR.c
/OP_NEG_DOUBLE.c
/OP_NEG_FLOAT.c
/OP_NEG_INT.c
/OP_NEG_LONG.c
/OP_NEW_ARRAY.c
/OP_NEW_INSTANCE.c
/OP_NOP.c
/OP_NOT_INT.c
/OP_NOT_LONG.c
/OP_OR_INT.c
/OP_OR_INT_2ADDR.c
/OP_OR_INT_LIT16.c
/OP_OR_INT_LIT8.c
/OP_OR_LONG.c
/OP_OR_LONG_2ADDR.c
/OP_PACKED_SWITCH.c
/OP_REM_DOUBLE.c
/OP_REM_DOUBLE_2ADDR.c
/OP_REM_FLOAT.c
/OP_REM_FLOAT_2ADDR.c
/OP_REM_INT.c
/OP_REM_INT_2ADDR.c
/OP_REM_INT_LIT16.c
/OP_REM_INT_LIT8.c
/OP_REM_LONG.c
/OP_REM_LONG_2ADDR.c
/OP_RETURN.c
/OP_RETURN_OBJECT.c
/OP_RETURN_VOID.c
/OP_RETURN_WIDE.c
/OP_RSUB_INT.c
/OP_RSUB_INT_LIT8.c
/OP_SGET.c
/OP_SGET_BOOLEAN.c
/OP_SGET_BYTE.c
/OP_SGET_CHAR.c
/OP_SGET_OBJECT.c
/OP_SGET_SHORT.c
/OP_SGET_WIDE.c
/OP_SHL_INT.c
/OP_SHL_INT_2ADDR.c
/OP_SHL_INT_LIT8.c
/OP_SHL_LONG.c
/OP_SHL_LONG_2ADDR.c
/OP_SHR_INT.c
/OP_SHR_INT_2ADDR.c
/OP_SHR_INT_LIT8.c
/OP_SHR_LONG.c
/OP_SHR_LONG_2ADDR.c
/OP_SPARSE_SWITCH.c
/OP_SPUT.c
/OP_SPUT_BOOLEAN.c
/OP_SPUT_BYTE.c
/OP_SPUT_CHAR.c
/OP_SPUT_OBJECT.c
/OP_SPUT_SHORT.c
/OP_SPUT_WIDE.c
/OP_SUB_DOUBLE.c
/OP_SUB_DOUBLE_2ADDR.c
/OP_SUB_FLOAT.c
/OP_SUB_FLOAT_2ADDR.c
/OP_SUB_INT.c
/OP_SUB_INT_2ADDR.c
/OP_SUB_LONG.c
/OP_SUB_LONG_2ADDR.c
/OP_THROW.c
/OP_UNUSED_3E.c
/OP_UNUSED_3F.c
/OP_UNUSED_40.c
/OP_UNUSED_41.c
/OP_UNUSED_42.c
/OP_UNUSED_43.c
/OP_UNUSED_73.c
/OP_UNUSED_79.c
/OP_UNUSED_7A.c
/OP_UNUSED_E3.c
/OP_UNUSED_E4.c
/OP_UNUSED_E5.c
/OP_UNUSED_E6.c
/OP_UNUSED_E7.c
/OP_UNUSED_E8.c
/OP_UNUSED_E9.c
/OP_UNUSED_EA.c
/OP_UNUSED_EB.c
/OP_UNUSED_EC.c
/OP_UNUSED_ED.c
/OP_UNUSED_EF.c
/OP_UNUSED_F1.c
/OP_UNUSED_FC.c
/OP_UNUSED_FD.c
/OP_UNUSED_FE.c
/OP_UNUSED_FF.c
/OP_USHR_INT.c
/OP_USHR_INT_2ADDR.c
/OP_USHR_INT_LIT8.c
/OP_USHR_LONG.c
/OP_USHR_LONG_2ADDR.c
/OP_XOR_INT.c
/OP_XOR_INT_2ADDR.c
/OP_XOR_INT_LIT16.c
/OP_XOR_INT_LIT8.c
/OP_XOR_LONG.c
/OP_XOR_LONG_2ADDR.c
/gotoTargets.c
/header.c
/opcommon.c
ommon/asm-constants.h
onfig-allstubs
onfig-armv4
onfig-armv5te
onfig-portdbg
onfig-portstd
onfig-x86
stubs/enddefs.c
stubs/entry.c
stubs/stubdefs.c
en-mterp.py
ut/InterpAsm-allstubs.S
ut/InterpAsm-armv4.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4.c
ut/InterpC-armv5te.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/debug.c
ortable/enddefs.c
ortable/entry.c
ortable/portdbg.c
ortable/portstd.c
ortable/stubdefs.c
ebuild.sh
86/OP_ADD_DOUBLE.S
86/OP_ADD_DOUBLE_2ADDR.S
86/OP_ADD_FLOAT.S
86/OP_ADD_FLOAT_2ADDR.S
86/OP_ADD_INT.S
86/OP_ADD_INT_2ADDR.S
86/OP_ADD_INT_LIT16.S
86/OP_ADD_INT_LIT8.S
86/OP_ADD_LONG.S
86/OP_ADD_LONG_2ADDR.S
86/OP_AGET.S
86/OP_AGET_BOOLEAN.S
86/OP_AGET_BYTE.S
86/OP_AGET_CHAR.S
86/OP_AGET_OBJECT.S
86/OP_AGET_SHORT.S
86/OP_AGET_WIDE.S
86/OP_AND_INT.S
86/OP_AND_INT_2ADDR.S
86/OP_AND_INT_LIT16.S
86/OP_AND_INT_LIT8.S
86/OP_AND_LONG.S
86/OP_AND_LONG_2ADDR.S
86/OP_APUT.S
86/OP_APUT_BOOLEAN.S
86/OP_APUT_BYTE.S
86/OP_APUT_CHAR.S
86/OP_APUT_OBJECT.S
86/OP_APUT_SHORT.S
86/OP_APUT_WIDE.S
86/OP_ARRAY_LENGTH.S
86/OP_CHECK_CAST.S
86/OP_CMPG_DOUBLE.S
86/OP_CMPG_FLOAT.S
86/OP_CMPL_DOUBLE.S
86/OP_CMPL_FLOAT.S
86/OP_CMP_LONG.S
86/OP_CONST.S
86/OP_CONST_16.S
86/OP_CONST_4.S
86/OP_CONST_CLASS.S
86/OP_CONST_HIGH16.S
86/OP_CONST_STRING.S
86/OP_CONST_STRING_JUMBO.S
86/OP_CONST_WIDE.S
86/OP_CONST_WIDE_16.S
86/OP_CONST_WIDE_32.S
86/OP_CONST_WIDE_HIGH16.S
86/OP_DIV_DOUBLE.S
86/OP_DIV_DOUBLE_2ADDR.S
86/OP_DIV_FLOAT.S
86/OP_DIV_FLOAT_2ADDR.S
86/OP_DIV_INT.S
86/OP_DIV_INT_2ADDR.S
86/OP_DIV_INT_LIT16.S
86/OP_DIV_INT_LIT8.S
86/OP_DIV_LONG.S
86/OP_DIV_LONG_2ADDR.S
86/OP_DOUBLE_TO_FLOAT.S
86/OP_DOUBLE_TO_INT.S
86/OP_DOUBLE_TO_LONG.S
86/OP_EXECUTE_INLINE.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_FILLED_NEW_ARRAY_RANGE.S
86/OP_FILL_ARRAY_DATA.S
86/OP_FLOAT_TO_DOUBLE.S
86/OP_FLOAT_TO_INT.S
86/OP_FLOAT_TO_LONG.S
86/OP_GOTO.S
86/OP_GOTO_16.S
86/OP_GOTO_32.S
86/OP_IF_EQ.S
86/OP_IF_EQZ.S
86/OP_IF_GE.S
86/OP_IF_GEZ.S
86/OP_IF_GT.S
86/OP_IF_GTZ.S
86/OP_IF_LE.S
86/OP_IF_LEZ.S
86/OP_IF_LT.S
86/OP_IF_LTZ.S
86/OP_IF_NE.S
86/OP_IF_NEZ.S
86/OP_IGET.S
86/OP_IGET_BOOLEAN.S
86/OP_IGET_BYTE.S
86/OP_IGET_CHAR.S
86/OP_IGET_OBJECT.S
86/OP_IGET_OBJECT_QUICK.S
86/OP_IGET_QUICK.S
86/OP_IGET_SHORT.S
86/OP_IGET_WIDE.S
86/OP_IGET_WIDE_QUICK.S
86/OP_INSTANCE_OF.S
86/OP_INT_TO_BYTE.S
86/OP_INT_TO_CHAR.S
86/OP_INT_TO_DOUBLE.S
86/OP_INT_TO_FLOAT.S
86/OP_INT_TO_LONG.S
86/OP_INT_TO_SHORT.S
86/OP_INVOKE_DIRECT.S
86/OP_INVOKE_DIRECT_EMPTY.S
86/OP_INVOKE_DIRECT_RANGE.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_INTERFACE_RANGE.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_STATIC_RANGE.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_QUICK.S
86/OP_INVOKE_SUPER_QUICK_RANGE.S
86/OP_INVOKE_SUPER_RANGE.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_QUICK.S
86/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
86/OP_INVOKE_VIRTUAL_RANGE.S
86/OP_IPUT.S
86/OP_IPUT_BOOLEAN.S
86/OP_IPUT_BYTE.S
86/OP_IPUT_CHAR.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_IPUT_QUICK.S
86/OP_IPUT_SHORT.S
86/OP_IPUT_WIDE.S
86/OP_IPUT_WIDE_QUICK.S
86/OP_LONG_TO_DOUBLE.S
86/OP_LONG_TO_FLOAT.S
86/OP_LONG_TO_INT.S
86/OP_MONITOR_ENTER.S
86/OP_MONITOR_EXIT.S
86/OP_MOVE.S
86/OP_MOVE_16.S
86/OP_MOVE_EXCEPTION.S
86/OP_MOVE_FROM16.S
86/OP_MOVE_OBJECT.S
86/OP_MOVE_OBJECT_16.S
86/OP_MOVE_OBJECT_FROM16.S
86/OP_MOVE_RESULT.S
86/OP_MOVE_RESULT_OBJECT.S
86/OP_MOVE_RESULT_WIDE.S
86/OP_MOVE_WIDE.S
86/OP_MOVE_WIDE_16.S
86/OP_MOVE_WIDE_FROM16.S
86/OP_MUL_DOUBLE.S
86/OP_MUL_DOUBLE_2ADDR.S
86/OP_MUL_FLOAT.S
86/OP_MUL_FLOAT_2ADDR.S
86/OP_MUL_INT.S
86/OP_MUL_INT_2ADDR.S
86/OP_MUL_INT_LIT16.S
86/OP_MUL_INT_LIT8.S
86/OP_MUL_LONG.S
86/OP_MUL_LONG_2ADDR.S
86/OP_NEG_DOUBLE.S
86/OP_NEG_FLOAT.S
86/OP_NEG_INT.S
86/OP_NEG_LONG.S
86/OP_NEW_ARRAY.S
86/OP_NEW_INSTANCE.S
86/OP_NOP.S
86/OP_NOT_INT.S
86/OP_NOT_LONG.S
86/OP_OR_INT.S
86/OP_OR_INT_2ADDR.S
86/OP_OR_INT_LIT16.S
86/OP_OR_INT_LIT8.S
86/OP_OR_LONG.S
86/OP_OR_LONG_2ADDR.S
86/OP_PACKED_SWITCH.S
86/OP_REM_DOUBLE.S
86/OP_REM_DOUBLE_2ADDR.S
86/OP_REM_FLOAT.S
86/OP_REM_FLOAT_2ADDR.S
86/OP_REM_INT.S
86/OP_REM_INT_2ADDR.S
86/OP_REM_INT_LIT16.S
86/OP_REM_INT_LIT8.S
86/OP_REM_LONG.S
86/OP_REM_LONG_2ADDR.S
86/OP_RETURN.S
86/OP_RETURN_OBJECT.S
86/OP_RETURN_VOID.S
86/OP_RETURN_WIDE.S
86/OP_RSUB_INT.S
86/OP_RSUB_INT_LIT8.S
86/OP_SGET.S
86/OP_SGET_BOOLEAN.S
86/OP_SGET_BYTE.S
86/OP_SGET_CHAR.S
86/OP_SGET_OBJECT.S
86/OP_SGET_SHORT.S
86/OP_SGET_WIDE.S
86/OP_SHL_INT.S
86/OP_SHL_INT_2ADDR.S
86/OP_SHL_INT_LIT8.S
86/OP_SHL_LONG.S
86/OP_SHL_LONG_2ADDR.S
86/OP_SHR_INT.S
86/OP_SHR_INT_2ADDR.S
86/OP_SHR_INT_LIT8.S
86/OP_SHR_LONG.S
86/OP_SHR_LONG_2ADDR.S
86/OP_SPARSE_SWITCH.S
86/OP_SPUT.S
86/OP_SPUT_BOOLEAN.S
86/OP_SPUT_BYTE.S
86/OP_SPUT_CHAR.S
86/OP_SPUT_OBJECT.S
86/OP_SPUT_SHORT.S
86/OP_SPUT_WIDE.S
86/OP_SUB_DOUBLE.S
86/OP_SUB_DOUBLE_2ADDR.S
86/OP_SUB_FLOAT.S
86/OP_SUB_FLOAT_2ADDR.S
86/OP_SUB_INT.S
86/OP_SUB_INT_2ADDR.S
86/OP_SUB_LONG.S
86/OP_SUB_LONG_2ADDR.S
86/OP_THROW.S
86/OP_UNUSED_3E.S
86/OP_UNUSED_3F.S
86/OP_UNUSED_40.S
86/OP_UNUSED_41.S
86/OP_UNUSED_42.S
86/OP_UNUSED_43.S
86/OP_UNUSED_73.S
86/OP_UNUSED_79.S
86/OP_UNUSED_7A.S
86/OP_UNUSED_E3.S
86/OP_UNUSED_E4.S
86/OP_UNUSED_E5.S
86/OP_UNUSED_E6.S
86/OP_UNUSED_E7.S
86/OP_UNUSED_E8.S
86/OP_UNUSED_E9.S
86/OP_UNUSED_EA.S
86/OP_UNUSED_EB.S
86/OP_UNUSED_EC.S
86/OP_UNUSED_ED.S
86/OP_UNUSED_EF.S
86/OP_UNUSED_F1.S
86/OP_UNUSED_FC.S
86/OP_UNUSED_FD.S
86/OP_UNUSED_FE.S
86/OP_UNUSED_FF.S
86/OP_USHR_INT.S
86/OP_USHR_INT_2ADDR.S
86/OP_USHR_INT_LIT8.S
86/OP_USHR_LONG.S
86/OP_USHR_LONG_2ADDR.S
86/OP_XOR_INT.S
86/OP_XOR_INT_2ADDR.S
86/OP_XOR_INT_LIT16.S
86/OP_XOR_INT_LIT8.S
86/OP_XOR_LONG.S
86/OP_XOR_LONG_2ADDR.S
86/bincmp.S
86/bindiv.S
86/bindiv2addr.S
86/bindivLit16.S
86/bindivLit8.S
86/binflop.S
86/binflop2addr.S
86/binop.S
86/binop1.S
86/binop2addr.S
86/binopLit16.S
86/binopLit8.S
86/binopWide.S
86/binopWide2addr.S
86/cvtfp_int.S
86/entry.S
86/footer.S
86/fpcvt.S
86/header.S
86/shop2addr.S
86/stub.S
86/unop.S
86/unopWide.S
86/unused.S
86/zcmp.S
|
f72d5de56a522ac3be03873bdde26f23a5eeeb3c |
04-Mar-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //depot/cupcake/@135843
akefile-mterp
terp.c
terp.h
OTES.txt
EADME.txt
rmv4/OP_AGET_WIDE.S
rmv4/OP_APUT_WIDE.S
rmv4/OP_IGET_WIDE.S
rmv4/OP_IGET_WIDE_QUICK.S
rmv4/OP_IPUT_WIDE.S
rmv4/OP_IPUT_WIDE_QUICK.S
rmv4/OP_SGET_WIDE.S
rmv4/OP_SPUT_WIDE.S
rmv4/platform.S
rmv5te/OP_ADD_DOUBLE.S
rmv5te/OP_ADD_DOUBLE_2ADDR.S
rmv5te/OP_ADD_FLOAT.S
rmv5te/OP_ADD_FLOAT_2ADDR.S
rmv5te/OP_ADD_INT.S
rmv5te/OP_ADD_INT_2ADDR.S
rmv5te/OP_ADD_INT_LIT16.S
rmv5te/OP_ADD_INT_LIT8.S
rmv5te/OP_ADD_LONG.S
rmv5te/OP_ADD_LONG_2ADDR.S
rmv5te/OP_AGET.S
rmv5te/OP_AGET_BOOLEAN.S
rmv5te/OP_AGET_BYTE.S
rmv5te/OP_AGET_CHAR.S
rmv5te/OP_AGET_OBJECT.S
rmv5te/OP_AGET_SHORT.S
rmv5te/OP_AGET_WIDE.S
rmv5te/OP_AND_INT.S
rmv5te/OP_AND_INT_2ADDR.S
rmv5te/OP_AND_INT_LIT16.S
rmv5te/OP_AND_INT_LIT8.S
rmv5te/OP_AND_LONG.S
rmv5te/OP_AND_LONG_2ADDR.S
rmv5te/OP_APUT.S
rmv5te/OP_APUT_BOOLEAN.S
rmv5te/OP_APUT_BYTE.S
rmv5te/OP_APUT_CHAR.S
rmv5te/OP_APUT_OBJECT.S
rmv5te/OP_APUT_SHORT.S
rmv5te/OP_APUT_WIDE.S
rmv5te/OP_ARRAY_LENGTH.S
rmv5te/OP_CHECK_CAST.S
rmv5te/OP_CMPG_DOUBLE.S
rmv5te/OP_CMPG_FLOAT.S
rmv5te/OP_CMPL_DOUBLE.S
rmv5te/OP_CMPL_FLOAT.S
rmv5te/OP_CMP_LONG.S
rmv5te/OP_CONST.S
rmv5te/OP_CONST_16.S
rmv5te/OP_CONST_4.S
rmv5te/OP_CONST_CLASS.S
rmv5te/OP_CONST_HIGH16.S
rmv5te/OP_CONST_STRING.S
rmv5te/OP_CONST_STRING_JUMBO.S
rmv5te/OP_CONST_WIDE.S
rmv5te/OP_CONST_WIDE_16.S
rmv5te/OP_CONST_WIDE_32.S
rmv5te/OP_CONST_WIDE_HIGH16.S
rmv5te/OP_DIV_DOUBLE.S
rmv5te/OP_DIV_DOUBLE_2ADDR.S
rmv5te/OP_DIV_FLOAT.S
rmv5te/OP_DIV_FLOAT_2ADDR.S
rmv5te/OP_DIV_INT.S
rmv5te/OP_DIV_INT_2ADDR.S
rmv5te/OP_DIV_INT_LIT16.S
rmv5te/OP_DIV_INT_LIT8.S
rmv5te/OP_DIV_LONG.S
rmv5te/OP_DIV_LONG_2ADDR.S
rmv5te/OP_DOUBLE_TO_FLOAT.S
rmv5te/OP_DOUBLE_TO_INT.S
rmv5te/OP_DOUBLE_TO_LONG.S
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_FILLED_NEW_ARRAY_RANGE.S
rmv5te/OP_FILL_ARRAY_DATA.S
rmv5te/OP_FLOAT_TO_DOUBLE.S
rmv5te/OP_FLOAT_TO_INT.S
rmv5te/OP_FLOAT_TO_LONG.S
rmv5te/OP_GOTO.S
rmv5te/OP_GOTO_16.S
rmv5te/OP_GOTO_32.S
rmv5te/OP_IF_EQ.S
rmv5te/OP_IF_EQZ.S
rmv5te/OP_IF_GE.S
rmv5te/OP_IF_GEZ.S
rmv5te/OP_IF_GT.S
rmv5te/OP_IF_GTZ.S
rmv5te/OP_IF_LE.S
rmv5te/OP_IF_LEZ.S
rmv5te/OP_IF_LT.S
rmv5te/OP_IF_LTZ.S
rmv5te/OP_IF_NE.S
rmv5te/OP_IF_NEZ.S
rmv5te/OP_IGET.S
rmv5te/OP_IGET_BOOLEAN.S
rmv5te/OP_IGET_BYTE.S
rmv5te/OP_IGET_CHAR.S
rmv5te/OP_IGET_OBJECT.S
rmv5te/OP_IGET_OBJECT_QUICK.S
rmv5te/OP_IGET_QUICK.S
rmv5te/OP_IGET_SHORT.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IGET_WIDE_QUICK.S
rmv5te/OP_INSTANCE_OF.S
rmv5te/OP_INT_TO_BYTE.S
rmv5te/OP_INT_TO_CHAR.S
rmv5te/OP_INT_TO_DOUBLE.S
rmv5te/OP_INT_TO_FLOAT.S
rmv5te/OP_INT_TO_LONG.S
rmv5te/OP_INT_TO_SHORT.S
rmv5te/OP_INVOKE_DIRECT.S
rmv5te/OP_INVOKE_DIRECT_EMPTY.S
rmv5te/OP_INVOKE_DIRECT_RANGE.S
rmv5te/OP_INVOKE_INTERFACE.S
rmv5te/OP_INVOKE_INTERFACE_RANGE.S
rmv5te/OP_INVOKE_STATIC.S
rmv5te/OP_INVOKE_STATIC_RANGE.S
rmv5te/OP_INVOKE_SUPER.S
rmv5te/OP_INVOKE_SUPER_QUICK.S
rmv5te/OP_INVOKE_SUPER_QUICK_RANGE.S
rmv5te/OP_INVOKE_SUPER_RANGE.S
rmv5te/OP_INVOKE_VIRTUAL.S
rmv5te/OP_INVOKE_VIRTUAL_QUICK.S
rmv5te/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
rmv5te/OP_INVOKE_VIRTUAL_RANGE.S
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_BOOLEAN.S
rmv5te/OP_IPUT_BYTE.S
rmv5te/OP_IPUT_CHAR.S
rmv5te/OP_IPUT_OBJECT.S
rmv5te/OP_IPUT_OBJECT_QUICK.S
rmv5te/OP_IPUT_QUICK.S
rmv5te/OP_IPUT_SHORT.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_IPUT_WIDE_QUICK.S
rmv5te/OP_LONG_TO_DOUBLE.S
rmv5te/OP_LONG_TO_FLOAT.S
rmv5te/OP_LONG_TO_INT.S
rmv5te/OP_MONITOR_ENTER.S
rmv5te/OP_MONITOR_EXIT.S
rmv5te/OP_MOVE.S
rmv5te/OP_MOVE_16.S
rmv5te/OP_MOVE_EXCEPTION.S
rmv5te/OP_MOVE_FROM16.S
rmv5te/OP_MOVE_OBJECT.S
rmv5te/OP_MOVE_OBJECT_16.S
rmv5te/OP_MOVE_OBJECT_FROM16.S
rmv5te/OP_MOVE_RESULT.S
rmv5te/OP_MOVE_RESULT_OBJECT.S
rmv5te/OP_MOVE_RESULT_WIDE.S
rmv5te/OP_MOVE_WIDE.S
rmv5te/OP_MOVE_WIDE_16.S
rmv5te/OP_MOVE_WIDE_FROM16.S
rmv5te/OP_MUL_DOUBLE.S
rmv5te/OP_MUL_DOUBLE_2ADDR.S
rmv5te/OP_MUL_FLOAT.S
rmv5te/OP_MUL_FLOAT_2ADDR.S
rmv5te/OP_MUL_INT.S
rmv5te/OP_MUL_INT_2ADDR.S
rmv5te/OP_MUL_INT_LIT16.S
rmv5te/OP_MUL_INT_LIT8.S
rmv5te/OP_MUL_LONG.S
rmv5te/OP_MUL_LONG_2ADDR.S
rmv5te/OP_NEG_DOUBLE.S
rmv5te/OP_NEG_FLOAT.S
rmv5te/OP_NEG_INT.S
rmv5te/OP_NEG_LONG.S
rmv5te/OP_NEW_ARRAY.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_NOP.S
rmv5te/OP_NOT_INT.S
rmv5te/OP_NOT_LONG.S
rmv5te/OP_OR_INT.S
rmv5te/OP_OR_INT_2ADDR.S
rmv5te/OP_OR_INT_LIT16.S
rmv5te/OP_OR_INT_LIT8.S
rmv5te/OP_OR_LONG.S
rmv5te/OP_OR_LONG_2ADDR.S
rmv5te/OP_PACKED_SWITCH.S
rmv5te/OP_REM_DOUBLE.S
rmv5te/OP_REM_DOUBLE_2ADDR.S
rmv5te/OP_REM_FLOAT.S
rmv5te/OP_REM_FLOAT_2ADDR.S
rmv5te/OP_REM_INT.S
rmv5te/OP_REM_INT_2ADDR.S
rmv5te/OP_REM_INT_LIT16.S
rmv5te/OP_REM_INT_LIT8.S
rmv5te/OP_REM_LONG.S
rmv5te/OP_REM_LONG_2ADDR.S
rmv5te/OP_RETURN.S
rmv5te/OP_RETURN_OBJECT.S
rmv5te/OP_RETURN_VOID.S
rmv5te/OP_RETURN_WIDE.S
rmv5te/OP_RSUB_INT.S
rmv5te/OP_RSUB_INT_LIT8.S
rmv5te/OP_SGET.S
rmv5te/OP_SGET_BOOLEAN.S
rmv5te/OP_SGET_BYTE.S
rmv5te/OP_SGET_CHAR.S
rmv5te/OP_SGET_OBJECT.S
rmv5te/OP_SGET_SHORT.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SHL_INT.S
rmv5te/OP_SHL_INT_2ADDR.S
rmv5te/OP_SHL_INT_LIT8.S
rmv5te/OP_SHL_LONG.S
rmv5te/OP_SHL_LONG_2ADDR.S
rmv5te/OP_SHR_INT.S
rmv5te/OP_SHR_INT_2ADDR.S
rmv5te/OP_SHR_INT_LIT8.S
rmv5te/OP_SHR_LONG.S
rmv5te/OP_SHR_LONG_2ADDR.S
rmv5te/OP_SPARSE_SWITCH.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_BOOLEAN.S
rmv5te/OP_SPUT_BYTE.S
rmv5te/OP_SPUT_CHAR.S
rmv5te/OP_SPUT_OBJECT.S
rmv5te/OP_SPUT_SHORT.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_SUB_DOUBLE.S
rmv5te/OP_SUB_DOUBLE_2ADDR.S
rmv5te/OP_SUB_FLOAT.S
rmv5te/OP_SUB_FLOAT_2ADDR.S
rmv5te/OP_SUB_INT.S
rmv5te/OP_SUB_INT_2ADDR.S
rmv5te/OP_SUB_LONG.S
rmv5te/OP_SUB_LONG_2ADDR.S
rmv5te/OP_THROW.S
rmv5te/OP_UNUSED_3E.S
rmv5te/OP_UNUSED_3F.S
rmv5te/OP_UNUSED_40.S
rmv5te/OP_UNUSED_41.S
rmv5te/OP_UNUSED_42.S
rmv5te/OP_UNUSED_43.S
rmv5te/OP_UNUSED_73.S
rmv5te/OP_UNUSED_79.S
rmv5te/OP_UNUSED_7A.S
rmv5te/OP_UNUSED_E3.S
rmv5te/OP_UNUSED_E4.S
rmv5te/OP_UNUSED_E5.S
rmv5te/OP_UNUSED_E6.S
rmv5te/OP_UNUSED_E7.S
rmv5te/OP_UNUSED_E8.S
rmv5te/OP_UNUSED_E9.S
rmv5te/OP_UNUSED_EA.S
rmv5te/OP_UNUSED_EB.S
rmv5te/OP_UNUSED_EC.S
rmv5te/OP_UNUSED_ED.S
rmv5te/OP_UNUSED_EF.S
rmv5te/OP_UNUSED_F1.S
rmv5te/OP_UNUSED_FC.S
rmv5te/OP_UNUSED_FD.S
rmv5te/OP_UNUSED_FE.S
rmv5te/OP_UNUSED_FF.S
rmv5te/OP_USHR_INT.S
rmv5te/OP_USHR_INT_2ADDR.S
rmv5te/OP_USHR_INT_LIT8.S
rmv5te/OP_USHR_LONG.S
rmv5te/OP_USHR_LONG_2ADDR.S
rmv5te/OP_XOR_INT.S
rmv5te/OP_XOR_INT_2ADDR.S
rmv5te/OP_XOR_INT_LIT16.S
rmv5te/OP_XOR_INT_LIT8.S
rmv5te/OP_XOR_LONG.S
rmv5te/OP_XOR_LONG_2ADDR.S
rmv5te/bincmp.S
rmv5te/binop.S
rmv5te/binop2addr.S
rmv5te/binopLit16.S
rmv5te/binopLit8.S
rmv5te/binopWide.S
rmv5te/binopWide2addr.S
rmv5te/debug.c
rmv5te/entry.S
rmv5te/footer.S
rmv5te/header.S
rmv5te/platform.S
rmv5te/stub.S
rmv5te/unop.S
rmv5te/unopNarrower.S
rmv5te/unopWide.S
rmv5te/unopWider.S
rmv5te/unused.S
rmv5te/zcmp.S
/OP_ADD_DOUBLE.c
/OP_ADD_DOUBLE_2ADDR.c
/OP_ADD_FLOAT.c
/OP_ADD_FLOAT_2ADDR.c
/OP_ADD_INT.c
/OP_ADD_INT_2ADDR.c
/OP_ADD_INT_LIT16.c
/OP_ADD_INT_LIT8.c
/OP_ADD_LONG.c
/OP_ADD_LONG_2ADDR.c
/OP_AGET.c
/OP_AGET_BOOLEAN.c
/OP_AGET_BYTE.c
/OP_AGET_CHAR.c
/OP_AGET_OBJECT.c
/OP_AGET_SHORT.c
/OP_AGET_WIDE.c
/OP_AND_INT.c
/OP_AND_INT_2ADDR.c
/OP_AND_INT_LIT16.c
/OP_AND_INT_LIT8.c
/OP_AND_LONG.c
/OP_AND_LONG_2ADDR.c
/OP_APUT.c
/OP_APUT_BOOLEAN.c
/OP_APUT_BYTE.c
/OP_APUT_CHAR.c
/OP_APUT_OBJECT.c
/OP_APUT_SHORT.c
/OP_APUT_WIDE.c
/OP_ARRAY_LENGTH.c
/OP_CHECK_CAST.c
/OP_CMPG_DOUBLE.c
/OP_CMPG_FLOAT.c
/OP_CMPL_DOUBLE.c
/OP_CMPL_FLOAT.c
/OP_CMP_LONG.c
/OP_CONST.c
/OP_CONST_16.c
/OP_CONST_4.c
/OP_CONST_CLASS.c
/OP_CONST_HIGH16.c
/OP_CONST_STRING.c
/OP_CONST_STRING_JUMBO.c
/OP_CONST_WIDE.c
/OP_CONST_WIDE_16.c
/OP_CONST_WIDE_32.c
/OP_CONST_WIDE_HIGH16.c
/OP_DIV_DOUBLE.c
/OP_DIV_DOUBLE_2ADDR.c
/OP_DIV_FLOAT.c
/OP_DIV_FLOAT_2ADDR.c
/OP_DIV_INT.c
/OP_DIV_INT_2ADDR.c
/OP_DIV_INT_LIT16.c
/OP_DIV_INT_LIT8.c
/OP_DIV_LONG.c
/OP_DIV_LONG_2ADDR.c
/OP_DOUBLE_TO_FLOAT.c
/OP_DOUBLE_TO_INT.c
/OP_DOUBLE_TO_LONG.c
/OP_EXECUTE_INLINE.c
/OP_FILLED_NEW_ARRAY.c
/OP_FILLED_NEW_ARRAY_RANGE.c
/OP_FILL_ARRAY_DATA.c
/OP_FLOAT_TO_DOUBLE.c
/OP_FLOAT_TO_INT.c
/OP_FLOAT_TO_LONG.c
/OP_GOTO.c
/OP_GOTO_16.c
/OP_GOTO_32.c
/OP_IF_EQ.c
/OP_IF_EQZ.c
/OP_IF_GE.c
/OP_IF_GEZ.c
/OP_IF_GT.c
/OP_IF_GTZ.c
/OP_IF_LE.c
/OP_IF_LEZ.c
/OP_IF_LT.c
/OP_IF_LTZ.c
/OP_IF_NE.c
/OP_IF_NEZ.c
/OP_IGET.c
/OP_IGET_BOOLEAN.c
/OP_IGET_BYTE.c
/OP_IGET_CHAR.c
/OP_IGET_OBJECT.c
/OP_IGET_OBJECT_QUICK.c
/OP_IGET_QUICK.c
/OP_IGET_SHORT.c
/OP_IGET_WIDE.c
/OP_IGET_WIDE_QUICK.c
/OP_INSTANCE_OF.c
/OP_INT_TO_BYTE.c
/OP_INT_TO_CHAR.c
/OP_INT_TO_DOUBLE.c
/OP_INT_TO_FLOAT.c
/OP_INT_TO_LONG.c
/OP_INT_TO_SHORT.c
/OP_INVOKE_DIRECT.c
/OP_INVOKE_DIRECT_EMPTY.c
/OP_INVOKE_DIRECT_RANGE.c
/OP_INVOKE_INTERFACE.c
/OP_INVOKE_INTERFACE_RANGE.c
/OP_INVOKE_STATIC.c
/OP_INVOKE_STATIC_RANGE.c
/OP_INVOKE_SUPER.c
/OP_INVOKE_SUPER_QUICK.c
/OP_INVOKE_SUPER_QUICK_RANGE.c
/OP_INVOKE_SUPER_RANGE.c
/OP_INVOKE_VIRTUAL.c
/OP_INVOKE_VIRTUAL_QUICK.c
/OP_INVOKE_VIRTUAL_QUICK_RANGE.c
/OP_INVOKE_VIRTUAL_RANGE.c
/OP_IPUT.c
/OP_IPUT_BOOLEAN.c
/OP_IPUT_BYTE.c
/OP_IPUT_CHAR.c
/OP_IPUT_OBJECT.c
/OP_IPUT_OBJECT_QUICK.c
/OP_IPUT_QUICK.c
/OP_IPUT_SHORT.c
/OP_IPUT_WIDE.c
/OP_IPUT_WIDE_QUICK.c
/OP_LONG_TO_DOUBLE.c
/OP_LONG_TO_FLOAT.c
/OP_LONG_TO_INT.c
/OP_MONITOR_ENTER.c
/OP_MONITOR_EXIT.c
/OP_MOVE.c
/OP_MOVE_16.c
/OP_MOVE_EXCEPTION.c
/OP_MOVE_FROM16.c
/OP_MOVE_OBJECT.c
/OP_MOVE_OBJECT_16.c
/OP_MOVE_OBJECT_FROM16.c
/OP_MOVE_RESULT.c
/OP_MOVE_RESULT_OBJECT.c
/OP_MOVE_RESULT_WIDE.c
/OP_MOVE_WIDE.c
/OP_MOVE_WIDE_16.c
/OP_MOVE_WIDE_FROM16.c
/OP_MUL_DOUBLE.c
/OP_MUL_DOUBLE_2ADDR.c
/OP_MUL_FLOAT.c
/OP_MUL_FLOAT_2ADDR.c
/OP_MUL_INT.c
/OP_MUL_INT_2ADDR.c
/OP_MUL_INT_LIT16.c
/OP_MUL_INT_LIT8.c
/OP_MUL_LONG.c
/OP_MUL_LONG_2ADDR.c
/OP_NEG_DOUBLE.c
/OP_NEG_FLOAT.c
/OP_NEG_INT.c
/OP_NEG_LONG.c
/OP_NEW_ARRAY.c
/OP_NEW_INSTANCE.c
/OP_NOP.c
/OP_NOT_INT.c
/OP_NOT_LONG.c
/OP_OR_INT.c
/OP_OR_INT_2ADDR.c
/OP_OR_INT_LIT16.c
/OP_OR_INT_LIT8.c
/OP_OR_LONG.c
/OP_OR_LONG_2ADDR.c
/OP_PACKED_SWITCH.c
/OP_REM_DOUBLE.c
/OP_REM_DOUBLE_2ADDR.c
/OP_REM_FLOAT.c
/OP_REM_FLOAT_2ADDR.c
/OP_REM_INT.c
/OP_REM_INT_2ADDR.c
/OP_REM_INT_LIT16.c
/OP_REM_INT_LIT8.c
/OP_REM_LONG.c
/OP_REM_LONG_2ADDR.c
/OP_RETURN.c
/OP_RETURN_OBJECT.c
/OP_RETURN_VOID.c
/OP_RETURN_WIDE.c
/OP_RSUB_INT.c
/OP_RSUB_INT_LIT8.c
/OP_SGET.c
/OP_SGET_BOOLEAN.c
/OP_SGET_BYTE.c
/OP_SGET_CHAR.c
/OP_SGET_OBJECT.c
/OP_SGET_SHORT.c
/OP_SGET_WIDE.c
/OP_SHL_INT.c
/OP_SHL_INT_2ADDR.c
/OP_SHL_INT_LIT8.c
/OP_SHL_LONG.c
/OP_SHL_LONG_2ADDR.c
/OP_SHR_INT.c
/OP_SHR_INT_2ADDR.c
/OP_SHR_INT_LIT8.c
/OP_SHR_LONG.c
/OP_SHR_LONG_2ADDR.c
/OP_SPARSE_SWITCH.c
/OP_SPUT.c
/OP_SPUT_BOOLEAN.c
/OP_SPUT_BYTE.c
/OP_SPUT_CHAR.c
/OP_SPUT_OBJECT.c
/OP_SPUT_SHORT.c
/OP_SPUT_WIDE.c
/OP_SUB_DOUBLE.c
/OP_SUB_DOUBLE_2ADDR.c
/OP_SUB_FLOAT.c
/OP_SUB_FLOAT_2ADDR.c
/OP_SUB_INT.c
/OP_SUB_INT_2ADDR.c
/OP_SUB_LONG.c
/OP_SUB_LONG_2ADDR.c
/OP_THROW.c
/OP_UNUSED_3E.c
/OP_UNUSED_3F.c
/OP_UNUSED_40.c
/OP_UNUSED_41.c
/OP_UNUSED_42.c
/OP_UNUSED_43.c
/OP_UNUSED_73.c
/OP_UNUSED_79.c
/OP_UNUSED_7A.c
/OP_UNUSED_E3.c
/OP_UNUSED_E4.c
/OP_UNUSED_E5.c
/OP_UNUSED_E6.c
/OP_UNUSED_E7.c
/OP_UNUSED_E8.c
/OP_UNUSED_E9.c
/OP_UNUSED_EA.c
/OP_UNUSED_EB.c
/OP_UNUSED_EC.c
/OP_UNUSED_ED.c
/OP_UNUSED_EF.c
/OP_UNUSED_F1.c
/OP_UNUSED_FC.c
/OP_UNUSED_FD.c
/OP_UNUSED_FE.c
/OP_UNUSED_FF.c
/OP_USHR_INT.c
/OP_USHR_INT_2ADDR.c
/OP_USHR_INT_LIT8.c
/OP_USHR_LONG.c
/OP_USHR_LONG_2ADDR.c
/OP_XOR_INT.c
/OP_XOR_INT_2ADDR.c
/OP_XOR_INT_LIT16.c
/OP_XOR_INT_LIT8.c
/OP_XOR_LONG.c
/OP_XOR_LONG_2ADDR.c
/gotoTargets.c
/header.c
/opcommon.c
ommon/asm-constants.h
onfig-allstubs
onfig-armv4
onfig-armv5te
onfig-portdbg
onfig-portstd
onfig-x86
stubs/enddefs.c
stubs/entry.c
stubs/stubdefs.c
en-mterp.py
ut/InterpAsm-allstubs.S
ut/InterpAsm-armv4.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4.c
ut/InterpC-armv5te.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/debug.c
ortable/enddefs.c
ortable/entry.c
ortable/portdbg.c
ortable/portstd.c
ortable/stubdefs.c
ebuild.sh
86/OP_ADD_DOUBLE.S
86/OP_ADD_DOUBLE_2ADDR.S
86/OP_ADD_FLOAT.S
86/OP_ADD_FLOAT_2ADDR.S
86/OP_ADD_INT.S
86/OP_ADD_INT_2ADDR.S
86/OP_ADD_INT_LIT16.S
86/OP_ADD_INT_LIT8.S
86/OP_ADD_LONG.S
86/OP_ADD_LONG_2ADDR.S
86/OP_AGET.S
86/OP_AGET_BOOLEAN.S
86/OP_AGET_BYTE.S
86/OP_AGET_CHAR.S
86/OP_AGET_OBJECT.S
86/OP_AGET_SHORT.S
86/OP_AGET_WIDE.S
86/OP_AND_INT.S
86/OP_AND_INT_2ADDR.S
86/OP_AND_INT_LIT16.S
86/OP_AND_INT_LIT8.S
86/OP_AND_LONG.S
86/OP_AND_LONG_2ADDR.S
86/OP_APUT.S
86/OP_APUT_BOOLEAN.S
86/OP_APUT_BYTE.S
86/OP_APUT_CHAR.S
86/OP_APUT_OBJECT.S
86/OP_APUT_SHORT.S
86/OP_APUT_WIDE.S
86/OP_ARRAY_LENGTH.S
86/OP_CHECK_CAST.S
86/OP_CMPG_DOUBLE.S
86/OP_CMPG_FLOAT.S
86/OP_CMPL_DOUBLE.S
86/OP_CMPL_FLOAT.S
86/OP_CMP_LONG.S
86/OP_CONST.S
86/OP_CONST_16.S
86/OP_CONST_4.S
86/OP_CONST_CLASS.S
86/OP_CONST_HIGH16.S
86/OP_CONST_STRING.S
86/OP_CONST_STRING_JUMBO.S
86/OP_CONST_WIDE.S
86/OP_CONST_WIDE_16.S
86/OP_CONST_WIDE_32.S
86/OP_CONST_WIDE_HIGH16.S
86/OP_DIV_DOUBLE.S
86/OP_DIV_DOUBLE_2ADDR.S
86/OP_DIV_FLOAT.S
86/OP_DIV_FLOAT_2ADDR.S
86/OP_DIV_INT.S
86/OP_DIV_INT_2ADDR.S
86/OP_DIV_INT_LIT16.S
86/OP_DIV_INT_LIT8.S
86/OP_DIV_LONG.S
86/OP_DIV_LONG_2ADDR.S
86/OP_DOUBLE_TO_FLOAT.S
86/OP_DOUBLE_TO_INT.S
86/OP_DOUBLE_TO_LONG.S
86/OP_EXECUTE_INLINE.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_FILLED_NEW_ARRAY_RANGE.S
86/OP_FILL_ARRAY_DATA.S
86/OP_FLOAT_TO_DOUBLE.S
86/OP_FLOAT_TO_INT.S
86/OP_FLOAT_TO_LONG.S
86/OP_GOTO.S
86/OP_GOTO_16.S
86/OP_GOTO_32.S
86/OP_IF_EQ.S
86/OP_IF_EQZ.S
86/OP_IF_GE.S
86/OP_IF_GEZ.S
86/OP_IF_GT.S
86/OP_IF_GTZ.S
86/OP_IF_LE.S
86/OP_IF_LEZ.S
86/OP_IF_LT.S
86/OP_IF_LTZ.S
86/OP_IF_NE.S
86/OP_IF_NEZ.S
86/OP_IGET.S
86/OP_IGET_BOOLEAN.S
86/OP_IGET_BYTE.S
86/OP_IGET_CHAR.S
86/OP_IGET_OBJECT.S
86/OP_IGET_OBJECT_QUICK.S
86/OP_IGET_QUICK.S
86/OP_IGET_SHORT.S
86/OP_IGET_WIDE.S
86/OP_IGET_WIDE_QUICK.S
86/OP_INSTANCE_OF.S
86/OP_INT_TO_BYTE.S
86/OP_INT_TO_CHAR.S
86/OP_INT_TO_DOUBLE.S
86/OP_INT_TO_FLOAT.S
86/OP_INT_TO_LONG.S
86/OP_INT_TO_SHORT.S
86/OP_INVOKE_DIRECT.S
86/OP_INVOKE_DIRECT_EMPTY.S
86/OP_INVOKE_DIRECT_RANGE.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_INTERFACE_RANGE.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_STATIC_RANGE.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_QUICK.S
86/OP_INVOKE_SUPER_QUICK_RANGE.S
86/OP_INVOKE_SUPER_RANGE.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_QUICK.S
86/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
86/OP_INVOKE_VIRTUAL_RANGE.S
86/OP_IPUT.S
86/OP_IPUT_BOOLEAN.S
86/OP_IPUT_BYTE.S
86/OP_IPUT_CHAR.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_IPUT_QUICK.S
86/OP_IPUT_SHORT.S
86/OP_IPUT_WIDE.S
86/OP_IPUT_WIDE_QUICK.S
86/OP_LONG_TO_DOUBLE.S
86/OP_LONG_TO_FLOAT.S
86/OP_LONG_TO_INT.S
86/OP_MONITOR_ENTER.S
86/OP_MONITOR_EXIT.S
86/OP_MOVE.S
86/OP_MOVE_16.S
86/OP_MOVE_EXCEPTION.S
86/OP_MOVE_FROM16.S
86/OP_MOVE_OBJECT.S
86/OP_MOVE_OBJECT_16.S
86/OP_MOVE_OBJECT_FROM16.S
86/OP_MOVE_RESULT.S
86/OP_MOVE_RESULT_OBJECT.S
86/OP_MOVE_RESULT_WIDE.S
86/OP_MOVE_WIDE.S
86/OP_MOVE_WIDE_16.S
86/OP_MOVE_WIDE_FROM16.S
86/OP_MUL_DOUBLE.S
86/OP_MUL_DOUBLE_2ADDR.S
86/OP_MUL_FLOAT.S
86/OP_MUL_FLOAT_2ADDR.S
86/OP_MUL_INT.S
86/OP_MUL_INT_2ADDR.S
86/OP_MUL_INT_LIT16.S
86/OP_MUL_INT_LIT8.S
86/OP_MUL_LONG.S
86/OP_MUL_LONG_2ADDR.S
86/OP_NEG_DOUBLE.S
86/OP_NEG_FLOAT.S
86/OP_NEG_INT.S
86/OP_NEG_LONG.S
86/OP_NEW_ARRAY.S
86/OP_NEW_INSTANCE.S
86/OP_NOP.S
86/OP_NOT_INT.S
86/OP_NOT_LONG.S
86/OP_OR_INT.S
86/OP_OR_INT_2ADDR.S
86/OP_OR_INT_LIT16.S
86/OP_OR_INT_LIT8.S
86/OP_OR_LONG.S
86/OP_OR_LONG_2ADDR.S
86/OP_PACKED_SWITCH.S
86/OP_REM_DOUBLE.S
86/OP_REM_DOUBLE_2ADDR.S
86/OP_REM_FLOAT.S
86/OP_REM_FLOAT_2ADDR.S
86/OP_REM_INT.S
86/OP_REM_INT_2ADDR.S
86/OP_REM_INT_LIT16.S
86/OP_REM_INT_LIT8.S
86/OP_REM_LONG.S
86/OP_REM_LONG_2ADDR.S
86/OP_RETURN.S
86/OP_RETURN_OBJECT.S
86/OP_RETURN_VOID.S
86/OP_RETURN_WIDE.S
86/OP_RSUB_INT.S
86/OP_RSUB_INT_LIT8.S
86/OP_SGET.S
86/OP_SGET_BOOLEAN.S
86/OP_SGET_BYTE.S
86/OP_SGET_CHAR.S
86/OP_SGET_OBJECT.S
86/OP_SGET_SHORT.S
86/OP_SGET_WIDE.S
86/OP_SHL_INT.S
86/OP_SHL_INT_2ADDR.S
86/OP_SHL_INT_LIT8.S
86/OP_SHL_LONG.S
86/OP_SHL_LONG_2ADDR.S
86/OP_SHR_INT.S
86/OP_SHR_INT_2ADDR.S
86/OP_SHR_INT_LIT8.S
86/OP_SHR_LONG.S
86/OP_SHR_LONG_2ADDR.S
86/OP_SPARSE_SWITCH.S
86/OP_SPUT.S
86/OP_SPUT_BOOLEAN.S
86/OP_SPUT_BYTE.S
86/OP_SPUT_CHAR.S
86/OP_SPUT_OBJECT.S
86/OP_SPUT_SHORT.S
86/OP_SPUT_WIDE.S
86/OP_SUB_DOUBLE.S
86/OP_SUB_DOUBLE_2ADDR.S
86/OP_SUB_FLOAT.S
86/OP_SUB_FLOAT_2ADDR.S
86/OP_SUB_INT.S
86/OP_SUB_INT_2ADDR.S
86/OP_SUB_LONG.S
86/OP_SUB_LONG_2ADDR.S
86/OP_THROW.S
86/OP_UNUSED_3E.S
86/OP_UNUSED_3F.S
86/OP_UNUSED_40.S
86/OP_UNUSED_41.S
86/OP_UNUSED_42.S
86/OP_UNUSED_43.S
86/OP_UNUSED_73.S
86/OP_UNUSED_79.S
86/OP_UNUSED_7A.S
86/OP_UNUSED_E3.S
86/OP_UNUSED_E4.S
86/OP_UNUSED_E5.S
86/OP_UNUSED_E6.S
86/OP_UNUSED_E7.S
86/OP_UNUSED_E8.S
86/OP_UNUSED_E9.S
86/OP_UNUSED_EA.S
86/OP_UNUSED_EB.S
86/OP_UNUSED_EC.S
86/OP_UNUSED_ED.S
86/OP_UNUSED_EF.S
86/OP_UNUSED_F1.S
86/OP_UNUSED_FC.S
86/OP_UNUSED_FD.S
86/OP_UNUSED_FE.S
86/OP_UNUSED_FF.S
86/OP_USHR_INT.S
86/OP_USHR_INT_2ADDR.S
86/OP_USHR_INT_LIT8.S
86/OP_USHR_LONG.S
86/OP_USHR_LONG_2ADDR.S
86/OP_XOR_INT.S
86/OP_XOR_INT_2ADDR.S
86/OP_XOR_INT_LIT16.S
86/OP_XOR_INT_LIT8.S
86/OP_XOR_LONG.S
86/OP_XOR_LONG_2ADDR.S
86/bincmp.S
86/bindiv.S
86/bindiv2addr.S
86/bindivLit16.S
86/bindivLit8.S
86/binflop.S
86/binflop2addr.S
86/binop.S
86/binop1.S
86/binop2addr.S
86/binopLit16.S
86/binopLit8.S
86/binopWide.S
86/binopWide2addr.S
86/cvtfp_int.S
86/entry.S
86/footer.S
86/fpcvt.S
86/header.S
86/shop2addr.S
86/stub.S
86/unop.S
86/unopWide.S
86/unused.S
86/zcmp.S
|
31e30105703263782efd450d356cd67ea01af3b7 |
03-Mar-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //depot/cupcake/@132589
rmv5te/footer.S
/gotoTargets.c
ut/InterpAsm-armv4.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
|
6dcac3deb3c19dc634470eb30b2daedf2b201bd4 |
03-Mar-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //depot/cupcake/@137055
rmv5te/footer.S
/gotoTargets.c
ut/InterpAsm-armv4.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
|
5d709784bbf5001012d7f25172927d46f6c1abe1 |
11-Feb-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //branches/cupcake/...@130745
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/footer.S
/gotoTargets.c
ut/InterpAsm-armv4.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
86/OP_FILLED_NEW_ARRAY.S
|
c4080f6bdeda19901a508cc75f96ac7e07903918 |
11-Feb-2009 |
Johnnie Birch <johnnie.l.birch.jr@intel.com> |
This patch rewrites common_invokeOld for the x86 fast interpreter. The implementation is similar to what is done for the armv5 code. Testing shows the patch provides a performance boost to benchmarks such as Caffeine Mark. When testing the simulator build on an Intel(R) Core(TM)2 Quad CPU Q9550 @ 2.83GHz, the string score for Caffeine Mark improved by 6%, the Method score improved by 12% and the overall score improved by 3%. This patch is one of our incremental efforts to merge some Intel's x86 fast interpreter features in http://review.source.android.com/Gerrit#change,6041 to the mterp/x86 directory.
ut/InterpAsm-x86.S
86/OP_INVOKE_DIRECT.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_QUICK.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_QUICK.S
86/footer.S
|
bcd637a94f10b49d18b87a74a015f9d3453ed77a |
22-Jan-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //branches/cupcake/...@127436
ommon/asm-constants.h
|
4c1a2915e40eceeb68dbc323d28b8bf8763af83b |
20-Jan-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //branches/cupcake/...@127101
OTES.txt
/OP_NOT_LONG.c
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
86/OP_FILLED_NEW_ARRAY.S
86/OP_NEW_INSTANCE.S
86/OP_NOT_INT.S
86/OP_NOT_LONG.S
86/OP_REM_DOUBLE.S
86/OP_REM_DOUBLE_2ADDR.S
86/OP_REM_FLOAT.S
86/OP_REM_FLOAT_2ADDR.S
86/OP_RSUB_INT.S
86/binopLit16.S
|
cc05ad238516f1303687aba4a978e24e57c0c07a |
10-Jan-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //branches/cupcake/...@125939
OTES.txt
EADME.txt
ommon/asm-constants.h
ut/InterpAsm-x86.S
86/OP_NEW_ARRAY.S
|
89c1feb0a69a7707b271086e749975b3f7acacf7 |
18-Dec-2008 |
The Android Open Source Project <initial-contribution@android.com> |
Code drop from //branches/cupcake/...@124589
akefile-mterp
terp.c
terp.h
EADME.txt
rmv4/OP_AGET_WIDE.S
rmv4/OP_APUT_WIDE.S
rmv4/OP_IGET_WIDE.S
rmv4/OP_IGET_WIDE_QUICK.S
rmv4/OP_IPUT_WIDE.S
rmv4/OP_IPUT_WIDE_QUICK.S
rmv4/OP_SGET_WIDE.S
rmv4/OP_SPUT_WIDE.S
rmv4/platform.S
rmv5/OP_ADD_DOUBLE.S
rmv5/OP_ADD_DOUBLE_2ADDR.S
rmv5/OP_ADD_FLOAT.S
rmv5/OP_ADD_FLOAT_2ADDR.S
rmv5/OP_ADD_INT.S
rmv5/OP_ADD_INT_2ADDR.S
rmv5/OP_ADD_INT_LIT16.S
rmv5/OP_ADD_INT_LIT8.S
rmv5/OP_ADD_LONG.S
rmv5/OP_ADD_LONG_2ADDR.S
rmv5/OP_AGET.S
rmv5/OP_AGET_BOOLEAN.S
rmv5/OP_AGET_BYTE.S
rmv5/OP_AGET_CHAR.S
rmv5/OP_AGET_OBJECT.S
rmv5/OP_AGET_SHORT.S
rmv5/OP_AGET_WIDE.S
rmv5/OP_AND_INT.S
rmv5/OP_AND_INT_2ADDR.S
rmv5/OP_AND_INT_LIT16.S
rmv5/OP_AND_INT_LIT8.S
rmv5/OP_AND_LONG.S
rmv5/OP_AND_LONG_2ADDR.S
rmv5/OP_APUT.S
rmv5/OP_APUT_BOOLEAN.S
rmv5/OP_APUT_BYTE.S
rmv5/OP_APUT_CHAR.S
rmv5/OP_APUT_OBJECT.S
rmv5/OP_APUT_SHORT.S
rmv5/OP_APUT_WIDE.S
rmv5/OP_ARRAY_LENGTH.S
rmv5/OP_CHECK_CAST.S
rmv5/OP_CMPG_DOUBLE.S
rmv5/OP_CMPG_FLOAT.S
rmv5/OP_CMPL_DOUBLE.S
rmv5/OP_CMPL_FLOAT.S
rmv5/OP_CMP_LONG.S
rmv5/OP_CONST.S
rmv5/OP_CONST_16.S
rmv5/OP_CONST_4.S
rmv5/OP_CONST_CLASS.S
rmv5/OP_CONST_HIGH16.S
rmv5/OP_CONST_STRING.S
rmv5/OP_CONST_STRING_JUMBO.S
rmv5/OP_CONST_WIDE.S
rmv5/OP_CONST_WIDE_16.S
rmv5/OP_CONST_WIDE_32.S
rmv5/OP_CONST_WIDE_HIGH16.S
rmv5/OP_DIV_DOUBLE.S
rmv5/OP_DIV_DOUBLE_2ADDR.S
rmv5/OP_DIV_FLOAT.S
rmv5/OP_DIV_FLOAT_2ADDR.S
rmv5/OP_DIV_INT.S
rmv5/OP_DIV_INT_2ADDR.S
rmv5/OP_DIV_INT_LIT16.S
rmv5/OP_DIV_INT_LIT8.S
rmv5/OP_DIV_LONG.S
rmv5/OP_DIV_LONG_2ADDR.S
rmv5/OP_DOUBLE_TO_FLOAT.S
rmv5/OP_DOUBLE_TO_INT.S
rmv5/OP_DOUBLE_TO_LONG.S
rmv5/OP_EXECUTE_INLINE.S
rmv5/OP_FILLED_NEW_ARRAY.S
rmv5/OP_FILLED_NEW_ARRAY_RANGE.S
rmv5/OP_FILL_ARRAY_DATA.S
rmv5/OP_FLOAT_TO_DOUBLE.S
rmv5/OP_FLOAT_TO_INT.S
rmv5/OP_FLOAT_TO_LONG.S
rmv5/OP_GOTO.S
rmv5/OP_GOTO_16.S
rmv5/OP_GOTO_32.S
rmv5/OP_IF_EQ.S
rmv5/OP_IF_EQZ.S
rmv5/OP_IF_GE.S
rmv5/OP_IF_GEZ.S
rmv5/OP_IF_GT.S
rmv5/OP_IF_GTZ.S
rmv5/OP_IF_LE.S
rmv5/OP_IF_LEZ.S
rmv5/OP_IF_LT.S
rmv5/OP_IF_LTZ.S
rmv5/OP_IF_NE.S
rmv5/OP_IF_NEZ.S
rmv5/OP_IGET.S
rmv5/OP_IGET_BOOLEAN.S
rmv5/OP_IGET_BYTE.S
rmv5/OP_IGET_CHAR.S
rmv5/OP_IGET_OBJECT.S
rmv5/OP_IGET_OBJECT_QUICK.S
rmv5/OP_IGET_QUICK.S
rmv5/OP_IGET_SHORT.S
rmv5/OP_IGET_WIDE.S
rmv5/OP_IGET_WIDE_QUICK.S
rmv5/OP_INSTANCE_OF.S
rmv5/OP_INT_TO_BYTE.S
rmv5/OP_INT_TO_CHAR.S
rmv5/OP_INT_TO_DOUBLE.S
rmv5/OP_INT_TO_FLOAT.S
rmv5/OP_INT_TO_LONG.S
rmv5/OP_INT_TO_SHORT.S
rmv5/OP_INVOKE_DIRECT.S
rmv5/OP_INVOKE_DIRECT_EMPTY.S
rmv5/OP_INVOKE_DIRECT_RANGE.S
rmv5/OP_INVOKE_INTERFACE.S
rmv5/OP_INVOKE_INTERFACE_RANGE.S
rmv5/OP_INVOKE_STATIC.S
rmv5/OP_INVOKE_STATIC_RANGE.S
rmv5/OP_INVOKE_SUPER.S
rmv5/OP_INVOKE_SUPER_QUICK.S
rmv5/OP_INVOKE_SUPER_QUICK_RANGE.S
rmv5/OP_INVOKE_SUPER_RANGE.S
rmv5/OP_INVOKE_VIRTUAL.S
rmv5/OP_INVOKE_VIRTUAL_QUICK.S
rmv5/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
rmv5/OP_INVOKE_VIRTUAL_RANGE.S
rmv5/OP_IPUT.S
rmv5/OP_IPUT_BOOLEAN.S
rmv5/OP_IPUT_BYTE.S
rmv5/OP_IPUT_CHAR.S
rmv5/OP_IPUT_OBJECT.S
rmv5/OP_IPUT_OBJECT_QUICK.S
rmv5/OP_IPUT_QUICK.S
rmv5/OP_IPUT_SHORT.S
rmv5/OP_IPUT_WIDE.S
rmv5/OP_IPUT_WIDE_QUICK.S
rmv5/OP_LONG_TO_DOUBLE.S
rmv5/OP_LONG_TO_FLOAT.S
rmv5/OP_LONG_TO_INT.S
rmv5/OP_MONITOR_ENTER.S
rmv5/OP_MONITOR_EXIT.S
rmv5/OP_MOVE.S
rmv5/OP_MOVE_16.S
rmv5/OP_MOVE_EXCEPTION.S
rmv5/OP_MOVE_FROM16.S
rmv5/OP_MOVE_OBJECT.S
rmv5/OP_MOVE_OBJECT_16.S
rmv5/OP_MOVE_OBJECT_FROM16.S
rmv5/OP_MOVE_RESULT.S
rmv5/OP_MOVE_RESULT_OBJECT.S
rmv5/OP_MOVE_RESULT_WIDE.S
rmv5/OP_MOVE_WIDE.S
rmv5/OP_MOVE_WIDE_16.S
rmv5/OP_MOVE_WIDE_FROM16.S
rmv5/OP_MUL_DOUBLE.S
rmv5/OP_MUL_DOUBLE_2ADDR.S
rmv5/OP_MUL_FLOAT.S
rmv5/OP_MUL_FLOAT_2ADDR.S
rmv5/OP_MUL_INT.S
rmv5/OP_MUL_INT_2ADDR.S
rmv5/OP_MUL_INT_LIT16.S
rmv5/OP_MUL_INT_LIT8.S
rmv5/OP_MUL_LONG.S
rmv5/OP_MUL_LONG_2ADDR.S
rmv5/OP_NEG_DOUBLE.S
rmv5/OP_NEG_FLOAT.S
rmv5/OP_NEG_INT.S
rmv5/OP_NEG_LONG.S
rmv5/OP_NEW_ARRAY.S
rmv5/OP_NEW_INSTANCE.S
rmv5/OP_NOP.S
rmv5/OP_NOT_INT.S
rmv5/OP_NOT_LONG.S
rmv5/OP_OR_INT.S
rmv5/OP_OR_INT_2ADDR.S
rmv5/OP_OR_INT_LIT16.S
rmv5/OP_OR_INT_LIT8.S
rmv5/OP_OR_LONG.S
rmv5/OP_OR_LONG_2ADDR.S
rmv5/OP_PACKED_SWITCH.S
rmv5/OP_REM_DOUBLE.S
rmv5/OP_REM_DOUBLE_2ADDR.S
rmv5/OP_REM_FLOAT.S
rmv5/OP_REM_FLOAT_2ADDR.S
rmv5/OP_REM_INT.S
rmv5/OP_REM_INT_2ADDR.S
rmv5/OP_REM_INT_LIT16.S
rmv5/OP_REM_INT_LIT8.S
rmv5/OP_REM_LONG.S
rmv5/OP_REM_LONG_2ADDR.S
rmv5/OP_RETURN.S
rmv5/OP_RETURN_OBJECT.S
rmv5/OP_RETURN_VOID.S
rmv5/OP_RETURN_WIDE.S
rmv5/OP_RSUB_INT.S
rmv5/OP_RSUB_INT_LIT8.S
rmv5/OP_SGET.S
rmv5/OP_SGET_BOOLEAN.S
rmv5/OP_SGET_BYTE.S
rmv5/OP_SGET_CHAR.S
rmv5/OP_SGET_OBJECT.S
rmv5/OP_SGET_SHORT.S
rmv5/OP_SGET_WIDE.S
rmv5/OP_SHL_INT.S
rmv5/OP_SHL_INT_2ADDR.S
rmv5/OP_SHL_INT_LIT8.S
rmv5/OP_SHL_LONG.S
rmv5/OP_SHL_LONG_2ADDR.S
rmv5/OP_SHR_INT.S
rmv5/OP_SHR_INT_2ADDR.S
rmv5/OP_SHR_INT_LIT8.S
rmv5/OP_SHR_LONG.S
rmv5/OP_SHR_LONG_2ADDR.S
rmv5/OP_SPARSE_SWITCH.S
rmv5/OP_SPUT.S
rmv5/OP_SPUT_BOOLEAN.S
rmv5/OP_SPUT_BYTE.S
rmv5/OP_SPUT_CHAR.S
rmv5/OP_SPUT_OBJECT.S
rmv5/OP_SPUT_SHORT.S
rmv5/OP_SPUT_WIDE.S
rmv5/OP_SUB_DOUBLE.S
rmv5/OP_SUB_DOUBLE_2ADDR.S
rmv5/OP_SUB_FLOAT.S
rmv5/OP_SUB_FLOAT_2ADDR.S
rmv5/OP_SUB_INT.S
rmv5/OP_SUB_INT_2ADDR.S
rmv5/OP_SUB_LONG.S
rmv5/OP_SUB_LONG_2ADDR.S
rmv5/OP_THROW.S
rmv5/OP_UNUSED_3E.S
rmv5/OP_UNUSED_3F.S
rmv5/OP_UNUSED_40.S
rmv5/OP_UNUSED_41.S
rmv5/OP_UNUSED_42.S
rmv5/OP_UNUSED_43.S
rmv5/OP_UNUSED_73.S
rmv5/OP_UNUSED_79.S
rmv5/OP_UNUSED_7A.S
rmv5/OP_UNUSED_E3.S
rmv5/OP_UNUSED_E4.S
rmv5/OP_UNUSED_E5.S
rmv5/OP_UNUSED_E6.S
rmv5/OP_UNUSED_E7.S
rmv5/OP_UNUSED_E8.S
rmv5/OP_UNUSED_E9.S
rmv5/OP_UNUSED_EA.S
rmv5/OP_UNUSED_EB.S
rmv5/OP_UNUSED_EC.S
rmv5/OP_UNUSED_ED.S
rmv5/OP_UNUSED_EF.S
rmv5/OP_UNUSED_F1.S
rmv5/OP_UNUSED_FC.S
rmv5/OP_UNUSED_FD.S
rmv5/OP_UNUSED_FE.S
rmv5/OP_UNUSED_FF.S
rmv5/OP_USHR_INT.S
rmv5/OP_USHR_INT_2ADDR.S
rmv5/OP_USHR_INT_LIT8.S
rmv5/OP_USHR_LONG.S
rmv5/OP_USHR_LONG_2ADDR.S
rmv5/OP_XOR_INT.S
rmv5/OP_XOR_INT_2ADDR.S
rmv5/OP_XOR_INT_LIT16.S
rmv5/OP_XOR_INT_LIT8.S
rmv5/OP_XOR_LONG.S
rmv5/OP_XOR_LONG_2ADDR.S
rmv5/bincmp.S
rmv5/binop.S
rmv5/binop2addr.S
rmv5/binopLit16.S
rmv5/binopLit8.S
rmv5/binopWide.S
rmv5/binopWide2addr.S
rmv5/debug.c
rmv5/entry.S
rmv5/footer.S
rmv5/header.S
rmv5/stub.S
rmv5/unop.S
rmv5/unopNarrower.S
rmv5/unopWide.S
rmv5/unopWider.S
rmv5/unused.S
rmv5/zcmp.S
rmv5te/OP_ADD_DOUBLE.S
rmv5te/OP_ADD_DOUBLE_2ADDR.S
rmv5te/OP_ADD_FLOAT.S
rmv5te/OP_ADD_FLOAT_2ADDR.S
rmv5te/OP_ADD_INT.S
rmv5te/OP_ADD_INT_2ADDR.S
rmv5te/OP_ADD_INT_LIT16.S
rmv5te/OP_ADD_INT_LIT8.S
rmv5te/OP_ADD_LONG.S
rmv5te/OP_ADD_LONG_2ADDR.S
rmv5te/OP_AGET.S
rmv5te/OP_AGET_BOOLEAN.S
rmv5te/OP_AGET_BYTE.S
rmv5te/OP_AGET_CHAR.S
rmv5te/OP_AGET_OBJECT.S
rmv5te/OP_AGET_SHORT.S
rmv5te/OP_AGET_WIDE.S
rmv5te/OP_AND_INT.S
rmv5te/OP_AND_INT_2ADDR.S
rmv5te/OP_AND_INT_LIT16.S
rmv5te/OP_AND_INT_LIT8.S
rmv5te/OP_AND_LONG.S
rmv5te/OP_AND_LONG_2ADDR.S
rmv5te/OP_APUT.S
rmv5te/OP_APUT_BOOLEAN.S
rmv5te/OP_APUT_BYTE.S
rmv5te/OP_APUT_CHAR.S
rmv5te/OP_APUT_OBJECT.S
rmv5te/OP_APUT_SHORT.S
rmv5te/OP_APUT_WIDE.S
rmv5te/OP_ARRAY_LENGTH.S
rmv5te/OP_CHECK_CAST.S
rmv5te/OP_CMPG_DOUBLE.S
rmv5te/OP_CMPG_FLOAT.S
rmv5te/OP_CMPL_DOUBLE.S
rmv5te/OP_CMPL_FLOAT.S
rmv5te/OP_CMP_LONG.S
rmv5te/OP_CONST.S
rmv5te/OP_CONST_16.S
rmv5te/OP_CONST_4.S
rmv5te/OP_CONST_CLASS.S
rmv5te/OP_CONST_HIGH16.S
rmv5te/OP_CONST_STRING.S
rmv5te/OP_CONST_STRING_JUMBO.S
rmv5te/OP_CONST_WIDE.S
rmv5te/OP_CONST_WIDE_16.S
rmv5te/OP_CONST_WIDE_32.S
rmv5te/OP_CONST_WIDE_HIGH16.S
rmv5te/OP_DIV_DOUBLE.S
rmv5te/OP_DIV_DOUBLE_2ADDR.S
rmv5te/OP_DIV_FLOAT.S
rmv5te/OP_DIV_FLOAT_2ADDR.S
rmv5te/OP_DIV_INT.S
rmv5te/OP_DIV_INT_2ADDR.S
rmv5te/OP_DIV_INT_LIT16.S
rmv5te/OP_DIV_INT_LIT8.S
rmv5te/OP_DIV_LONG.S
rmv5te/OP_DIV_LONG_2ADDR.S
rmv5te/OP_DOUBLE_TO_FLOAT.S
rmv5te/OP_DOUBLE_TO_INT.S
rmv5te/OP_DOUBLE_TO_LONG.S
rmv5te/OP_EXECUTE_INLINE.S
rmv5te/OP_FILLED_NEW_ARRAY.S
rmv5te/OP_FILLED_NEW_ARRAY_RANGE.S
rmv5te/OP_FILL_ARRAY_DATA.S
rmv5te/OP_FLOAT_TO_DOUBLE.S
rmv5te/OP_FLOAT_TO_INT.S
rmv5te/OP_FLOAT_TO_LONG.S
rmv5te/OP_GOTO.S
rmv5te/OP_GOTO_16.S
rmv5te/OP_GOTO_32.S
rmv5te/OP_IF_EQ.S
rmv5te/OP_IF_EQZ.S
rmv5te/OP_IF_GE.S
rmv5te/OP_IF_GEZ.S
rmv5te/OP_IF_GT.S
rmv5te/OP_IF_GTZ.S
rmv5te/OP_IF_LE.S
rmv5te/OP_IF_LEZ.S
rmv5te/OP_IF_LT.S
rmv5te/OP_IF_LTZ.S
rmv5te/OP_IF_NE.S
rmv5te/OP_IF_NEZ.S
rmv5te/OP_IGET.S
rmv5te/OP_IGET_BOOLEAN.S
rmv5te/OP_IGET_BYTE.S
rmv5te/OP_IGET_CHAR.S
rmv5te/OP_IGET_OBJECT.S
rmv5te/OP_IGET_OBJECT_QUICK.S
rmv5te/OP_IGET_QUICK.S
rmv5te/OP_IGET_SHORT.S
rmv5te/OP_IGET_WIDE.S
rmv5te/OP_IGET_WIDE_QUICK.S
rmv5te/OP_INSTANCE_OF.S
rmv5te/OP_INT_TO_BYTE.S
rmv5te/OP_INT_TO_CHAR.S
rmv5te/OP_INT_TO_DOUBLE.S
rmv5te/OP_INT_TO_FLOAT.S
rmv5te/OP_INT_TO_LONG.S
rmv5te/OP_INT_TO_SHORT.S
rmv5te/OP_INVOKE_DIRECT.S
rmv5te/OP_INVOKE_DIRECT_EMPTY.S
rmv5te/OP_INVOKE_DIRECT_RANGE.S
rmv5te/OP_INVOKE_INTERFACE.S
rmv5te/OP_INVOKE_INTERFACE_RANGE.S
rmv5te/OP_INVOKE_STATIC.S
rmv5te/OP_INVOKE_STATIC_RANGE.S
rmv5te/OP_INVOKE_SUPER.S
rmv5te/OP_INVOKE_SUPER_QUICK.S
rmv5te/OP_INVOKE_SUPER_QUICK_RANGE.S
rmv5te/OP_INVOKE_SUPER_RANGE.S
rmv5te/OP_INVOKE_VIRTUAL.S
rmv5te/OP_INVOKE_VIRTUAL_QUICK.S
rmv5te/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
rmv5te/OP_INVOKE_VIRTUAL_RANGE.S
rmv5te/OP_IPUT.S
rmv5te/OP_IPUT_BOOLEAN.S
rmv5te/OP_IPUT_BYTE.S
rmv5te/OP_IPUT_CHAR.S
rmv5te/OP_IPUT_OBJECT.S
rmv5te/OP_IPUT_OBJECT_QUICK.S
rmv5te/OP_IPUT_QUICK.S
rmv5te/OP_IPUT_SHORT.S
rmv5te/OP_IPUT_WIDE.S
rmv5te/OP_IPUT_WIDE_QUICK.S
rmv5te/OP_LONG_TO_DOUBLE.S
rmv5te/OP_LONG_TO_FLOAT.S
rmv5te/OP_LONG_TO_INT.S
rmv5te/OP_MONITOR_ENTER.S
rmv5te/OP_MONITOR_EXIT.S
rmv5te/OP_MOVE.S
rmv5te/OP_MOVE_16.S
rmv5te/OP_MOVE_EXCEPTION.S
rmv5te/OP_MOVE_FROM16.S
rmv5te/OP_MOVE_OBJECT.S
rmv5te/OP_MOVE_OBJECT_16.S
rmv5te/OP_MOVE_OBJECT_FROM16.S
rmv5te/OP_MOVE_RESULT.S
rmv5te/OP_MOVE_RESULT_OBJECT.S
rmv5te/OP_MOVE_RESULT_WIDE.S
rmv5te/OP_MOVE_WIDE.S
rmv5te/OP_MOVE_WIDE_16.S
rmv5te/OP_MOVE_WIDE_FROM16.S
rmv5te/OP_MUL_DOUBLE.S
rmv5te/OP_MUL_DOUBLE_2ADDR.S
rmv5te/OP_MUL_FLOAT.S
rmv5te/OP_MUL_FLOAT_2ADDR.S
rmv5te/OP_MUL_INT.S
rmv5te/OP_MUL_INT_2ADDR.S
rmv5te/OP_MUL_INT_LIT16.S
rmv5te/OP_MUL_INT_LIT8.S
rmv5te/OP_MUL_LONG.S
rmv5te/OP_MUL_LONG_2ADDR.S
rmv5te/OP_NEG_DOUBLE.S
rmv5te/OP_NEG_FLOAT.S
rmv5te/OP_NEG_INT.S
rmv5te/OP_NEG_LONG.S
rmv5te/OP_NEW_ARRAY.S
rmv5te/OP_NEW_INSTANCE.S
rmv5te/OP_NOP.S
rmv5te/OP_NOT_INT.S
rmv5te/OP_NOT_LONG.S
rmv5te/OP_OR_INT.S
rmv5te/OP_OR_INT_2ADDR.S
rmv5te/OP_OR_INT_LIT16.S
rmv5te/OP_OR_INT_LIT8.S
rmv5te/OP_OR_LONG.S
rmv5te/OP_OR_LONG_2ADDR.S
rmv5te/OP_PACKED_SWITCH.S
rmv5te/OP_REM_DOUBLE.S
rmv5te/OP_REM_DOUBLE_2ADDR.S
rmv5te/OP_REM_FLOAT.S
rmv5te/OP_REM_FLOAT_2ADDR.S
rmv5te/OP_REM_INT.S
rmv5te/OP_REM_INT_2ADDR.S
rmv5te/OP_REM_INT_LIT16.S
rmv5te/OP_REM_INT_LIT8.S
rmv5te/OP_REM_LONG.S
rmv5te/OP_REM_LONG_2ADDR.S
rmv5te/OP_RETURN.S
rmv5te/OP_RETURN_OBJECT.S
rmv5te/OP_RETURN_VOID.S
rmv5te/OP_RETURN_WIDE.S
rmv5te/OP_RSUB_INT.S
rmv5te/OP_RSUB_INT_LIT8.S
rmv5te/OP_SGET.S
rmv5te/OP_SGET_BOOLEAN.S
rmv5te/OP_SGET_BYTE.S
rmv5te/OP_SGET_CHAR.S
rmv5te/OP_SGET_OBJECT.S
rmv5te/OP_SGET_SHORT.S
rmv5te/OP_SGET_WIDE.S
rmv5te/OP_SHL_INT.S
rmv5te/OP_SHL_INT_2ADDR.S
rmv5te/OP_SHL_INT_LIT8.S
rmv5te/OP_SHL_LONG.S
rmv5te/OP_SHL_LONG_2ADDR.S
rmv5te/OP_SHR_INT.S
rmv5te/OP_SHR_INT_2ADDR.S
rmv5te/OP_SHR_INT_LIT8.S
rmv5te/OP_SHR_LONG.S
rmv5te/OP_SHR_LONG_2ADDR.S
rmv5te/OP_SPARSE_SWITCH.S
rmv5te/OP_SPUT.S
rmv5te/OP_SPUT_BOOLEAN.S
rmv5te/OP_SPUT_BYTE.S
rmv5te/OP_SPUT_CHAR.S
rmv5te/OP_SPUT_OBJECT.S
rmv5te/OP_SPUT_SHORT.S
rmv5te/OP_SPUT_WIDE.S
rmv5te/OP_SUB_DOUBLE.S
rmv5te/OP_SUB_DOUBLE_2ADDR.S
rmv5te/OP_SUB_FLOAT.S
rmv5te/OP_SUB_FLOAT_2ADDR.S
rmv5te/OP_SUB_INT.S
rmv5te/OP_SUB_INT_2ADDR.S
rmv5te/OP_SUB_LONG.S
rmv5te/OP_SUB_LONG_2ADDR.S
rmv5te/OP_THROW.S
rmv5te/OP_UNUSED_3E.S
rmv5te/OP_UNUSED_3F.S
rmv5te/OP_UNUSED_40.S
rmv5te/OP_UNUSED_41.S
rmv5te/OP_UNUSED_42.S
rmv5te/OP_UNUSED_43.S
rmv5te/OP_UNUSED_73.S
rmv5te/OP_UNUSED_79.S
rmv5te/OP_UNUSED_7A.S
rmv5te/OP_UNUSED_E3.S
rmv5te/OP_UNUSED_E4.S
rmv5te/OP_UNUSED_E5.S
rmv5te/OP_UNUSED_E6.S
rmv5te/OP_UNUSED_E7.S
rmv5te/OP_UNUSED_E8.S
rmv5te/OP_UNUSED_E9.S
rmv5te/OP_UNUSED_EA.S
rmv5te/OP_UNUSED_EB.S
rmv5te/OP_UNUSED_EC.S
rmv5te/OP_UNUSED_ED.S
rmv5te/OP_UNUSED_EF.S
rmv5te/OP_UNUSED_F1.S
rmv5te/OP_UNUSED_FC.S
rmv5te/OP_UNUSED_FD.S
rmv5te/OP_UNUSED_FE.S
rmv5te/OP_UNUSED_FF.S
rmv5te/OP_USHR_INT.S
rmv5te/OP_USHR_INT_2ADDR.S
rmv5te/OP_USHR_INT_LIT8.S
rmv5te/OP_USHR_LONG.S
rmv5te/OP_USHR_LONG_2ADDR.S
rmv5te/OP_XOR_INT.S
rmv5te/OP_XOR_INT_2ADDR.S
rmv5te/OP_XOR_INT_LIT16.S
rmv5te/OP_XOR_INT_LIT8.S
rmv5te/OP_XOR_LONG.S
rmv5te/OP_XOR_LONG_2ADDR.S
rmv5te/bincmp.S
rmv5te/binop.S
rmv5te/binop2addr.S
rmv5te/binopLit16.S
rmv5te/binopLit8.S
rmv5te/binopWide.S
rmv5te/binopWide2addr.S
rmv5te/debug.c
rmv5te/entry.S
rmv5te/footer.S
rmv5te/header.S
rmv5te/platform.S
rmv5te/stub.S
rmv5te/unop.S
rmv5te/unopNarrower.S
rmv5te/unopWide.S
rmv5te/unopWider.S
rmv5te/unused.S
rmv5te/zcmp.S
/OP_ADD_INT.c
/OP_ADD_INT_2ADDR.c
/OP_ADD_INT_LIT16.c
/OP_ADD_INT_LIT8.c
/OP_ADD_LONG.c
/OP_ADD_LONG_2ADDR.c
/OP_AND_INT.c
/OP_AND_INT_2ADDR.c
/OP_AND_INT_LIT16.c
/OP_AND_INT_LIT8.c
/OP_AND_LONG.c
/OP_AND_LONG_2ADDR.c
/OP_APUT_OBJECT.c
/OP_ARRAY_LENGTH.c
/OP_CHECK_CAST.c
/OP_CONST_CLASS.c
/OP_CONST_STRING.c
/OP_CONST_STRING_JUMBO.c
/OP_DIV_INT.c
/OP_DIV_INT_2ADDR.c
/OP_DIV_INT_LIT16.c
/OP_DIV_INT_LIT8.c
/OP_DIV_LONG.c
/OP_DIV_LONG_2ADDR.c
/OP_EXECUTE_INLINE.c
/OP_FILLED_NEW_ARRAY.c
/OP_FILLED_NEW_ARRAY_RANGE.c
/OP_FILL_ARRAY_DATA.c
/OP_INSTANCE_OF.c
/OP_INVOKE_DIRECT.c
/OP_INVOKE_DIRECT_EMPTY.c
/OP_INVOKE_DIRECT_RANGE.c
/OP_INVOKE_INTERFACE.c
/OP_INVOKE_INTERFACE_RANGE.c
/OP_INVOKE_STATIC.c
/OP_INVOKE_STATIC_RANGE.c
/OP_INVOKE_SUPER.c
/OP_INVOKE_SUPER_QUICK.c
/OP_INVOKE_SUPER_QUICK_RANGE.c
/OP_INVOKE_SUPER_RANGE.c
/OP_INVOKE_VIRTUAL.c
/OP_INVOKE_VIRTUAL_QUICK.c
/OP_INVOKE_VIRTUAL_QUICK_RANGE.c
/OP_INVOKE_VIRTUAL_RANGE.c
/OP_IPUT_OBJECT.c
/OP_MONITOR_ENTER.c
/OP_MONITOR_EXIT.c
/OP_MOVE_OBJECT.c
/OP_MOVE_OBJECT_16.c
/OP_MOVE_OBJECT_FROM16.c
/OP_MOVE_RESULT_OBJECT.c
/OP_MUL_INT.c
/OP_MUL_INT_2ADDR.c
/OP_MUL_INT_LIT16.c
/OP_MUL_INT_LIT8.c
/OP_MUL_LONG.c
/OP_MUL_LONG_2ADDR.c
/OP_NEW_ARRAY.c
/OP_NEW_INSTANCE.c
/OP_OR_INT.c
/OP_OR_INT_2ADDR.c
/OP_OR_INT_LIT16.c
/OP_OR_INT_LIT8.c
/OP_OR_LONG.c
/OP_OR_LONG_2ADDR.c
/OP_PACKED_SWITCH.c
/OP_REM_INT.c
/OP_REM_INT_2ADDR.c
/OP_REM_INT_LIT16.c
/OP_REM_INT_LIT8.c
/OP_REM_LONG.c
/OP_REM_LONG_2ADDR.c
/OP_RETURN.c
/OP_RETURN_OBJECT.c
/OP_RETURN_VOID.c
/OP_RETURN_WIDE.c
/OP_SPARSE_SWITCH.c
/OP_SUB_INT.c
/OP_SUB_INT_2ADDR.c
/OP_SUB_LONG.c
/OP_SUB_LONG_2ADDR.c
/OP_THROW.c
/OP_UNUSED_FF.c
/OP_XOR_INT.c
/OP_XOR_INT_2ADDR.c
/OP_XOR_INT_LIT16.c
/OP_XOR_INT_LIT8.c
/OP_XOR_LONG.c
/OP_XOR_LONG_2ADDR.c
/footer.c
/gotoTargets.c
/header.c
/opcommon.c
onfig-allstubs
onfig-armv4
onfig-armv5
onfig-armv5te
onfig-desktop
onfig-portdbg
onfig-portstd
onfig-x86
stubs/enddefs.c
stubs/entry.c
stubs/stubdefs.c
esktop/entry.c
ut/InterpAsm-allstubs.S
ut/InterpAsm-armv4.S
ut/InterpAsm-armv5.S
ut/InterpAsm-armv5te.S
ut/InterpAsm-desktop.S
ut/InterpAsm-x86.S
ut/InterpC-allstubs.c
ut/InterpC-armv4.c
ut/InterpC-armv5.c
ut/InterpC-armv5te.c
ut/InterpC-desktop.c
ut/InterpC-portdbg.c
ut/InterpC-portstd.c
ut/InterpC-x86.c
ortable/debug.c
ortable/enddefs.c
ortable/entry.c
ortable/portdbg.c
ortable/portstd.c
ortable/stubdefs.c
ebuild.sh
86/OP_ADD_DOUBLE.S
86/OP_ADD_DOUBLE_2ADDR.S
86/OP_ADD_FLOAT.S
86/OP_ADD_FLOAT_2ADDR.S
86/OP_ADD_INT.S
86/OP_ADD_INT_2ADDR.S
86/OP_ADD_INT_LIT16.S
86/OP_ADD_INT_LIT8.S
86/OP_ADD_LONG.S
86/OP_ADD_LONG_2ADDR.S
86/OP_AGET.S
86/OP_AGET_BOOLEAN.S
86/OP_AGET_BYTE.S
86/OP_AGET_CHAR.S
86/OP_AGET_OBJECT.S
86/OP_AGET_SHORT.S
86/OP_AGET_WIDE.S
86/OP_AND_INT.S
86/OP_AND_INT_2ADDR.S
86/OP_AND_INT_LIT16.S
86/OP_AND_INT_LIT8.S
86/OP_AND_LONG.S
86/OP_AND_LONG_2ADDR.S
86/OP_APUT.S
86/OP_APUT_BOOLEAN.S
86/OP_APUT_BYTE.S
86/OP_APUT_CHAR.S
86/OP_APUT_OBJECT.S
86/OP_APUT_SHORT.S
86/OP_APUT_WIDE.S
86/OP_ARRAY_LENGTH.S
86/OP_CHECK_CAST.S
86/OP_CMPG_DOUBLE.S
86/OP_CMPG_FLOAT.S
86/OP_CMPL_DOUBLE.S
86/OP_CMPL_FLOAT.S
86/OP_CMP_LONG.S
86/OP_CONST.S
86/OP_CONST_16.S
86/OP_CONST_4.S
86/OP_CONST_CLASS.S
86/OP_CONST_HIGH16.S
86/OP_CONST_STRING.S
86/OP_CONST_STRING_JUMBO.S
86/OP_CONST_WIDE.S
86/OP_CONST_WIDE_16.S
86/OP_CONST_WIDE_32.S
86/OP_CONST_WIDE_HIGH16.S
86/OP_DIV_DOUBLE.S
86/OP_DIV_DOUBLE_2ADDR.S
86/OP_DIV_FLOAT.S
86/OP_DIV_FLOAT_2ADDR.S
86/OP_DIV_INT.S
86/OP_DIV_INT_2ADDR.S
86/OP_DIV_INT_LIT16.S
86/OP_DIV_INT_LIT8.S
86/OP_DIV_LONG.S
86/OP_DIV_LONG_2ADDR.S
86/OP_DOUBLE_TO_FLOAT.S
86/OP_DOUBLE_TO_INT.S
86/OP_DOUBLE_TO_LONG.S
86/OP_EXECUTE_INLINE.S
86/OP_FILLED_NEW_ARRAY.S
86/OP_FILLED_NEW_ARRAY_RANGE.S
86/OP_FILL_ARRAY_DATA.S
86/OP_FLOAT_TO_DOUBLE.S
86/OP_FLOAT_TO_INT.S
86/OP_FLOAT_TO_LONG.S
86/OP_GOTO.S
86/OP_GOTO_16.S
86/OP_GOTO_32.S
86/OP_IF_EQ.S
86/OP_IF_EQZ.S
86/OP_IF_GE.S
86/OP_IF_GEZ.S
86/OP_IF_GT.S
86/OP_IF_GTZ.S
86/OP_IF_LE.S
86/OP_IF_LEZ.S
86/OP_IF_LT.S
86/OP_IF_LTZ.S
86/OP_IF_NE.S
86/OP_IF_NEZ.S
86/OP_IGET.S
86/OP_IGET_BOOLEAN.S
86/OP_IGET_BYTE.S
86/OP_IGET_CHAR.S
86/OP_IGET_OBJECT.S
86/OP_IGET_OBJECT_QUICK.S
86/OP_IGET_QUICK.S
86/OP_IGET_SHORT.S
86/OP_IGET_WIDE.S
86/OP_IGET_WIDE_QUICK.S
86/OP_INSTANCE_OF.S
86/OP_INT_TO_BYTE.S
86/OP_INT_TO_CHAR.S
86/OP_INT_TO_DOUBLE.S
86/OP_INT_TO_FLOAT.S
86/OP_INT_TO_LONG.S
86/OP_INT_TO_SHORT.S
86/OP_INVOKE_DIRECT.S
86/OP_INVOKE_DIRECT_EMPTY.S
86/OP_INVOKE_DIRECT_RANGE.S
86/OP_INVOKE_INTERFACE.S
86/OP_INVOKE_INTERFACE_RANGE.S
86/OP_INVOKE_STATIC.S
86/OP_INVOKE_STATIC_RANGE.S
86/OP_INVOKE_SUPER.S
86/OP_INVOKE_SUPER_QUICK.S
86/OP_INVOKE_SUPER_QUICK_RANGE.S
86/OP_INVOKE_SUPER_RANGE.S
86/OP_INVOKE_VIRTUAL.S
86/OP_INVOKE_VIRTUAL_QUICK.S
86/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
86/OP_INVOKE_VIRTUAL_RANGE.S
86/OP_IPUT.S
86/OP_IPUT_BOOLEAN.S
86/OP_IPUT_BYTE.S
86/OP_IPUT_CHAR.S
86/OP_IPUT_OBJECT.S
86/OP_IPUT_OBJECT_QUICK.S
86/OP_IPUT_QUICK.S
86/OP_IPUT_SHORT.S
86/OP_IPUT_WIDE.S
86/OP_IPUT_WIDE_QUICK.S
86/OP_LONG_TO_DOUBLE.S
86/OP_LONG_TO_FLOAT.S
86/OP_LONG_TO_INT.S
86/OP_MONITOR_ENTER.S
86/OP_MONITOR_EXIT.S
86/OP_MOVE.S
86/OP_MOVE_16.S
86/OP_MOVE_EXCEPTION.S
86/OP_MOVE_FROM16.S
86/OP_MOVE_OBJECT.S
86/OP_MOVE_OBJECT_16.S
86/OP_MOVE_OBJECT_FROM16.S
86/OP_MOVE_RESULT.S
86/OP_MOVE_RESULT_OBJECT.S
86/OP_MOVE_RESULT_WIDE.S
86/OP_MOVE_WIDE.S
86/OP_MOVE_WIDE_16.S
86/OP_MOVE_WIDE_FROM16.S
86/OP_MUL_DOUBLE.S
86/OP_MUL_DOUBLE_2ADDR.S
86/OP_MUL_FLOAT.S
86/OP_MUL_FLOAT_2ADDR.S
86/OP_MUL_INT.S
86/OP_MUL_INT_2ADDR.S
86/OP_MUL_INT_LIT16.S
86/OP_MUL_INT_LIT8.S
86/OP_MUL_LONG.S
86/OP_MUL_LONG_2ADDR.S
86/OP_NEG_DOUBLE.S
86/OP_NEG_FLOAT.S
86/OP_NEG_INT.S
86/OP_NEG_LONG.S
86/OP_NEW_ARRAY.S
86/OP_NEW_INSTANCE.S
86/OP_NOP.S
86/OP_NOT_INT.S
86/OP_NOT_LONG.S
86/OP_OR_INT.S
86/OP_OR_INT_2ADDR.S
86/OP_OR_INT_LIT16.S
86/OP_OR_INT_LIT8.S
86/OP_OR_LONG.S
86/OP_OR_LONG_2ADDR.S
86/OP_PACKED_SWITCH.S
86/OP_REM_DOUBLE.S
86/OP_REM_DOUBLE_2ADDR.S
86/OP_REM_FLOAT.S
86/OP_REM_FLOAT_2ADDR.S
86/OP_REM_INT.S
86/OP_REM_INT_2ADDR.S
86/OP_REM_INT_LIT16.S
86/OP_REM_INT_LIT8.S
86/OP_REM_LONG.S
86/OP_REM_LONG_2ADDR.S
86/OP_RETURN.S
86/OP_RETURN_OBJECT.S
86/OP_RETURN_VOID.S
86/OP_RETURN_WIDE.S
86/OP_RSUB_INT.S
86/OP_RSUB_INT_LIT8.S
86/OP_SGET.S
86/OP_SGET_BOOLEAN.S
86/OP_SGET_BYTE.S
86/OP_SGET_CHAR.S
86/OP_SGET_OBJECT.S
86/OP_SGET_SHORT.S
86/OP_SGET_WIDE.S
86/OP_SHL_INT.S
86/OP_SHL_INT_2ADDR.S
86/OP_SHL_INT_LIT8.S
86/OP_SHL_LONG.S
86/OP_SHL_LONG_2ADDR.S
86/OP_SHR_INT.S
86/OP_SHR_INT_2ADDR.S
86/OP_SHR_INT_LIT8.S
86/OP_SHR_LONG.S
86/OP_SHR_LONG_2ADDR.S
86/OP_SPARSE_SWITCH.S
86/OP_SPUT.S
86/OP_SPUT_BOOLEAN.S
86/OP_SPUT_BYTE.S
86/OP_SPUT_CHAR.S
86/OP_SPUT_OBJECT.S
86/OP_SPUT_SHORT.S
86/OP_SPUT_WIDE.S
86/OP_SUB_DOUBLE.S
86/OP_SUB_DOUBLE_2ADDR.S
86/OP_SUB_FLOAT.S
86/OP_SUB_FLOAT_2ADDR.S
86/OP_SUB_INT.S
86/OP_SUB_INT_2ADDR.S
86/OP_SUB_LONG.S
86/OP_SUB_LONG_2ADDR.S
86/OP_THROW.S
86/OP_UNUSED_3E.S
86/OP_UNUSED_3F.S
86/OP_UNUSED_40.S
86/OP_UNUSED_41.S
86/OP_UNUSED_42.S
86/OP_UNUSED_43.S
86/OP_UNUSED_73.S
86/OP_UNUSED_79.S
86/OP_UNUSED_7A.S
86/OP_UNUSED_E3.S
86/OP_UNUSED_E4.S
86/OP_UNUSED_E5.S
86/OP_UNUSED_E6.S
86/OP_UNUSED_E7.S
86/OP_UNUSED_E8.S
86/OP_UNUSED_E9.S
86/OP_UNUSED_EA.S
86/OP_UNUSED_EB.S
86/OP_UNUSED_EC.S
86/OP_UNUSED_ED.S
86/OP_UNUSED_EF.S
86/OP_UNUSED_F1.S
86/OP_UNUSED_FC.S
86/OP_UNUSED_FD.S
86/OP_UNUSED_FE.S
86/OP_UNUSED_FF.S
86/OP_USHR_INT.S
86/OP_USHR_INT_2ADDR.S
86/OP_USHR_INT_LIT8.S
86/OP_USHR_LONG.S
86/OP_USHR_LONG_2ADDR.S
86/OP_XOR_INT.S
86/OP_XOR_INT_2ADDR.S
86/OP_XOR_INT_LIT16.S
86/OP_XOR_INT_LIT8.S
86/OP_XOR_LONG.S
86/OP_XOR_LONG_2ADDR.S
86/bincmp.S
86/bindiv.S
86/bindiv2addr.S
86/bindivLit16.S
86/bindivLit8.S
86/binflop.S
86/binflop2addr.S
86/binop.S
86/binop1.S
86/binop2addr.S
86/binopLit16.S
86/binopLit8.S
86/binopWide.S
86/binopWide2addr.S
86/cvtfp_int.S
86/entry.S
86/footer.S
86/fpcvt.S
86/header.S
86/shop2addr.S
86/stub.S
86/unop.S
86/unopWide.S
86/unused.S
86/zcmp.S
|
2ad60cfc28e14ee8f0bb038720836a4696c478ad |
21-Oct-2008 |
The Android Open Source Project <initial-contribution@android.com> |
Initial Contribution
akefile-mterp
terp.c
terp.h
EADME.txt
rmv5/OP_ADD_DOUBLE.S
rmv5/OP_ADD_DOUBLE_2ADDR.S
rmv5/OP_ADD_FLOAT.S
rmv5/OP_ADD_FLOAT_2ADDR.S
rmv5/OP_ADD_INT.S
rmv5/OP_ADD_INT_2ADDR.S
rmv5/OP_ADD_INT_LIT16.S
rmv5/OP_ADD_INT_LIT8.S
rmv5/OP_ADD_LONG.S
rmv5/OP_ADD_LONG_2ADDR.S
rmv5/OP_AGET.S
rmv5/OP_AGET_BOOLEAN.S
rmv5/OP_AGET_BYTE.S
rmv5/OP_AGET_CHAR.S
rmv5/OP_AGET_OBJECT.S
rmv5/OP_AGET_SHORT.S
rmv5/OP_AGET_WIDE.S
rmv5/OP_AND_INT.S
rmv5/OP_AND_INT_2ADDR.S
rmv5/OP_AND_INT_LIT16.S
rmv5/OP_AND_INT_LIT8.S
rmv5/OP_AND_LONG.S
rmv5/OP_AND_LONG_2ADDR.S
rmv5/OP_APUT.S
rmv5/OP_APUT_BOOLEAN.S
rmv5/OP_APUT_BYTE.S
rmv5/OP_APUT_CHAR.S
rmv5/OP_APUT_OBJECT.S
rmv5/OP_APUT_SHORT.S
rmv5/OP_APUT_WIDE.S
rmv5/OP_ARRAY_LENGTH.S
rmv5/OP_CHECK_CAST.S
rmv5/OP_CMPG_DOUBLE.S
rmv5/OP_CMPG_FLOAT.S
rmv5/OP_CMPL_DOUBLE.S
rmv5/OP_CMPL_FLOAT.S
rmv5/OP_CMP_LONG.S
rmv5/OP_CONST.S
rmv5/OP_CONST_16.S
rmv5/OP_CONST_4.S
rmv5/OP_CONST_CLASS.S
rmv5/OP_CONST_HIGH16.S
rmv5/OP_CONST_STRING.S
rmv5/OP_CONST_STRING_JUMBO.S
rmv5/OP_CONST_WIDE.S
rmv5/OP_CONST_WIDE_16.S
rmv5/OP_CONST_WIDE_32.S
rmv5/OP_CONST_WIDE_HIGH16.S
rmv5/OP_DIV_DOUBLE.S
rmv5/OP_DIV_DOUBLE_2ADDR.S
rmv5/OP_DIV_FLOAT.S
rmv5/OP_DIV_FLOAT_2ADDR.S
rmv5/OP_DIV_INT.S
rmv5/OP_DIV_INT_2ADDR.S
rmv5/OP_DIV_INT_LIT16.S
rmv5/OP_DIV_INT_LIT8.S
rmv5/OP_DIV_LONG.S
rmv5/OP_DIV_LONG_2ADDR.S
rmv5/OP_DOUBLE_TO_FLOAT.S
rmv5/OP_DOUBLE_TO_INT.S
rmv5/OP_DOUBLE_TO_LONG.S
rmv5/OP_EXECUTE_INLINE.S
rmv5/OP_FILLED_NEW_ARRAY.S
rmv5/OP_FILLED_NEW_ARRAY_RANGE.S
rmv5/OP_FILL_ARRAY_DATA.S
rmv5/OP_FLOAT_TO_DOUBLE.S
rmv5/OP_FLOAT_TO_INT.S
rmv5/OP_FLOAT_TO_LONG.S
rmv5/OP_GOTO.S
rmv5/OP_GOTO_16.S
rmv5/OP_GOTO_32.S
rmv5/OP_IF_EQ.S
rmv5/OP_IF_EQZ.S
rmv5/OP_IF_GE.S
rmv5/OP_IF_GEZ.S
rmv5/OP_IF_GT.S
rmv5/OP_IF_GTZ.S
rmv5/OP_IF_LE.S
rmv5/OP_IF_LEZ.S
rmv5/OP_IF_LT.S
rmv5/OP_IF_LTZ.S
rmv5/OP_IF_NE.S
rmv5/OP_IF_NEZ.S
rmv5/OP_IGET.S
rmv5/OP_IGET_BOOLEAN.S
rmv5/OP_IGET_BYTE.S
rmv5/OP_IGET_CHAR.S
rmv5/OP_IGET_OBJECT.S
rmv5/OP_IGET_OBJECT_QUICK.S
rmv5/OP_IGET_QUICK.S
rmv5/OP_IGET_SHORT.S
rmv5/OP_IGET_WIDE.S
rmv5/OP_IGET_WIDE_QUICK.S
rmv5/OP_INSTANCE_OF.S
rmv5/OP_INT_TO_BYTE.S
rmv5/OP_INT_TO_CHAR.S
rmv5/OP_INT_TO_DOUBLE.S
rmv5/OP_INT_TO_FLOAT.S
rmv5/OP_INT_TO_LONG.S
rmv5/OP_INT_TO_SHORT.S
rmv5/OP_INVOKE_DIRECT.S
rmv5/OP_INVOKE_DIRECT_EMPTY.S
rmv5/OP_INVOKE_DIRECT_RANGE.S
rmv5/OP_INVOKE_INTERFACE.S
rmv5/OP_INVOKE_INTERFACE_RANGE.S
rmv5/OP_INVOKE_STATIC.S
rmv5/OP_INVOKE_STATIC_RANGE.S
rmv5/OP_INVOKE_SUPER.S
rmv5/OP_INVOKE_SUPER_QUICK.S
rmv5/OP_INVOKE_SUPER_QUICK_RANGE.S
rmv5/OP_INVOKE_SUPER_RANGE.S
rmv5/OP_INVOKE_VIRTUAL.S
rmv5/OP_INVOKE_VIRTUAL_QUICK.S
rmv5/OP_INVOKE_VIRTUAL_QUICK_RANGE.S
rmv5/OP_INVOKE_VIRTUAL_RANGE.S
rmv5/OP_IPUT.S
rmv5/OP_IPUT_BOOLEAN.S
rmv5/OP_IPUT_BYTE.S
rmv5/OP_IPUT_CHAR.S
rmv5/OP_IPUT_OBJECT.S
rmv5/OP_IPUT_OBJECT_QUICK.S
rmv5/OP_IPUT_QUICK.S
rmv5/OP_IPUT_SHORT.S
rmv5/OP_IPUT_WIDE.S
rmv5/OP_IPUT_WIDE_QUICK.S
rmv5/OP_LONG_TO_DOUBLE.S
rmv5/OP_LONG_TO_FLOAT.S
rmv5/OP_LONG_TO_INT.S
rmv5/OP_MONITOR_ENTER.S
rmv5/OP_MONITOR_EXIT.S
rmv5/OP_MOVE.S
rmv5/OP_MOVE_16.S
rmv5/OP_MOVE_EXCEPTION.S
rmv5/OP_MOVE_FROM16.S
rmv5/OP_MOVE_OBJECT.S
rmv5/OP_MOVE_OBJECT_16.S
rmv5/OP_MOVE_OBJECT_FROM16.S
rmv5/OP_MOVE_RESULT.S
rmv5/OP_MOVE_RESULT_OBJECT.S
rmv5/OP_MOVE_RESULT_WIDE.S
rmv5/OP_MOVE_WIDE.S
rmv5/OP_MOVE_WIDE_16.S
rmv5/OP_MOVE_WIDE_FROM16.S
rmv5/OP_MUL_DOUBLE.S
rmv5/OP_MUL_DOUBLE_2ADDR.S
rmv5/OP_MUL_FLOAT.S
rmv5/OP_MUL_FLOAT_2ADDR.S
rmv5/OP_MUL_INT.S
rmv5/OP_MUL_INT_2ADDR.S
rmv5/OP_MUL_INT_LIT16.S
rmv5/OP_MUL_INT_LIT8.S
rmv5/OP_MUL_LONG.S
rmv5/OP_MUL_LONG_2ADDR.S
rmv5/OP_NEG_DOUBLE.S
rmv5/OP_NEG_FLOAT.S
rmv5/OP_NEG_INT.S
rmv5/OP_NEG_LONG.S
rmv5/OP_NEW_ARRAY.S
rmv5/OP_NEW_INSTANCE.S
rmv5/OP_NOP.S
rmv5/OP_NOT_INT.S
rmv5/OP_NOT_LONG.S
rmv5/OP_OR_INT.S
rmv5/OP_OR_INT_2ADDR.S
rmv5/OP_OR_INT_LIT16.S
rmv5/OP_OR_INT_LIT8.S
rmv5/OP_OR_LONG.S
rmv5/OP_OR_LONG_2ADDR.S
rmv5/OP_PACKED_SWITCH.S
rmv5/OP_REM_DOUBLE.S
rmv5/OP_REM_DOUBLE_2ADDR.S
rmv5/OP_REM_FLOAT.S
rmv5/OP_REM_FLOAT_2ADDR.S
rmv5/OP_REM_INT.S
rmv5/OP_REM_INT_2ADDR.S
rmv5/OP_REM_INT_LIT16.S
rmv5/OP_REM_INT_LIT8.S
rmv5/OP_REM_LONG.S
rmv5/OP_REM_LONG_2ADDR.S
rmv5/OP_RETURN.S
rmv5/OP_RETURN_OBJECT.S
rmv5/OP_RETURN_VOID.S
rmv5/OP_RETURN_WIDE.S
rmv5/OP_RSUB_INT.S
rmv5/OP_RSUB_INT_LIT8.S
rmv5/OP_SGET.S
rmv5/OP_SGET_BOOLEAN.S
rmv5/OP_SGET_BYTE.S
rmv5/OP_SGET_CHAR.S
rmv5/OP_SGET_OBJECT.S
rmv5/OP_SGET_SHORT.S
rmv5/OP_SGET_WIDE.S
rmv5/OP_SHL_INT.S
rmv5/OP_SHL_INT_2ADDR.S
rmv5/OP_SHL_INT_LIT8.S
rmv5/OP_SHL_LONG.S
rmv5/OP_SHL_LONG_2ADDR.S
rmv5/OP_SHR_INT.S
rmv5/OP_SHR_INT_2ADDR.S
rmv5/OP_SHR_INT_LIT8.S
rmv5/OP_SHR_LONG.S
rmv5/OP_SHR_LONG_2ADDR.S
rmv5/OP_SPARSE_SWITCH.S
rmv5/OP_SPUT.S
rmv5/OP_SPUT_BOOLEAN.S
rmv5/OP_SPUT_BYTE.S
rmv5/OP_SPUT_CHAR.S
rmv5/OP_SPUT_OBJECT.S
rmv5/OP_SPUT_SHORT.S
rmv5/OP_SPUT_WIDE.S
rmv5/OP_SUB_DOUBLE.S
rmv5/OP_SUB_DOUBLE_2ADDR.S
rmv5/OP_SUB_FLOAT.S
rmv5/OP_SUB_FLOAT_2ADDR.S
rmv5/OP_SUB_INT.S
rmv5/OP_SUB_INT_2ADDR.S
rmv5/OP_SUB_LONG.S
rmv5/OP_SUB_LONG_2ADDR.S
rmv5/OP_THROW.S
rmv5/OP_UNUSED_3E.S
rmv5/OP_UNUSED_3F.S
rmv5/OP_UNUSED_40.S
rmv5/OP_UNUSED_41.S
rmv5/OP_UNUSED_42.S
rmv5/OP_UNUSED_43.S
rmv5/OP_UNUSED_73.S
rmv5/OP_UNUSED_79.S
rmv5/OP_UNUSED_7A.S
rmv5/OP_UNUSED_E3.S
rmv5/OP_UNUSED_E4.S
rmv5/OP_UNUSED_E5.S
rmv5/OP_UNUSED_E6.S
rmv5/OP_UNUSED_E7.S
rmv5/OP_UNUSED_E8.S
rmv5/OP_UNUSED_E9.S
rmv5/OP_UNUSED_EA.S
rmv5/OP_UNUSED_EB.S
rmv5/OP_UNUSED_EC.S
rmv5/OP_UNUSED_ED.S
rmv5/OP_UNUSED_EF.S
rmv5/OP_UNUSED_F1.S
rmv5/OP_UNUSED_FC.S
rmv5/OP_UNUSED_FD.S
rmv5/OP_UNUSED_FE.S
rmv5/OP_UNUSED_FF.S
rmv5/OP_USHR_INT.S
rmv5/OP_USHR_INT_2ADDR.S
rmv5/OP_USHR_INT_LIT8.S
rmv5/OP_USHR_LONG.S
rmv5/OP_USHR_LONG_2ADDR.S
rmv5/OP_XOR_INT.S
rmv5/OP_XOR_INT_2ADDR.S
rmv5/OP_XOR_INT_LIT16.S
rmv5/OP_XOR_INT_LIT8.S
rmv5/OP_XOR_LONG.S
rmv5/OP_XOR_LONG_2ADDR.S
rmv5/bincmp.S
rmv5/binop.S
rmv5/binop2addr.S
rmv5/binopLit16.S
rmv5/binopLit8.S
rmv5/binopWide.S
rmv5/binopWide2addr.S
rmv5/debug.c
rmv5/entry.S
rmv5/footer.S
rmv5/header.S
rmv5/stub.S
rmv5/unop.S
rmv5/unopNarrower.S
rmv5/unopWide.S
rmv5/unopWider.S
rmv5/unused.S
rmv5/zcmp.S
/OP_ADD_DOUBLE.c
/OP_ADD_DOUBLE_2ADDR.c
/OP_ADD_FLOAT.c
/OP_ADD_FLOAT_2ADDR.c
/OP_ADD_INT.c
/OP_ADD_INT_2ADDR.c
/OP_ADD_INT_LIT16.c
/OP_ADD_INT_LIT8.c
/OP_ADD_LONG.c
/OP_ADD_LONG_2ADDR.c
/OP_AGET.c
/OP_AGET_BOOLEAN.c
/OP_AGET_BYTE.c
/OP_AGET_CHAR.c
/OP_AGET_OBJECT.c
/OP_AGET_SHORT.c
/OP_AGET_WIDE.c
/OP_AND_INT.c
/OP_AND_INT_2ADDR.c
/OP_AND_INT_LIT16.c
/OP_AND_INT_LIT8.c
/OP_AND_LONG.c
/OP_AND_LONG_2ADDR.c
/OP_APUT.c
/OP_APUT_BOOLEAN.c
/OP_APUT_BYTE.c
/OP_APUT_CHAR.c
/OP_APUT_OBJECT.c
/OP_APUT_SHORT.c
/OP_APUT_WIDE.c
/OP_ARRAY_LENGTH.c
/OP_CHECK_CAST.c
/OP_CMPG_DOUBLE.c
/OP_CMPG_FLOAT.c
/OP_CMPL_DOUBLE.c
/OP_CMPL_FLOAT.c
/OP_CMP_LONG.c
/OP_CONST.c
/OP_CONST_16.c
/OP_CONST_4.c
/OP_CONST_CLASS.c
/OP_CONST_HIGH16.c
/OP_CONST_STRING.c
/OP_CONST_STRING_JUMBO.c
/OP_CONST_WIDE.c
/OP_CONST_WIDE_16.c
/OP_CONST_WIDE_32.c
/OP_CONST_WIDE_HIGH16.c
/OP_DIV_DOUBLE.c
/OP_DIV_DOUBLE_2ADDR.c
/OP_DIV_FLOAT.c
/OP_DIV_FLOAT_2ADDR.c
/OP_DIV_INT.c
/OP_DIV_INT_2ADDR.c
/OP_DIV_INT_LIT16.c
/OP_DIV_INT_LIT8.c
/OP_DIV_LONG.c
/OP_DIV_LONG_2ADDR.c
/OP_DOUBLE_TO_FLOAT.c
/OP_DOUBLE_TO_INT.c
/OP_DOUBLE_TO_LONG.c
/OP_EXECUTE_INLINE.c
/OP_FILLED_NEW_ARRAY.c
/OP_FILLED_NEW_ARRAY_RANGE.c
/OP_FILL_ARRAY_DATA.c
/OP_FLOAT_TO_DOUBLE.c
/OP_FLOAT_TO_INT.c
/OP_FLOAT_TO_LONG.c
/OP_GOTO.c
/OP_GOTO_16.c
/OP_GOTO_32.c
/OP_IF_EQ.c
/OP_IF_EQZ.c
/OP_IF_GE.c
/OP_IF_GEZ.c
/OP_IF_GT.c
/OP_IF_GTZ.c
/OP_IF_LE.c
/OP_IF_LEZ.c
/OP_IF_LT.c
/OP_IF_LTZ.c
/OP_IF_NE.c
/OP_IF_NEZ.c
/OP_IGET.c
/OP_IGET_BOOLEAN.c
/OP_IGET_BYTE.c
/OP_IGET_CHAR.c
/OP_IGET_OBJECT.c
/OP_IGET_OBJECT_QUICK.c
/OP_IGET_QUICK.c
/OP_IGET_SHORT.c
/OP_IGET_WIDE.c
/OP_IGET_WIDE_QUICK.c
/OP_INSTANCE_OF.c
/OP_INT_TO_BYTE.c
/OP_INT_TO_CHAR.c
/OP_INT_TO_DOUBLE.c
/OP_INT_TO_FLOAT.c
/OP_INT_TO_LONG.c
/OP_INT_TO_SHORT.c
/OP_INVOKE_DIRECT.c
/OP_INVOKE_DIRECT_EMPTY.c
/OP_INVOKE_DIRECT_RANGE.c
/OP_INVOKE_INTERFACE.c
/OP_INVOKE_INTERFACE_RANGE.c
/OP_INVOKE_STATIC.c
/OP_INVOKE_STATIC_RANGE.c
/OP_INVOKE_SUPER.c
/OP_INVOKE_SUPER_QUICK.c
/OP_INVOKE_SUPER_QUICK_RANGE.c
/OP_INVOKE_SUPER_RANGE.c
/OP_INVOKE_VIRTUAL.c
/OP_INVOKE_VIRTUAL_QUICK.c
/OP_INVOKE_VIRTUAL_QUICK_RANGE.c
/OP_INVOKE_VIRTUAL_RANGE.c
/OP_IPUT.c
/OP_IPUT_BOOLEAN.c
/OP_IPUT_BYTE.c
/OP_IPUT_CHAR.c
/OP_IPUT_OBJECT.c
/OP_IPUT_OBJECT_QUICK.c
/OP_IPUT_QUICK.c
/OP_IPUT_SHORT.c
/OP_IPUT_WIDE.c
/OP_IPUT_WIDE_QUICK.c
/OP_LONG_TO_DOUBLE.c
/OP_LONG_TO_FLOAT.c
/OP_LONG_TO_INT.c
/OP_MONITOR_ENTER.c
/OP_MONITOR_EXIT.c
/OP_MOVE.c
/OP_MOVE_16.c
/OP_MOVE_EXCEPTION.c
/OP_MOVE_FROM16.c
/OP_MOVE_OBJECT.c
/OP_MOVE_OBJECT_16.c
/OP_MOVE_OBJECT_FROM16.c
/OP_MOVE_RESULT.c
/OP_MOVE_RESULT_OBJECT.c
/OP_MOVE_RESULT_WIDE.c
/OP_MOVE_WIDE.c
/OP_MOVE_WIDE_16.c
/OP_MOVE_WIDE_FROM16.c
/OP_MUL_DOUBLE.c
/OP_MUL_DOUBLE_2ADDR.c
/OP_MUL_FLOAT.c
/OP_MUL_FLOAT_2ADDR.c
/OP_MUL_INT.c
/OP_MUL_INT_2ADDR.c
/OP_MUL_INT_LIT16.c
/OP_MUL_INT_LIT8.c
/OP_MUL_LONG.c
/OP_MUL_LONG_2ADDR.c
/OP_NEG_DOUBLE.c
/OP_NEG_FLOAT.c
/OP_NEG_INT.c
/OP_NEG_LONG.c
/OP_NEW_ARRAY.c
/OP_NEW_INSTANCE.c
/OP_NOP.c
/OP_NOT_INT.c
/OP_NOT_LONG.c
/OP_OR_INT.c
/OP_OR_INT_2ADDR.c
/OP_OR_INT_LIT16.c
/OP_OR_INT_LIT8.c
/OP_OR_LONG.c
/OP_OR_LONG_2ADDR.c
/OP_PACKED_SWITCH.c
/OP_REM_DOUBLE.c
/OP_REM_DOUBLE_2ADDR.c
/OP_REM_FLOAT.c
/OP_REM_FLOAT_2ADDR.c
/OP_REM_INT.c
/OP_REM_INT_2ADDR.c
/OP_REM_INT_LIT16.c
/OP_REM_INT_LIT8.c
/OP_REM_LONG.c
/OP_REM_LONG_2ADDR.c
/OP_RETURN.c
/OP_RETURN_OBJECT.c
/OP_RETURN_VOID.c
/OP_RETURN_WIDE.c
/OP_RSUB_INT.c
/OP_RSUB_INT_LIT8.c
/OP_SGET.c
/OP_SGET_BOOLEAN.c
/OP_SGET_BYTE.c
/OP_SGET_CHAR.c
/OP_SGET_OBJECT.c
/OP_SGET_SHORT.c
/OP_SGET_WIDE.c
/OP_SHL_INT.c
/OP_SHL_INT_2ADDR.c
/OP_SHL_INT_LIT8.c
/OP_SHL_LONG.c
/OP_SHL_LONG_2ADDR.c
/OP_SHR_INT.c
/OP_SHR_INT_2ADDR.c
/OP_SHR_INT_LIT8.c
/OP_SHR_LONG.c
/OP_SHR_LONG_2ADDR.c
/OP_SPARSE_SWITCH.c
/OP_SPUT.c
/OP_SPUT_BOOLEAN.c
/OP_SPUT_BYTE.c
/OP_SPUT_CHAR.c
/OP_SPUT_OBJECT.c
/OP_SPUT_SHORT.c
/OP_SPUT_WIDE.c
/OP_SUB_DOUBLE.c
/OP_SUB_DOUBLE_2ADDR.c
/OP_SUB_FLOAT.c
/OP_SUB_FLOAT_2ADDR.c
/OP_SUB_INT.c
/OP_SUB_INT_2ADDR.c
/OP_SUB_LONG.c
/OP_SUB_LONG_2ADDR.c
/OP_THROW.c
/OP_UNUSED_3E.c
/OP_UNUSED_3F.c
/OP_UNUSED_40.c
/OP_UNUSED_41.c
/OP_UNUSED_42.c
/OP_UNUSED_43.c
/OP_UNUSED_73.c
/OP_UNUSED_79.c
/OP_UNUSED_7A.c
/OP_UNUSED_E3.c
/OP_UNUSED_E4.c
/OP_UNUSED_E5.c
/OP_UNUSED_E6.c
/OP_UNUSED_E7.c
/OP_UNUSED_E8.c
/OP_UNUSED_E9.c
/OP_UNUSED_EA.c
/OP_UNUSED_EB.c
/OP_UNUSED_EC.c
/OP_UNUSED_ED.c
/OP_UNUSED_EF.c
/OP_UNUSED_F1.c
/OP_UNUSED_FC.c
/OP_UNUSED_FD.c
/OP_UNUSED_FE.c
/OP_UNUSED_FF.c
/OP_USHR_INT.c
/OP_USHR_INT_2ADDR.c
/OP_USHR_INT_LIT8.c
/OP_USHR_LONG.c
/OP_USHR_LONG_2ADDR.c
/OP_XOR_INT.c
/OP_XOR_INT_2ADDR.c
/OP_XOR_INT_LIT16.c
/OP_XOR_INT_LIT8.c
/OP_XOR_LONG.c
/OP_XOR_LONG_2ADDR.c
/footer.c
/header.c
/opcommon.c
ommon/asm-constants.h
onfig-armv5
onfig-desktop
esktop/entry.c
en-mterp.py
ut/InterpAsm-armv5.S
ut/InterpAsm-desktop.S
ut/InterpC-armv5.c
ut/InterpC-desktop.c
ebuild.sh
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