History log of /external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
79aa3417eb6f58d668aadfedf075240a41d35a26 17-Mar-2012 Craig Topper <craig.topper@gmail.com> Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
015f228861ef9b337366f92f637d4e8d624bb006 04-Mar-2012 Craig Topper <craig.topper@gmail.com> Use uint16_t to store registers in callee saved register tables to reduce size of static data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
31d157ae1ac2cd9c787dc3c1d28e64c682803844 18-Feb-2012 Jia Liu <proljc@gmail.com> Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
2d28617de2b0b731c08d1af9e830f31e14ac75b4 19-Jul-2011 Evan Cheng <evan.cheng@apple.com> Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for
better location welcome).


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
0e6a052331f674dd70e28af41f654a7874405eab 18-Jul-2011 Evan Cheng <evan.cheng@apple.com> Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
c60f9b752381baa6c4b80c0739034660f1748c84 14-Jul-2011 Evan Cheng <evan.cheng@apple.com> Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
d5b03f252c0db6b49a242abab63d7c5a260fceae 28-Jun-2011 Evan Cheng <evan.cheng@apple.com> Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
6844f7bcdec8c2691c8d1067d90e4a02cf658c27 28-Jun-2011 Evan Cheng <evan.cheng@apple.com> Hide more details in tablegen generated MCRegisterInfo ctor function.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
73f50d9bc3bd46cc0abeba9bb0d46977ba1aea42 27-Jun-2011 Evan Cheng <evan.cheng@apple.com> Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc
into XXXGenRegisterInfo.inc.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d 24-Jun-2011 Evan Cheng <evan.cheng@apple.com> Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
6e032942cf58d1c41f88609a1cec74eb74940ecd 30-May-2011 Rafael Espindola <rafael.espindola@gmail.com> Use the dwarf->llvm mapping to print register names in the cfi
directives.

Fixes PR9826.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
16c29b5f285f375be53dabaa73e3e91107485fe4 10-Jan-2011 Anton Korobeynikov <asl@math.spbu.ru> Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
94c5ae08750f314bc3cf1bf882b686244a3927d9 28-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move more PEI-related hooks to TFI

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
d9e3385ced2dc887e2fe8e1c071bd2611e4d3ede 19-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move getInitialFrameState() to TargetFrameInfo

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
d0c38176690e9602a93a20a43f1bd084564a8116 18-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move hasFP() and few related hooks to TargetFrameInfo.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
33464912237efaa0ed7060829e66b59055bdd48b 15-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
fcb4a8ead3cd8d9540d5eaa448af5d14a0ee341a 27-Aug-2010 Jim Grosbach <grosbach@apple.com> Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
to try to re-use scavenged frame index reference registers. rdar://8277890

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
99534bb81a0d945edd61d4db17549bde8449f94c 09-Aug-2010 Kalle Raiskila <kalle.raiskila@nokia.com> Have SPU handle halfvec stores aligned by 8 bytes.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
7431beaba2a01c3fe299c861b2ec85cbf1dc81c4 17-Jul-2010 Bill Wendling <isanbard@gmail.com> Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
thus is a much more meaningful name.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
d258c49589f3befd161a5ab27fd635b1dbdafc10 08-Jul-2010 Kalle Raiskila <kalle.raiskila@nokia.com> Switch SPU calling convention (function arguments)
to a Tablegen implementation.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
6f07bd6ae8c2b11e78f351d7751d1e9b32f38a75 02-Jun-2010 Rafael Espindola <rafael.espindola@gmail.com> cleanup

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
b92187a4103dca24c3767c380f63593d1f6161a7 14-May-2010 Bill Wendling <isanbard@gmail.com> Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
e566763b1915c7a4821ce95937b763724d271fec 21-Apr-2010 Evan Cheng <evan.cheng@apple.com> Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
1bd7335a17010bd4d8f86736cf73cac9f3fb80a5 08-Apr-2010 Benjamin Kramer <benny.kra@googlemail.com> Use twines to simplify calls to report_fatal_error. For code size and readability.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
75361b69f3f327842b9dad69fa7f28ae3b688412 08-Apr-2010 Chris Lattner <sabre@nondot.org> rename llvm::llvm_report_error -> llvm::report_fatal_error



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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
a267b0076e7887f5566e635ba35790f24d4524d9 05-Apr-2010 Chris Lattner <sabre@nondot.org> remove the MMI pointer from MachineFrameInfo.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
c7f3ace20c325521c68335a1689645b43b06ddf0 02-Apr-2010 Chris Lattner <sabre@nondot.org> use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
7e09debcf17b2430ee95e547460ccc0fff4b0a87 29-Mar-2010 Benjamin Kramer <benny.kra@googlemail.com> Remove a bunch of integer width predicate functions in favor of MathExtras.
Most of these were unused, some of them were wrong and unused (isS16Constant<short>,
isS10Constant<short>).


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
e27e02b1a48a715be93952a7cef49cdd19e9593b 29-Mar-2010 Chris Lattner <sabre@nondot.org> From Kalle Raiskila:

"the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions:
-in vararg handling, registers are marked to be live, to not confuse the register scavenger
-function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the register scavenger emergency spill slot, which is not used as there is no stack."



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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
63d7836267298f5b6cde43f0a89acbabfc109f48 14-Mar-2010 Chris Lattner <sabre@nondot.org> get MMI out of the label uniquing business, just go to MCContext
to get unique assembler temporary labels.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
2e9919a5e5fe76f4b1e3290103c4bfd149ebba9c 14-Mar-2010 Chris Lattner <sabre@nondot.org> Now that DBG_LABEL is updated, we can finally make MachineMove
contain an MCSymbol instead of a label index.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
6ffcccab5191ef1dcde876800c24a1f58b3b7ad8 14-Mar-2010 Chris Lattner <sabre@nondot.org> change the DBG_LABEL MachineInstr to always be created
with an MCSymbol instead of an immediate.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
dff4b4c5a7cc894d3b4b6c6e779ea8f47fa50630 09-Mar-2010 Jim Grosbach <grosbach@apple.com> Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).

No functionality change.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
0d0840108f7ae49b47689da54c53686c358f22cf 25-Feb-2010 Scott Michel <scottm@aero.org> Revert this patch for the time being. Needs more testing.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
3ce2b097973e4b1a553373471cf2a5d9805903c5 25-Feb-2010 Scott Michel <scottm@aero.org> Large stack frame patch for the CellSPU: handle stack frames that exceed 8176
(511*16) bytes register displacement (D-form).

NOTE: This is a potential headache, given the SPU's local core limitations,
allowing the software developer to commit stack overrun suicide unknowingly.
Also, large SPU stack frames will cause code size explosion. But, one presumes
that the software developer knows what they're doing...

Contributed by Kalle.Raiskila@nokia.com, edited slightly before commit.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
b9c2fd964ee7dd7823ac71db8443055e4d0f1c15 12-Nov-2009 David Greene <greened@obbligato.org> Make the MachineFunction argument of getFrameRegister const.

This also fixes a build error.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
b58f498f7502e7e1833decbbbb4df771367c7341 07-Oct-2009 Jim Grosbach <grosbach@apple.com> Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.



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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
4437ae213d5435390f0750213b53ec807c047f22 23-Aug-2009 Chris Lattner <sabre@nondot.org> eliminate uses of cerr()


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
2cfd52c507bd5790457a171eb9bcb39019cc6860 29-Jul-2009 Chris Lattner <sabre@nondot.org> Give getPointerRegClass() a "kind" value so that targets can
support multiple different pointer register classes.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
dac237e18209b697a8ba122d0ddd9cad4dfba1f8 08-Jul-2009 Torok Edwin <edwintorok@gmail.com> Implement changes from Chris's feedback.
Finish converting lib/Target.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
ef4cfc749a61d0d0252196c957697436ba7ec068 23-Feb-2009 Bill Wendling <isanbard@gmail.com> Propagate debug loc info through prologue/epilogue.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
01b36e6436a1d1d1dacdea777ae1dc7472f2fdd9 13-Feb-2009 Dale Johannesen <dalej@apple.com> Remove non-DebugLoc versions of BuildMI from Alpha and Cell.



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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
770bcc7b15adbc978800db70dbb1c3c22913b52c 06-Feb-2009 Evan Cheng <evan.cheng@apple.com> Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.

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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
02d711b93e3e0d2f0dae278360abe35305913e23 31-Dec-2008 Scott Michel <scottm@aero.org> - Start moving target-dependent nodes that could be represented by an
instruction sequence and cannot ordinarily be simplified by DAGcombine
into the various target description files or SPUDAGToDAGISel.cpp.

This makes some 64-bit operations legal.

- Eliminate target-dependent ISD enums.

- Update tests.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
f0569be4a948c7ed816bfa2b8774a5a18458ee23 27-Dec-2008 Scott Michel <scottm@aero.org> - Remove Tilmann's custom truncate lowering: it completely hosed over
DAGcombine's ability to find reasons to remove truncates when they were not
needed. Consequently, the CellSPU backend would produce correct, but _really
slow and horrible_, code.

Replaced with instruction sequences that do the equivalent truncation in
SPUInstrInfo.td.

- Re-examine how unaligned loads and stores work. Generated unaligned
load code has been tested on the CellSPU hardware; see the i32operations.c
and i64operations.c in CodeGen/CellSPU/useful-harnesses. (While they may be
toy test code, it does prove that some real world code does compile
correctly.)

- Fix truncating stores in bug 3193 (note: unpack_df.ll will still make llc
fault because i64 ult is not yet implemented.)

- Added i64 eq and neq for setcc and select/setcc; started new instruction
information file for them in SPU64InstrInfo.td. Additional i64 operations
should be added to this file and not to SPUInstrInfo.td.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
771138ca915591d804f731e1e0e189cf0a2a6803 08-Nov-2008 Scott Michel <scottm@aero.org> CellSPU: Fix prologue/epilogue emission when function contains calls but
theframe size is 0; the prologue and epilogue should be emitted in this case.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
d735b8019b0f297d7c14b55adcd887af24d8e602 03-Oct-2008 Dan Gohman <gohman@apple.com> Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.


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/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
d5d8191b202c0f96f33c826c93d9796451ff7fca 27-Sep-2008 Bill Wendling <isanbard@gmail.com> Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:

/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
36a55023c1daae86afedf6e6672c0adad7bbe5ea 26-Sep-2008 Evan Cheng <evan.cheng@apple.com> Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
dc2fbddd9d204e904b8e61d1da1428579e7c55af 11-Jul-2008 Dan Gohman <gohman@apple.com> Trim unnecessary #includes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
4406604047423576e36657c7ede266ca42e79642 01-Jul-2008 Dan Gohman <gohman@apple.com> Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
cbe615f7eb8586fb38c5e01be95a893b8432080c 01-Jul-2008 Dan Gohman <gohman@apple.com> Don't use ISD namespace opcodes for MachineInstrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52932 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
eecfa369eb91838fbd833183717b2579a0127acb 29-May-2008 Bill Wendling <isanbard@gmail.com> Remove more iostream header includes. Needed to implement a "FlushStream"
function to flush a specified std::ostream.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51705 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
ca1267c02b025cc719190b05f9e1a5d174a9caf7 31-Mar-2008 Evan Cheng <evan.cheng@apple.com> Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
4aefd6b7d4dadf8109221a89742725c116d8f8e0 20-Feb-2008 Anton Korobeynikov <asl@math.spbu.ru> Fix newly-introduced 4.3 warnings


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
6f0d024a534af18d9e60b3ea757376cd8a3a980e 10-Feb-2008 Dan Gohman <gohman@apple.com> Rename MRegisterInfo to TargetRegisterInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
bb81d97feb396a8bb21d074db1c57e9f66525f40 31-Jan-2008 Evan Cheng <evan.cheng@apple.com> Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46609 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
7f9ba9bb3c969eab32118dd21f15b4b74843c5c1 30-Jan-2008 Scott Michel <scottm@aero.org> More cleanups for CellSPU:

- Expand tabs... (poss 80-col violations, will get them later...)
- Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single
function, simplifying maintenance. Also reduced custom instruction
generation for SPUvecinsert/INSERT_MASK.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
43dbe05279b753aabda571d9c83eaeb36987001a 07-Jan-2008 Owen Anderson <resistor@mac.com> Move even more functionality from MRegisterInfo into TargetInstrInfo.

Some day I'll get it all moved over...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
f6372aa1cc568df19da7c5023e83c75aa9404a07 01-Jan-2008 Owen Anderson <resistor@mac.com> Move some more instruction creation methods from RegisterInfo into InstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
d10fd9791c20fd8368fa0ce94b626b769c6c8ba0 31-Dec-2007 Owen Anderson <resistor@mac.com> Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
84bc5427d6883f73cfeae3da640acd011d35c006 31-Dec-2007 Chris Lattner <sabre@nondot.org> Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
8aa797aa51cd4ea1ec6f46f4891a6897944b75b2 31-Dec-2007 Chris Lattner <sabre@nondot.org> Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90 30-Dec-2007 Chris Lattner <sabre@nondot.org> Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
4ee451de366474b9c228b4e5fa573795a715216d 29-Dec-2007 Chris Lattner <sabre@nondot.org> Remove attribution from file headers, per discussion on llvmdev.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
86c041f50e17f7fcd18193ff49e58379924d6472 20-Dec-2007 Scott Michel <scottm@aero.org> More working CellSPU tests:
- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
9999e685ea86e9cb8c8d59bfb2f3f4c20acc4de4 19-Dec-2007 Scott Michel <scottm@aero.org> Add new immed16.ll test case, fix CellSPU errata to make test case work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
504c369213efb263136bb048e79af3516511c040 17-Dec-2007 Scott Michel <scottm@aero.org> - Restore some i8 functionality in CellSPU
- New test case: nand.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
7db2811f6edc454d0260edcca1c62bb4d8e0ae49 05-Dec-2007 Evan Cheng <evan.cheng@apple.com> Update foldMemoryOperand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44621 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
d64b5c82b97ad1b74eb9fd2f23257a7899b0c307 05-Dec-2007 Evan Cheng <evan.cheng@apple.com> Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
2466c3766dee7e65793bded413d02834dbc75629 05-Dec-2007 Scott Michel <scottm@aero.org> Updated source file headers to llvm coding standard.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp
564427eabdc4cb25e1bc9eb15c589e9451fc29a2 05-Dec-2007 Scott Michel <scottm@aero.org> Main CellSPU backend files checked in. Intrinsics and autoconf files
remain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44595 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPURegisterInfo.cpp