31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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061efcfb3e79899493d857f49e50d09f29037e0a |
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04-Feb-2012 |
Andrew Trick <atrick@apple.com> |
TargetPassConfig: confine the MC configuration to TargetMachine. Passes prior to instructon selection are now split into separate configurable stages. Header dependencies are simplified. The bulk of this diff is simply removal of the silly DisableVerify flags. Sorry for the target header churn. Attempting to stabilize them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149754 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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843ee2e6a46b2b2d74a84c2eea68dec35cb359cc |
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03-Feb-2012 |
Andrew Trick <atrick@apple.com> |
Added TargetPassConfig. The first little step toward configuring codegen passes. Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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8a8d479214745c82ef00f08d4e4f1c173b5f9ce2 |
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02-Dec-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Move global variables in TargetMachine into new TargetOptions class. As an API change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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b95fc31aa2e5a0a0b9ee1909d1cb949577c5aa16 |
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16-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink codegen optimization level into MCCodeGenInfo along side relocation model and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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34ad6db8b958fdc0d38e122edf753b5326e69b03 |
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20-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo. - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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439661395fd2a2a832dba01c65bc88718528313c |
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19-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Introduce MCCodeGenInfo, which keeps information that can affect codegen (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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276365dd4bc0c2160f91fd8062ae1fc90c86c324 |
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30-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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3d820baf195973de23d6520d692acc6bfb43bfe9 |
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12-Apr-2011 |
Wesley Peck <peckw@wesleypeck.com> |
Add scheduling information for the MBlaze backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129311 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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16c29b5f285f375be53dabaa73e3e91107485fe4 |
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10-Jan-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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8397be042766f1913ceaa2b3e6782de0322bbe6a |
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09-Dec-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Reworking the stack layout generated by the MBlaze backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121355 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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33464912237efaa0ed7060829e66b59055bdd48b |
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15-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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4e9141fd4c0040cd7d4d830211f7d27fd98e9338 |
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21-Oct-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Recommit 116986 with capitalization typo fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116993 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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60e7127e862e359eb1b4694e5161da6dc4c2c397 |
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21-Oct-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it compiles on OS X. I'll ensure that it builds on a linux machine before committing again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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13a949071ce2c887ae81db9f6880a660ff33a76d |
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21-Oct-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Major update of the MicroBlaze backend. The new features are: 1. A delay slot filler that searches for valid instructions to fill the delay slot with. Previously NOPs would always be inserted into delay slots. 2. Support for MC based instruction printer added. 3. Support for MC based machine code generation and ELF file generation. ELF file generation does not yet completely work as much of the ELF support infrastructure is still x86/x86-64 specific. 4. General clean up of the MBlaze backend code. Much of the tablegen code has been cleanup and simplified. Bug Fixes: 1. Removed duplicate periods from subtarget feature descriptions. 2. Many of the instructions had bad machine code information in the tablegen files. Much of this has been fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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ff7a562751604a9fe13efc75bd59622244b54d35 |
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11-May-2010 |
Dan Gohman <gohman@apple.com> |
Implement a bunch more TargetSelectionDAGInfo infrastructure. Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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d858e90f039f5fcdc2fa93035e911a5a9505cc50 |
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17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use const qualifiers with TargetLowering. This eliminates several const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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a70f28ce7dc85d0075a7d86da5d7987b6e306bc6 |
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23-Feb-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
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