/external/valgrind/main/VEX/priv/ |
H A D | ir_match.c | 64 setBindee(mi, p->Iex.Binder.binder, e); 68 if (p->Iex.Unop.op != e->Iex.Unop.op) return False; 69 if (!matchWrk(mi, p->Iex.Unop.arg, e->Iex.Unop.arg)) 74 if (p->Iex.Binop.op != e->Iex.Binop.op) return False; 75 if (!matchWrk(mi, p->Iex.Binop.arg1, e->Iex.Binop.arg1)) 77 if (!matchWrk(mi, p->Iex [all...] |
H A D | ir_opt.c | 255 return toBool( isIRAtom(e->Iex.Binop.arg1) 256 && isIRAtom(e->Iex.Binop.arg2) ); 258 return isIRAtom(e->Iex.Load.addr); 278 IRExpr_GetI(ex->Iex.GetI.descr, 279 flatten_Expr(bb, ex->Iex.GetI.ix), 280 ex->Iex.GetI.bias))); 292 IRExpr_Qop(ex->Iex.Qop.op, 293 flatten_Expr(bb, ex->Iex.Qop.arg1), 294 flatten_Expr(bb, ex->Iex.Qop.arg2), 295 flatten_Expr(bb, ex->Iex [all...] |
H A D | host_x86_isel.c | 109 && e->Iex.Const.con->tag == Ico_U8 110 && e->Iex.Const.con->Ico.U8 == 0; 116 && e->Iex.Const.con->tag == Ico_U32 117 && e->Iex.Const.con->Ico.U32 == 0; 123 && e->Iex.Const.con->tag == Ico_U64 124 && e->Iex.Const.con->Ico.U64 == 0ULL; 560 && guard->Iex.Const.con->tag == Ico_U1 561 && guard->Iex.Const.con->Ico.U1 == True) { 745 return lookupIRTemp(env, e->Iex.RdTmp.tmp); 751 X86AMode* amode = iselIntExpr_AMode ( env, e->Iex [all...] |
H A D | host_amd64_isel.c | 275 && e->Iex.Const.con->tag == Ico_U64 276 && e->Iex.Const.con->Ico.U64 == 0ULL; 282 && e->Iex.Const.con->tag == Ico_U32 283 && e->Iex.Const.con->Ico.U32 == 0; 389 vassert(e->Iex.Const.con->tag == Ico_U64); 390 if (fitsIn32Bits(e->Iex.Const.con->Ico.U64)) { 393 AMD64RMI_Imm(toUInt(e->Iex.Const.con->Ico.U64)), 397 return AMD64Instr_Imm64(e->Iex.Const.con->Ico.U64, dst); 402 HReg src = lookupIRTemp(env, e->Iex.RdTmp.tmp); 407 vassert(e->Iex [all...] |
H A D | host_arm_isel.c | 450 && guard->Iex.Const.con->tag == Ico_U1 451 && guard->Iex.Const.con->Ico.U1 == True) { 561 && guard->Iex.Const.con->tag == Ico_U1 562 && guard->Iex.Const.con->Ico.U1 == True) { 676 && (e->Iex.Binop.op == Iop_Add32 || e->Iex.Binop.op == Iop_Sub32) 677 && e->Iex.Binop.arg2->tag == Iex_Const 678 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U32) { 679 Int simm = (Int)e->Iex [all...] |
H A D | host_ppc_isel.c | 725 && guard->Iex.Const.con->tag == Ico_U1 726 && guard->Iex.Const.con->Ico.U1 == True) { 834 && guard->Iex.Const.con->tag == Ico_U1 835 && guard->Iex.Const.con->Ico.U1 == True) { 961 && env->previous_rm->Iex.RdTmp.tmp == mode->Iex.RdTmp.tmp) { 1170 return lookupIRTemp(env, e->Iex.RdTmp.tmp); 1176 if (e->Iex.Load.end != Iend_BE) 1179 am_addr = iselWordExpr_AMode( env, e->Iex.Load.addr, ty/*of xfer*/ ); 1192 switch (e->Iex [all...] |
H A D | host_s390_isel.c | 211 if (expr->tag == Iex_Binop && expr->Iex.Binop.op == Iop_Add64) { 212 IRExpr *arg1 = expr->Iex.Binop.arg1; 213 IRExpr *arg2 = expr->Iex.Binop.arg2; 224 if (arg2->tag == Iex_Const && arg2->Iex.Const.con->tag == Ico_U64) { 225 ULong value = arg2->Iex.Const.con->Ico.U64; 331 switch (expr->Iex.Const.con->tag) { 332 case Ico_U1: value = expr->Iex.Const.con->Ico.U1; break; 333 case Ico_U8: value = expr->Iex.Const.con->Ico.U8; break; 334 case Ico_U16: value = expr->Iex.Const.con->Ico.U16; break; 335 case Ico_U32: value = expr->Iex [all...] |
H A D | ir_defs.c | 955 vex_printf("BIND-%d", e->Iex.Binder.binder); 959 ppIRType(e->Iex.Get.ty); 960 vex_printf("(%d)", e->Iex.Get.offset); 964 ppIRRegArray(e->Iex.GetI.descr); 966 ppIRExpr(e->Iex.GetI.ix); 967 vex_printf(",%d]", e->Iex.GetI.bias); 970 ppIRTemp(e->Iex.RdTmp.tmp); 973 ppIROp(e->Iex.Qop.op); 975 ppIRExpr(e->Iex.Qop.arg1); 977 ppIRExpr(e->Iex [all...] |
H A D | guest_s390_helpers.c | 695 return expr->tag == Iex_Const && expr->Iex.Const.con->tag == Ico_U64; 737 cond = cond_expr->Iex.Const.con->Ico.U64; 738 cc_op = cc_op_expr->Iex.Const.con->Ico.U64; 898 mask = cc_dep2->Iex.Const.con->Ico.U64; 972 mask16 = cc_dep2->Iex.Const.con->Ico.U64; 1014 mask16 = cc_dep2->Iex.Const.con->Ico.U64;
|
H A D | guest_arm_helpers.c | 549 && e->Iex.Const.con->tag == Ico_U32 550 && e->Iex.Const.con->Ico.U32 == n ); 724 IRTemp look_for = cond_n_op->Iex.RdTmp.tmp; 733 && st->Ist.WrTmp.data->Iex.Binop.op == Iop_Or32 734 && isU32(st->Ist.WrTmp.data->Iex.Binop.arg2, (ARMCondAL << 4)))
|
H A D | guest_amd64_helpers.c | 868 && e->Iex.Const.con->tag == Ico_U64 869 && e->Iex.Const.con->Ico.U64 == n );
|
H A D | guest_x86_helpers.c | 771 && e->Iex.Const.con->tag == Ico_U32 772 && e->Iex.Const.con->Ico.U32 == n );
|
/external/valgrind/main/memcheck/ |
H A D | mc_translate.c | 316 TempMapEnt* ent = VG_(indexXA)( mce->tmpMap, a1->Iex.RdTmp.tmp ); 329 TempMapEnt* ent = VG_(indexXA)( mce->tmpMap, a1->Iex.RdTmp.tmp ); 917 && e->Iex.Const.con->tag == Ico_U32 918 && e->Iex.Const.con->Ico.U32 == 0 ); 925 && e->Iex.Const.con->tag == Ico_U64 926 && e->Iex.Const.con->Ico.U64 == 0 ); 1176 newShadowTmpV(mce, atom->Iex.RdTmp.tmp); 1177 assign('V', mce, findShadowTmpV(mce, atom->Iex.RdTmp.tmp), 3706 return shadow_GET( mce, e->Iex.Get.offset, e->Iex [all...] |
/external/valgrind/main/VEX/ |
H A D | test_main.c | 307 addr = data->Iex.LDle.addr; 308 sz = sizeofIRType(data->Iex.LDle.ty); 611 if (a1->tag == Iex_RdTmp && a1->Iex.RdTmp.tmp < mce->n_originalTmps) 622 if (a1->tag == Iex_RdTmp && a1->Iex.RdTmp.tmp >= mce->n_originalTmps) 1082 newShadowTmp(mce, atom->Iex.RdTmp.tmp); 1083 assign(mce->bb, findShadowTmp(mce, atom->Iex.RdTmp.tmp), 2122 return shadow_GET( mce, e->Iex.Get.offset, e->Iex.Get.ty ); 2125 return shadow_GETI( mce, e->Iex.GetI.descr, 2126 e->Iex [all...] |
/external/valgrind/main/coregrind/ |
H A D | m_translate.c | 391 if (e->Iex.Get.offset != offset_SP) goto case2; 392 if (e->Iex.Get.ty != typeof_SP) goto case2; 403 if (e->Iex.Binop.arg1->tag != Iex_RdTmp) goto case3; 404 if (!get_SP_delta(e->Iex.Binop.arg1->Iex.RdTmp.tmp, &delta)) goto case3; 405 if (e->Iex.Binop.arg2->tag != Iex_Const) goto case3; 406 if (!IS_ADD_OR_SUB(e->Iex.Binop.op)) goto case3; 407 con = GET_CONST(e->Iex.Binop.arg2->Iex.Const.con); 409 if (IS_ADD(e->Iex [all...] |
/external/valgrind/main/drd/ |
H A D | drd_load_store.c | 286 && bb->stmts[i]->Ist.WrTmp.tmp == addr_expr->Iex.RdTmp.tmp) 289 if (e->tag == Iex_Get && e->Iex.Get.offset == STACK_POINTER_OFFSET) 501 data->Iex.Load.addr, 502 sizeofIRType(data->Iex.Load.ty));
|
/external/valgrind/main/lackey/ |
H A D | lk_main.c | 727 addEvent_Dr( sbOut, data->Iex.Load.addr, 728 sizeofIRType(data->Iex.Load.ty) );
|
/external/valgrind/main/coregrind/m_gdbserver/ |
H A D | m_gdbserver.c | 1053 sb_in->next->Iex.Const.con->Ico.U64 1054 : sb_in->next->Iex.Const.con->Ico.U32); 1057 (sb_in, layout, vge, sb_in->next->Iex.RdTmp.tmp, irsb);
|
/external/valgrind/tsan/ |
H A D | ts_valgrind.cc | 1033 IRConst *con = next->Iex.Const.con; 1212 data->Iex.Load.addr, 1213 sizeofIRType(data->Iex.Load.ty),
|
/external/valgrind/main/exp-dhat/ |
H A D | dh_main.c | 923 IRExpr* aexpr = data->Iex.Load.addr; 927 sizeofIRType(data->Iex.Load.ty),
|
/external/valgrind/main/cachegrind/ |
H A D | cg_main.c | 1032 IRExpr* aexpr = data->Iex.Load.addr; 1035 addEvent_Dr( &cgs, curr_inode, sizeofIRType(data->Iex.Load.ty),
|
/external/valgrind/main/callgrind/ |
H A D | main.c | 1003 IRExpr* aexpr = data->Iex.Load.addr; 1007 sizeofIRType(data->Iex.Load.ty), aexpr );
|
/external/valgrind/main/VEX/pub/ |
H A D | libvex_ir.h | 1340 of expression this is. 'Iex' is the union that holds the fields. If 1343 'e.Iex.Load.<fieldname>'. 1534 } Iex; member in struct:_IRExpr
|
/external/valgrind/main/exp-sgcheck/ |
H A D | sg_main.c | 2252 data->Iex.Load.addr, 2253 sizeofIRType(data->Iex.Load.ty),
|
/external/valgrind/main/helgrind/ |
H A D | hg_main.c | 4449 data->Iex.Load.addr, 4450 sizeofIRType(data->Iex.Load.ty),
|