1//===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the PPC specific subclass of TargetSubtargetInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPCSubtarget.h"
15#include "PPCRegisterInfo.h"
16#include "PPC.h"
17#include "llvm/GlobalValue.h"
18#include "llvm/Target/TargetMachine.h"
19#include "llvm/Support/TargetRegistry.h"
20#include <cstdlib>
21
22#define GET_SUBTARGETINFO_TARGET_DESC
23#define GET_SUBTARGETINFO_CTOR
24#include "PPCGenSubtargetInfo.inc"
25
26using namespace llvm;
27
28#if defined(__APPLE__)
29#include <mach/mach.h>
30#include <mach/mach_host.h>
31#include <mach/host_info.h>
32#include <mach/machine.h>
33
34/// GetCurrentPowerPCFeatures - Returns the current CPUs features.
35static const char *GetCurrentPowerPCCPU() {
36  host_basic_info_data_t hostInfo;
37  mach_msg_type_number_t infoCount;
38
39  infoCount = HOST_BASIC_INFO_COUNT;
40  host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t)&hostInfo,
41            &infoCount);
42
43  if (hostInfo.cpu_type != CPU_TYPE_POWERPC) return "generic";
44
45  switch(hostInfo.cpu_subtype) {
46  case CPU_SUBTYPE_POWERPC_601:   return "601";
47  case CPU_SUBTYPE_POWERPC_602:   return "602";
48  case CPU_SUBTYPE_POWERPC_603:   return "603";
49  case CPU_SUBTYPE_POWERPC_603e:  return "603e";
50  case CPU_SUBTYPE_POWERPC_603ev: return "603ev";
51  case CPU_SUBTYPE_POWERPC_604:   return "604";
52  case CPU_SUBTYPE_POWERPC_604e:  return "604e";
53  case CPU_SUBTYPE_POWERPC_620:   return "620";
54  case CPU_SUBTYPE_POWERPC_750:   return "750";
55  case CPU_SUBTYPE_POWERPC_7400:  return "7400";
56  case CPU_SUBTYPE_POWERPC_7450:  return "7450";
57  case CPU_SUBTYPE_POWERPC_970:   return "970";
58  default: ;
59  }
60
61  return "generic";
62}
63#endif
64
65
66PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
67                           const std::string &FS, bool is64Bit)
68  : PPCGenSubtargetInfo(TT, CPU, FS)
69  , StackAlignment(16)
70  , DarwinDirective(PPC::DIR_NONE)
71  , IsGigaProcessor(false)
72  , Has64BitSupport(false)
73  , Use64BitRegs(false)
74  , IsPPC64(is64Bit)
75  , HasAltivec(false)
76  , HasFSQRT(false)
77  , HasSTFIWX(false)
78  , IsBookE(false)
79  , HasLazyResolverStubs(false)
80  , IsJITCodeModel(false)
81  , TargetTriple(TT) {
82
83  // Determine default and user specified characteristics
84  std::string CPUName = CPU;
85  if (CPUName.empty())
86    CPUName = "generic";
87#if defined(__APPLE__)
88  if (CPUName == "generic")
89    CPUName = GetCurrentPowerPCCPU();
90#endif
91
92  // Parse features string.
93  ParseSubtargetFeatures(CPUName, FS);
94
95  // Initialize scheduling itinerary for the specified CPU.
96  InstrItins = getInstrItineraryForCPU(CPUName);
97
98  // If we are generating code for ppc64, verify that options make sense.
99  if (is64Bit) {
100    Has64BitSupport = true;
101    // Silently force 64-bit register use on ppc64.
102    Use64BitRegs = true;
103  }
104
105  // If the user requested use of 64-bit regs, but the cpu selected doesn't
106  // support it, ignore.
107  if (use64BitRegs() && !has64BitSupport())
108    Use64BitRegs = false;
109
110  // Set up darwin-specific properties.
111  if (isDarwin())
112    HasLazyResolverStubs = true;
113}
114
115/// SetJITMode - This is called to inform the subtarget info that we are
116/// producing code for the JIT.
117void PPCSubtarget::SetJITMode() {
118  // JIT mode doesn't want lazy resolver stubs, it knows exactly where
119  // everything is.  This matters for PPC64, which codegens in PIC mode without
120  // stubs.
121  HasLazyResolverStubs = false;
122
123  // Calls to external functions need to use indirect calls
124  IsJITCodeModel = true;
125}
126
127
128/// hasLazyResolverStub - Return true if accesses to the specified global have
129/// to go through a dyld lazy resolution stub.  This means that an extra load
130/// is required to get the address of the global.
131bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV,
132                                       const TargetMachine &TM) const {
133  // We never have stubs if HasLazyResolverStubs=false or if in static mode.
134  if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
135    return false;
136  // If symbol visibility is hidden, the extra load is not needed if
137  // the symbol is definitely defined in the current translation unit.
138  bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
139  if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
140    return false;
141  return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
142         GV->hasCommonLinkage() || isDecl;
143}
144
145bool PPCSubtarget::enablePostRAScheduler(
146           CodeGenOpt::Level OptLevel,
147           TargetSubtargetInfo::AntiDepBreakMode& Mode,
148           RegClassVector& CriticalPathRCs) const {
149  if (DarwinDirective == PPC::DIR_440 || DarwinDirective == PPC::DIR_A2)
150    Mode = TargetSubtargetInfo::ANTIDEP_ALL;
151  else
152    Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
153
154  CriticalPathRCs.clear();
155
156  if (isPPC64())
157    CriticalPathRCs.push_back(&PPC::G8RCRegClass);
158  else
159    CriticalPathRCs.push_back(&PPC::GPRCRegClass);
160
161  return OptLevel >= CodeGenOpt::Default;
162}
163
164