1@ RUN: llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s | FileCheck %s
2  .syntax unified
3  .globl _func
4
5@ Check that the assembler can handle the documented syntax from the ARM ARM.
6@ These tests test instruction encodings specific to v7m & v7m (FeatureMClass).
7
8@------------------------------------------------------------------------------
9@ MRS
10@------------------------------------------------------------------------------
11
12        mrs  r0, apsr
13        mrs  r0, iapsr
14        mrs  r0, eapsr
15        mrs  r0, xpsr
16        mrs  r0, ipsr
17        mrs  r0, epsr
18        mrs  r0, iepsr
19        mrs  r0, msp
20        mrs  r0, psp
21        mrs  r0, primask
22        mrs  r0, basepri
23        mrs  r0, basepri_max
24        mrs  r0, faultmask
25        mrs  r0, control
26
27@ CHECK: mrs	r0, apsr                @ encoding: [0xef,0xf3,0x00,0x80]
28@ CHECK: mrs	r0, iapsr               @ encoding: [0xef,0xf3,0x01,0x80]
29@ CHECK: mrs	r0, eapsr               @ encoding: [0xef,0xf3,0x02,0x80]
30@ CHECK: mrs	r0, xpsr                @ encoding: [0xef,0xf3,0x03,0x80]
31@ CHECK: mrs	r0, ipsr                @ encoding: [0xef,0xf3,0x05,0x80]
32@ CHECK: mrs	r0, epsr                @ encoding: [0xef,0xf3,0x06,0x80]
33@ CHECK: mrs	r0, iepsr               @ encoding: [0xef,0xf3,0x07,0x80]
34@ CHECK: mrs	r0, msp                 @ encoding: [0xef,0xf3,0x08,0x80]
35@ CHECK: mrs	r0, psp                 @ encoding: [0xef,0xf3,0x09,0x80]
36@ CHECK: mrs	r0, primask             @ encoding: [0xef,0xf3,0x10,0x80]
37@ CHECK: mrs	r0, basepri             @ encoding: [0xef,0xf3,0x11,0x80]
38@ CHECK: mrs	r0, basepri_max         @ encoding: [0xef,0xf3,0x12,0x80]
39@ CHECK: mrs	r0, faultmask           @ encoding: [0xef,0xf3,0x13,0x80]
40@ CHECK: mrs	r0, control             @ encoding: [0xef,0xf3,0x14,0x80]
41
42@------------------------------------------------------------------------------
43@ MSR
44@------------------------------------------------------------------------------
45
46        msr  apsr, r0
47        msr  iapsr, r0
48        msr  eapsr, r0
49        msr  xpsr, r0
50        msr  ipsr, r0
51        msr  epsr, r0
52        msr  iepsr, r0
53        msr  msp, r0
54        msr  psp, r0
55        msr  primask, r0
56        msr  basepri, r0
57        msr  basepri_max, r0
58        msr  faultmask, r0
59        msr  control, r0
60
61@ CHECK: msr	apsr, r0                @ encoding: [0x80,0xf3,0x00,0x80]
62@ CHECK: msr	iapsr, r0               @ encoding: [0x80,0xf3,0x01,0x80]
63@ CHECK: msr	eapsr, r0               @ encoding: [0x80,0xf3,0x02,0x80]
64@ CHECK: msr	xpsr, r0                @ encoding: [0x80,0xf3,0x03,0x80]
65@ CHECK: msr	ipsr, r0                @ encoding: [0x80,0xf3,0x05,0x80]
66@ CHECK: msr	epsr, r0                @ encoding: [0x80,0xf3,0x06,0x80]
67@ CHECK: msr	iepsr, r0               @ encoding: [0x80,0xf3,0x07,0x80]
68@ CHECK: msr	msp, r0                 @ encoding: [0x80,0xf3,0x08,0x80]
69@ CHECK: msr	psp, r0                 @ encoding: [0x80,0xf3,0x09,0x80]
70@ CHECK: msr	primask, r0             @ encoding: [0x80,0xf3,0x10,0x80]
71@ CHECK: msr	basepri, r0             @ encoding: [0x80,0xf3,0x11,0x80]
72@ CHECK: msr	basepri_max, r0         @ encoding: [0x80,0xf3,0x12,0x80]
73@ CHECK: msr	faultmask, r0           @ encoding: [0x80,0xf3,0x13,0x80]
74@ CHECK: msr	control, r0             @ encoding: [0x80,0xf3,0x14,0x80]
75