4d0983a4d734280d481bb56472fe44ad0ddc447d |
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07-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM more NEON VLD/VST composite physical register refactoring. Register pair, all lanes subscripting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152157 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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28f08c93e75d291695ea89b9004145103292e85b |
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05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor away a bunch of VLD/VST pseudo instructions. With the new composite physical registers to represent arbitrary pairs of DPR registers, we don't need the pseudo-registers anymore. Get rid of a bunch of them that use DPR register pairs and just use the real instructions directly instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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ea7ad3b3e60f91a5256053b26988806f1dbfdd27 |
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10-Jan-2012 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Move default case for covered enum outside of switch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147870 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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95789d0ff90c24297947c778b256de0e8dc26cd6 |
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10-Jan-2012 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Fix a -Wreturn-type warning in g++. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147867 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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2bd335470f8939782f3df7f6180282d3825d4f09 |
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10-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
Remove unnecessary default cases in switches that cover all enum values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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194bd8982936c819a4b14335a4d08f28af8f3d42 |
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17-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb parsing diagnostics for low-reg requirements on ADD and MOV. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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47a0d52b69056250a1edaca8b28f705993094542 |
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16-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM thumb assembly parsing for arithmetic flag setting instructions. Thumb one requires that many arithmetic instruction forms have an 'S' suffix. For Thumb2, the whether the suffix is required or precluded depends on whether the instruction is in an IT block. Use target parser predicates to check for these sorts of context-sensitive constraints. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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54134708f5debe1631f9ea9b232f78758a2151e4 |
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25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Code clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135954 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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be74029f44c32efc09274a16cbff588ad10dc5ea |
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23-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink ARM mc routines into MCTargetDesc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135825 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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