| 79aa3417eb6f58d668aadfedf075240a41d35a26 |
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17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 8cb2d61bce5950df8e3b8dec481b88fb2eaa66d0 |
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25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Refactor MBlaze target to separate MC routines from Target routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135953 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 4db3cffe94a5285239cc0056f939c6b74a5ca0b6 |
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01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Hide the call to InitMCInstrInfo into tblgen generated ctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 3d820baf195973de23d6520d692acc6bfb43bfe9 |
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12-Apr-2011 |
Wesley Peck <peckw@wesleypeck.com> |
Add scheduling information for the MBlaze backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129311 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 2e06398405c61d6d2aa99785fe34d34c33808330 |
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02-Dec-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Teaching MBlaze backend how to reverse branch conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120707 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 46a928b864369ba9e1b8fc055d100c2fa0f97d16 |
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21-Nov-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Implement branch analysis in the MBlaze backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 41400da31ead2f61d171381c0945dceddd8fc786 |
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13-Nov-2010 |
Wesley Peck <peckw@wesleypeck.com> |
1. Finishing MBlaze MC asm parser test cases
2. Parsing .word directive in MBlaze asm parser
3. Fixing hack where memory instructions reversed order of last two parameters
4. Fixing many improperly encoded instructions
5. Support parsing special instructions (MFS,MTS,etc.)
6. Removing unused functions from inst printer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118941 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| a06038369b830bb83742b6b39775f39dd9e69ae2 |
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27-Oct-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Adding disassembler to the MicroBlaze backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 4e9141fd4c0040cd7d4d830211f7d27fd98e9338 |
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21-Oct-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Recommit 116986 with capitalization typo fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116993 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 60e7127e862e359eb1b4694e5161da6dc4c2c397 |
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21-Oct-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it
compiles on OS X. I'll ensure that it builds on a linux machine before committing
again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 13a949071ce2c887ae81db9f6880a660ff33a76d |
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21-Oct-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Major update of the MicroBlaze backend. The new features are:
1. A delay slot filler that searches for valid instructions
to fill the delay slot with. Previously NOPs would always
be inserted into delay slots.
2. Support for MC based instruction printer added.
3. Support for MC based machine code generation and ELF
file generation. ELF file generation does not yet
completely work as much of the ELF support infrastructure
is still x86/x86-64 specific.
4. General clean up of the MBlaze backend code. Much of the
tablegen code has been cleanup and simplified.
Bug Fixes:
1. Removed duplicate periods from subtarget feature descriptions.
2. Many of the instructions had bad machine code information
in the tablegen files. Much of this has been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 78e6e009223a38739797629ca2d217acf86dda93 |
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17-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the isMoveInstr() hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 600f171486708734e2b9c9c617528cfc51c16850 |
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11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
RISC architectures get their memory operand folding for free.
The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| e6afcf8da2ee4b4bdef7b65b845bc66257432f4e |
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11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace copyRegToReg with copyPhysReg for MBlaze.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 3bf912593301152b65accb9d9c37a95172f1df5a |
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18-Jun-2010 |
Stuart Hastings <stuart@apple.com> |
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556 |
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06-May-2010 |
Dan Gohman <gohman@apple.com> |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| 746ad69e088176819981b4b2c5ac8dcd49f5e60e |
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06-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
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| a70f28ce7dc85d0075a7d86da5d7987b6e306bc6 |
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23-Feb-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Adding the MicroBlaze backend.
The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze
The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeInstrInfo.h
|