Searched refs:SubIdx (Results 26 - 35 of 35) sorted by relevance
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 136 unsigned DestReg, unsigned SubIdx,
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H A D | Thumb1RegisterInfo.cpp | 67 unsigned DestReg, unsigned SubIdx, 78 .addReg(DestReg, getDefRegState(true), SubIdx) 64 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument
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H A D | ARMBaseRegisterInfo.cpp | 693 unsigned DestReg, unsigned SubIdx, int Val, 703 .addReg(DestReg, getDefRegState(true), SubIdx) 690 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument
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H A D | ARMBaseInstrInfo.cpp | 733 unsigned Reg, unsigned SubIdx, unsigned State, 735 if (!SubIdx) 739 return MIB.addReg(TRI->getSubReg(Reg, SubIdx), State); 740 return MIB.addReg(Reg, State, SubIdx); 1166 unsigned DestReg, unsigned SubIdx, 1173 MI->substituteRegister(Orig->getOperand(0).getReg(), DestReg, SubIdx, TRI); 732 AddDReg(MachineInstrBuilder &MIB, unsigned Reg, unsigned SubIdx, unsigned State, const TargetRegisterInfo *TRI) argument 1164 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const argument
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H A D | ARMISelDAGToDAG.cpp | 2069 unsigned SubIdx = ARM::dsub_0; local 2072 CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg));
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 129 unsigned SubIdx) const { 131 if (!Is64Bit && SubIdx == X86::sub_8bit) { 136 return X86GenRegisterInfo::getMatchingSuperRegClass(A, B, SubIdx);
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H A D | X86InstrInfo.cpp | 1145 unsigned &SubIdx) const { 1178 SubIdx = X86::sub_8bit; 1184 SubIdx = X86::sub_16bit; 1188 SubIdx = X86::sub_32bit; 1495 unsigned DestReg, unsigned SubIdx, 1532 NewMI->substituteRegister(Orig->getOperand(0).getReg(), DestReg, SubIdx, TRI); 1493 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const argument
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/external/llvm/include/llvm/CodeGen/ |
H A D | MachineInstr.h | 777 /// substituteRegister - Replace all occurrences of FromReg with ToReg:SubIdx, 779 void substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx,
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H A D | MachineOperand.h | 327 /// Reg must be a virtual register, SubIdx can be 0. 329 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
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/external/llvm/utils/TableGen/ |
H A D | AsmMatcherEmitter.cpp | 1491 int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second; local 1498 int SrcOperand = FindAsmOperand(Name, SubIdx); 1503 unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1);
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