Searched refs:CondCode (Results 1 - 25 of 34) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h698 /// ISD::CondCode enum - These are ordered carefully to make the bitfields
711 enum CondCode { enum in namespace:llvm::ISD
744 inline bool isSignedIntSetCC(CondCode Code) {
750 inline bool isUnsignedIntSetCC(CondCode Code) {
757 inline bool isTrueWhenEqual(CondCode Cond) {
765 inline unsigned getUnorderedFlavor(CondCode Cond) {
771 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
775 CondCode getSetCCSwappedOperands(CondCode Operatio
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H A DAnalysis.h72 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
76 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
81 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
H A DSelectionDAG.h441 SDValue getCondCode(ISD::CondCode Cond);
566 /// have an ISD::CondCode instead of an SDValue.
569 ISD::CondCode Cond) {
578 /// just have an ISD::CondCode instead of an SDValue.
581 SDValue True, SDValue False, ISD::CondCode Cond) {
966 SDValue N2, ISD::CondCode Cond, DebugLoc dl);
H A DSelectionDAGNodes.h1515 ISD::CondCode Condition;
1517 explicit CondCodeSDNode(ISD::CondCode Cond)
1523 ISD::CondCode get() const { return Condition; }
/external/llvm/lib/Target/Mips/InstPrinter/
H A DMipsInstPrinter.h33 enum CondCode { enum in namespace:llvm::Mips
73 const char *MipsFCCToString(Mips::CondCode CC);
H A DMipsInstPrinter.cpp27 const char* Mips::MipsFCCToString(Mips::CondCode CC) {
178 O << MipsFCCToString((Mips::CondCode)MO.getImm());
/external/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp32 enum CondCode { enum in namespace:llvm::XCore
130 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc)
143 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC)
154 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
214 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode());
236 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc);
290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
299 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
404 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Con
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/external/llvm/lib/Target/MBlaze/
H A DMBlazeInstrInfo.h39 enum CondCode { enum in namespace:llvm::MBlaze
89 inline static unsigned GetCondBranchFromCond(CondCode CC) {
103 // CondCode GetOppositeBranchCondition(MBlaze::CondCode CC);
106 inline static const char *MBlazeFCCToString(MBlaze::CondCode CC) {
/external/llvm/lib/CodeGen/
H A DAnalysis.cpp152 ISD::CondCode llvm::getFCmpCondCode(FCmpInst::Predicate Pred) {
174 ISD::CondCode llvm::getFCmpCodeWithoutNaN(ISD::CondCode CC) {
189 ISD::CondCode llvm::getICmpCondCode(ICmpInst::Predicate Pred) {
/external/llvm/lib/Target/X86/
H A DX86InstrInfo.h32 enum CondCode { enum in namespace:llvm::X86
62 unsigned GetCondBranchFromCond(CondCode CC);
66 CondCode GetOppositeBranchCondition(X86::CondCode CC);
H A DX86ISelLowering.cpp3044 /// TranslateX86CC - do a one to one translation of a ISD::CondCode to the X86
3047 static unsigned TranslateX86CC(ISD::CondCode SetCCOpcode, bool isFP,
8226 SDValue X86TargetLowering::LowerToBT(SDValue And, ISD::CondCode CC,
8303 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
8328 X86::CondCode CCode = (X86::CondCode)Op0.getConstantOperandVal(0);
8388 ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get();
8569 unsigned CondCode =cast<ConstantSDNode>(Cond.getOperand(0))->getZExtValue(); local
8572 (CondCode == X86::COND_E || CondCode
8684 unsigned CondCode = cast<ConstantSDNode>(CC)->getZExtValue(); local
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H A DX86ISelLowering.h751 SDValue LowerToBT(SDValue And, ISD::CondCode CC,
/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp101 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC, DebugLoc dl);
446 ISD::CondCode CC, DebugLoc dl) {
543 static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC) {
577 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert, int &Other) {
610 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
1002 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get();
1056 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
1057 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl); local
1058 SDValue Ops[] = { getI32Imm(getPredicateForSetCC(CC)), CondCode,
/external/llvm/include/llvm/Target/
H A DTargetLowering.h464 getCondCodeAction(ISD::CondCode CC, EVT VT) const {
476 bool isCondCodeLegal(ISD::CondCode CC, EVT VT) const {
905 ISD::CondCode Cond, bool foldBooleans,
1103 void setCondCodeAction(ISD::CondCode CC, MVT VT,
1639 /// setCmpLibcallCC - Override the default CondCode to be used to test the
1641 void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) {
1645 /// getCmpLibcallCC - Get the CondCode that's to be used to test the result of
1647 ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const {
1825 /// CondCodeActions - For each condition code (ISD::CondCode) keep a
1972 /// CmpLibcallCCs - The ISD::CondCode tha
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/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp613 ISD::CondCode &CCCode, DebugLoc dl) {
714 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
756 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
775 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1295 ISD::CondCode &CCCode,
1325 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1406 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1424 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
H A DSelectionDAGBuilder.h206 CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs,
216 ISD::CondCode CC;
H A DLegalizeTypes.h288 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
362 ISD::CondCode &CCCode, DebugLoc dl);
435 ISD::CondCode &CCCode, DebugLoc dl);
491 ISD::CondCode &CCCode, DebugLoc dl);
H A DSelectionDAG.cpp222 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
227 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
234 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
244 return ISD::CondCode(Operation);
251 static int isSignedOp(ISD::CondCode Opcode) {
271 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op
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/external/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp468 int CondCode = Insn & 0xf; local
469 Inst.addOperand(MCOperand::CreateImm(CondCode));
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp644 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
662 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
861 ISD::CondCode CC, unsigned &SPCC) {
940 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
973 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
/external/llvm/lib/Target/ARM/
H A DARMISelLowering.h500 SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
H A DARMISelLowering.cpp1084 static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) {
1101 static void FPCCToARMCC(ISD::CondCode CC, ARMCC::CondCodes &CondCode, argument
1107 case ISD::SETOEQ: CondCode = ARMCC::EQ; break;
1109 case ISD::SETOGT: CondCode = ARMCC::GT; break;
1111 case ISD::SETOGE: CondCode = ARMCC::GE; break;
1112 case ISD::SETOLT: CondCode = ARMCC::MI; break;
1113 case ISD::SETOLE: CondCode = ARMCC::LS; break;
1114 case ISD::SETONE: CondCode = ARMCC::MI; CondCode2 = ARMCC::GT; break;
1115 case ISD::SETO: CondCode
2778 ARMCC::CondCodes CondCode = IntCCToARMCC(CC); local
2895 ARMCC::CondCodes CondCode, CondCode2; local
3023 ARMCC::CondCodes CondCode = IntCCToARMCC(CC); local
3059 ARMCC::CondCodes CondCode, CondCode2; local
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/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp660 ISD::CondCode CC,
744 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
776 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
843 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
/external/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp515 O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
H A DMipsISelLowering.cpp507 static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) {
535 static bool InvertFPCondCode(Mips::CondCode CC) {
562 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
571 bool invert = InvertFPCondCode((Mips::CondCode)
603 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
772 static Mips::FPBranchCode GetFPBranchCodeFromCond(Mips::CondCode CC) {
777 "Invalid CondCode.");
1492 Mips::CondCode CC =
1493 (Mips::CondCode)cas
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