Searched refs:R4 (Results 1 - 25 of 55) sorted by relevance

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/external/ppp/pppd/
H A Dsha1.c34 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
39 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
83 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
84 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
[all...]
/external/valgrind/main/none/tests/
H A Dsha1_test.c92 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
97 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
142 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
143 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
[all...]
/external/wpa_supplicant_8/hostapd/src/crypto/
H A Dsha1-internal.c138 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
150 #define R4(v,w,x,y,z,i) \ macro
208 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
209 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
[all...]
/external/wpa_supplicant_8/src/crypto/
H A Dsha1-internal.c138 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
150 #define R4(v,w,x,y,z,i) \ macro
208 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
209 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
[all...]
/external/wpa_supplicant_8/wpa_supplicant/src/crypto/
H A Dsha1-internal.c138 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
150 #define R4(v,w,x,y,z,i) \ macro
208 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
209 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
[all...]
/external/wpa_supplicant_6/wpa_supplicant/src/crypto/
H A Dsha1.c567 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
579 #define R4(v,w,x,y,z,i) \ macro
637 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
638 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(
[all...]
/external/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp170 case ARM::R4:
301 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
304 TII.get(ARM::t2BICri), ARM::R4)
305 .addReg(ARM::R4, RegState::Kill)
308 .addReg(ARM::R4, RegState::Kill));
392 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
394 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
398 .addReg(ARM::R4));
763 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4)
770 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4)
[all...]
H A DARMBaseRegisterInfo.cpp303 ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R8, ARM::R10,
309 ARM::R0, ARM::R2, ARM::R12,ARM::LR, ARM::R4, ARM::R6,
315 ARM::R0, ARM::R2, ARM::R4, ARM::R8, ARM::R10,
321 ARM::R0, ARM::R2, ARM::R12,ARM::LR, ARM::R4, ARM::R6,
327 ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R8,
333 ARM::R0, ARM::R2, ARM::R10,ARM::R12,ARM::LR, ARM::R4, ARM::R7,
339 ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R10,
345 ARM::R0, ARM::R2, ARM::R12,ARM::LR, ARM::R4, ARM::R6, ARM::R8,
351 ARM::R0, ARM::R2, ARM::R4, ARM::R10,
357 ARM::R0, ARM::R2, ARM::R12,ARM::LR, ARM::R4, AR
[all...]
H A DThumb1FrameLowering.cpp87 case ARM::R4:
243 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
245 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
249 .addReg(ARM::R4));
H A DARMBaseRegisterInfo.h42 case R4: case R5: case R6: case R7:
/external/llvm/lib/Target/Hexagon/
H A DHexagonVarargsCallingConvention.h53 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
109 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCBaseInfo.h35 case R4 : case X4 : case F4 : case V4 : case CR4: case CR1LT: return 4;
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h159 case R4: case S4: case D4: case Q4: return 4;
230 case R4: case R5: case R6: case R7:
/external/llvm/lib/Target/MBlaze/MCTargetDesc/
H A DMBlazeBaseInfo.h109 case MBlaze::R4 : return 4;
173 case 4 : return MBlaze::R4;
/external/oprofile/module/ia64/
H A DIA64entry.h51 .spillsp r4, SW(R4)+16+(off); .spillsp r5, SW(R5)+16+(off); \
/external/valgrind/main/coregrind/m_sigframe/
H A Dsigframe-arm-linux.c142 SC2(r4,R4);
316 REST(r4,R4);
/external/valgrind/main/VEX/auxprogs/
H A Dgenoffsets.c153 GENOFFSET(ARM,arm,R4);
/external/llvm/lib/Target/CellSPU/
H A DSPURegisterInfo.cpp58 case SPU::R4: return 4;
/external/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp65 XCore::R4, XCore::R5, XCore::R6, XCore::R7,
/external/webkit/Source/WebKit2/Platform/CoreIPC/
H A DHandleMessage.h108 template<typename C, typename MF, typename P1, typename R1, typename R2, typename R3, typename R4>
109 void callMemberFunction(const Arguments1<P1>& args, Arguments4<R1, R2, R3, R4>& replyArgs, C* object, MF function)
/external/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp618 return !Subtarget.isPPC64() ? PPC::R4 : PPC::X4;
/external/jpeg/
H A Dconfig.guess260 m88k:*:4*:R4*)
/external/llvm/projects/sample/autoconf/
H A Dconfig.guess453 m88k:*:4*:R4*)
/external/qemu/distrib/jpeg-6b/
H A Dconfig.guess260 m88k:*:4*:R4*)
/external/qemu-pc-bios/bochs/
H A Dconfig.guess437 m88k:*:4*:R4*)

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