1/* 2 * public_infoele.h 3 * 4 * Copyright(c) 1998 - 2010 Texas Instruments. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name Texas Instruments nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34/********************************************************************************************************************** 35 36 FILENAME: public_infoele.h 37 38 DESCRIPTION: Contains information element defines/structures used by the FW and host. 39 40 41 42***********************************************************************************************************************/ 43#ifndef PUBLIC_INFOELE_H 44#define PUBLIC_INFOELE_H 45 46 47#include "public_types.h" 48#include "public_commands.h" 49#include "public_radio.h" 50 51typedef enum 52{ 53 ACX_WAKE_UP_CONDITIONS = 0x0002, 54 ACX_MEM_CFG = 0x0003, 55 ACX_SLOT = 0x0004, 56 57 ACX_AC_CFG = 0x0007, 58 ACX_MEM_MAP = 0x0008, 59 ACX_AID = 0x000A, 60 61 ACX_MEDIUM_USAGE = 0x000F, 62 ACX_RX_CFG = 0x0010, 63 ACX_TX_QUEUE_CFG = 0x0011, 64 ACX_STATISTICS = 0x0013, /* Debug API*/ 65 ACX_PWR_CONSUMPTION_STATISTICS =0x0014, 66 ACX_FEATURE_CFG = 0x0015, 67 ACX_TID_CFG = 0x001A, 68 ACX_PS_RX_STREAMING = 0x001B, 69 ACX_BEACON_FILTER_OPT = 0x001F, 70 ACX_NOISE_HIST = 0x0021, 71 ACX_HDK_VERSION = 0x0022, /* ???*/ 72 ACX_PD_THRESHOLD = 0x0023, 73 ACX_TX_CONFIG_OPT = 0x0024, 74 ACX_CCA_THRESHOLD = 0x0025, 75 ACX_EVENT_MBOX_MASK = 0x0026, 76 ACX_CONN_MONIT_PARAMS = 0x002D, 77 ACX_CONS_TX_FAILURE = 0x002F, 78 ACX_BCN_DTIM_OPTIONS = 0x0031, 79 ACX_SG_ENABLE = 0x0032, 80 ACX_SG_CFG = 0x0033, 81 ACX_FM_COEX_CFG = 0x0034, 82 83 ACX_BEACON_FILTER_TABLE = 0x0038, 84 ACX_ARP_IP_FILTER = 0x0039, 85 ACX_ROAMING_STATISTICS_TBL = 0x003B, 86 ACX_RATE_POLICY = 0x003D, 87 ACX_CTS_PROTECTION = 0x003E, 88 ACX_SLEEP_AUTH = 0x003F, 89 ACX_PREAMBLE_TYPE = 0x0040, 90 ACX_ERROR_CNT = 0x0041, 91 ACX_IBSS_FILTER = 0x0044, 92 ACX_SERVICE_PERIOD_TIMEOUT = 0x0045, 93 ACX_TSF_INFO = 0x0046, 94 ACX_CONFIG_PS_WMM = 0x0049, 95 ACX_ENABLE_RX_DATA_FILTER = 0x004A, 96 ACX_SET_RX_DATA_FILTER = 0x004B, 97 ACX_GET_DATA_FILTER_STATISTICS = 0x004C, 98 ACX_RX_CONFIG_OPT = 0x004E, 99 ACX_FRAG_CFG = 0x004F, 100 ACX_BET_ENABLE = 0x0050, 101 102#ifdef RADIO_SCOPE /* RADIO MODULE SECTION START */ 103 104 ACX_RADIO_MODULE_START = 0x0500, 105 ACX_RS_ENABLE = ACX_RADIO_MODULE_START, 106 ACX_RS_RX = 0x0501, 107 108 /* Add here ... */ 109 110 ACX_RADIO_MODULE_END = 0x0600, 111 112#endif /* RADIO MODULE SECTION END */ 113 114 ACX_RSSI_SNR_TRIGGER = 0x0051, 115 ACX_RSSI_SNR_WEIGHTS = 0x0052, 116 ACX_KEEP_ALIVE_MODE = 0x0053, 117 ACX_SET_KEEP_ALIVE_CONFIG = 0x0054, 118 ACX_BA_SESSION_RESPONDER_POLICY = 0x0055, 119 ACX_BA_SESSION_INITIATOR_POLICY = 0x0056, 120 ACX_PEER_HT_CAP = 0x0057, 121 ACX_HT_BSS_OPERATION = 0x0058, 122 ACX_COEX_ACTIVITY = 0x0059, 123 ACX_BURST_MODE = 0x005C, 124 125 ACX_SET_RATE_MAMAGEMENT_PARAMS = 0x005D, 126 ACX_GET_RATE_MAMAGEMENT_PARAMS = 0x005E, 127 128 ACX_SET_DCO_ITRIM_PARAMS = 0x0061, 129 130 DOT11_RX_MSDU_LIFE_TIME = 0x1004, 131 DOT11_CUR_TX_PWR = 0x100D, 132 DOT11_RX_DOT11_MODE = 0x1012, 133 DOT11_RTS_THRESHOLD = 0x1013, 134 DOT11_GROUP_ADDRESS_TBL = 0x1014, 135 ACX_SET_RADIO_PARAMS = 0x1015, 136 ACX_PM_CONFIG = 0x1016, 137 138 MAX_DOT11_IE = ACX_PM_CONFIG, 139 140 MAX_IE = 0xFFFF /*force enumeration to 16bits*/ 141} InfoElement_enum; 142 143 144#ifdef HOST_COMPILE 145typedef uint16 InfoElement_e; 146#else 147typedef InfoElement_enum InfoElement_e; 148#endif 149 150 151typedef struct 152{ 153 InfoElement_e id; 154 uint16 length; 155 uint32 dataLoc; /*use this to point to for following variable-length data*/ 156} InfoElement_t; 157 158 159typedef struct 160{ 161 uint16 id; 162 uint16 len; 163} EleHdrStruct; 164 165#define MAX_NUM_AID 4 /* max number of STAs in IBSS */ 166 167 168#ifdef HOST_COMPILE 169#define INFO_ELE_HDR EleHdrStruct EleHdr; 170#else 171#define INFO_ELE_HDR 172#endif 173 174/****************************************************************************** 175 176 Name: ACX_WAKE_UP_CONDITIONS 177 Type: Configuration 178 Access: Write Only 179 Length: 2 180 181******************************************************************************/ 182typedef enum 183{ 184 WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/ 185 WAKE_UP_EVENT_DTIM_BITMAP = 0x02, /* Wake on every DTIM*/ 186 WAKE_UP_EVENT_N_DTIM_BITMAP = 0x04, /* Wake on every Nth DTIM (Listen interval)*/ 187 WAKE_UP_EVENT_N_BEACONS_BITMAP = 0x08, /* Wake on every Nth Beacon (Nx Beacon)*/ 188 WAKE_UP_EVENT_BITS_MASK = 0x0F 189} WakeUpEventBitMask_e; 190 191typedef struct 192{ 193 INFO_ELE_HDR 194 uint8 wakeUpConditionBitmap; /* The host can set one bit only. */ 195 /* WakeUpEventBitMask_e describes the Possible */ 196 /* Wakeup configuration bits*/ 197 198 uint8 listenInterval; /* 0 for Beacon and Dtim, */ 199 /* xDtims (1-10) for Listen Interval and */ 200 /* xBeacons (1-255) for NxBeacon*/ 201 uint8 padding[2]; /* alignment to 32bits boundry */ 202}WakeUpCondition_t; 203 204/****************************************************************************** 205 206 Name: ACX_MEM_CFG 207 Type: Configuration 208 Access: Write Only 209 Length: 12 210 211******************************************************************************/ 212 213typedef struct 214{ 215 INFO_ELE_HDR 216 uint8 rxMemblockNumber; /* specifies the number of memory buffers that */ 217 /* is allocated to the Rx memory pool. The */ 218 /* actual number allocated may be less than*/ 219 /* this number if there are not enough memory */ 220 /* blocks left over for the Minimum Number of */ 221 /* Tx Blocks. Returns the actual number of RX */ 222 /* buffers allocated in the memory map*/ 223 224 uint8 txMinimumMemblockNumber; /* specifies the minimum number of blocks that */ 225 /* must be allocated to the TX pool. Follows */ 226 /* this limit even if the Number of Rx Memory */ 227 /* Blocks parameter is ignored.*/ 228 229 uint8 numStations; /* The number of STAs supported in IBSS mode. */ 230 /* The FW uses this field to allocate memory */ 231 /* for STA context data such as security keys*/ 232 233 uint8 numSsidProfiles; /* The number of SSID profiles used in IBSS mode */ 234 /* Enables different profiles for different STAs */ 235 236 uint32 totalTxDescriptors; /* Total TX Descriptors - in the past it was configured per AC */ 237} ACXConfigMemory_t; 238 239 240/****************************************************************************** 241 242 Name: ACX_SLOT 243 Type: Configuration 244 Access: Write Only 245 Length: 8 246 247******************************************************************************/ 248 249typedef enum 250{ 251 SLOT_TIME_LONG = 0, /* the WiLink uses long (20 us) slots*/ 252 SLOT_TIME_SHORT = 1, /* the WiLink uses short (9 us) slots*/ 253 DEFAULT_SLOT_TIME = SLOT_TIME_SHORT, 254 MAX_SLOT_TIMES = 0xFF 255} SlotTime_enum; 256 257#ifdef HOST_COMPILE 258typedef uint8 SlotTime_e; 259#else 260typedef SlotTime_enum SlotTime_e; 261#endif 262 263 264typedef struct 265{ 266 INFO_ELE_HDR 267 uint8 woneIndex; /* reserved*/ 268 269 SlotTime_e slotTime; /* The slot size to be used. refer to SlotTime_enum. */ 270 uint8 reserved[6]; 271} ACXSlot_t; 272 273 274/****************************************************************************** 275 276 Name: ACX_AC_CFG 277 Type: Configuration 278 Access: Write Only 279 Length: 8 280 281******************************************************************************/ 282typedef enum 283{ 284 AC_BE = 0, /* Best Effort/Legacy*/ 285 AC_BK = 1, /* Background*/ 286 AC_VI = 2, /* Video*/ 287 AC_VO = 3, /* Voice*/ 288 /* AC_BCAST = 4, */ /* Broadcast dummy access category */ 289 AC_CTS2SELF = 4, /* CTS2Self fictitious AC, */ 290 /* uses #4 to follow AC_VO, as */ 291 /* AC_BCAST does not seem to be in use. */ 292 AC_ANY_TID = 0x1F, 293 AC_INVALID = 0xFF, /* used for gTxACconstraint */ 294 NUM_ACCESS_CATEGORIES = 4 295} AccessCategory_enum; 296 297typedef enum 298{ 299 TID0 = 0, /* Best Effort/Legacy*/ 300 TID1 = 1, /* Best Effort/Legacy*/ 301 TID2 = 2, /* Background*/ 302 TID3 = 3, /* Video*/ 303 TID4 = 4, /* Voice*/ 304 TID5 = 5, /* Broadcast dummy access category*/ 305 TID6 = 6, 306 TID7 = 7, /* managment */ 307 NUM_TRAFFIC_CATEGORIES = 8 308} TrafficCategory_enum; 309 310 311#define AC_REQUEST 0xfe /* Special access category type for */ 312 /* requests*/ 313 314 315/* following are defult values for the IE fields*/ 316#define CWMIN_BK 15 317#define CWMIN_BE 15 318#define CWMIN_VI 7 319#define CWMIN_VO 3 320#define CWMAX_BK 1023 321#define CWMAX_BE 63 322#define CWMAX_VI 15 323#define CWMAX_VO 7 324#define AIFS_PIFS 1 /* slot number setting to start transmission at PIFS interval */ 325#define AIFS_DIFS 2 /* slot number setting to start transmission at DIFS interval - */ 326 /* normal DCF access */ 327 328#define AIFS_MIN AIFS_PIFS 329 330#define AIFSN_BK 7 331#define AIFSN_BE 3 332#define AIFSN_VI AIFS_PIFS 333#define AIFSN_VO AIFS_PIFS 334#define TXOP_BK 0 335#define TXOP_BE 0 336#define TXOP_VI 3008 337#define TXOP_VO 1504 338#define DEFAULT_AC_SHORT_RETRY_LIMIT 7 339#define DEFAULT_AC_LONG_RETRY_LIMIT 4 340 341/* rxTimeout values */ 342#define NO_RX_TIMEOUT 0 343 344typedef struct 345{ 346 INFO_ELE_HDR 347 uint8 ac; /* Access Category - The TX queue's access category */ 348 /* (refer to AccessCategory_enum)*/ 349 uint8 cwMin; /* The contention window minimum size (in slots) for */ 350 /* the access class.*/ 351 uint16 cwMax; /* The contention window maximum size (in slots) for */ 352 /* the access class.*/ 353 uint8 aifsn; /* The AIF value (in slots) for the access class.*/ 354 uint8 reserved; 355 uint16 txopLimit; /* The TX Op Limit (in microseconds) for the access class.*/ 356} ACXAcCfg_t; 357 358 359/****************************************************************************** 360 361 Name: ACX_MEM_MAP 362 Type: Configuration 363 Access: Read Only 364 Length: 72 365 Note: Except for the numTxMemBlks, numRxMemBlks fields, this is 366 used in MASTER mode only!!! 367 368******************************************************************************/ 369#define MEM_MAP_NUM_FIELDS 24 370 371typedef struct 372{ 373 uint32 *controlBlock; /* array of two 32-bit entries in the following order: 374 1. Tx-Result entries counter written by the FW 375 2. Tx-Result entries counter read by the host */ 376 void *txResultQueueStart; /* points t first descriptor in TRQ */ 377} TxResultPointers_t; 378 379 380typedef struct 381{ 382 INFO_ELE_HDR 383 void *codeStart; 384 void *codeEnd; 385 void *wepDefaultKeyStart; 386 void *wepDefaultKeyEnd; 387 void *staTableStart; 388 void *staTableEnd; 389 void *packetTemplateStart; 390 void *packetTemplateEnd; 391 TxResultPointers_t trqBlock; 392 393 void *queueMemoryStart; 394 void *queueMemoryEnd; 395 void *packetMemoryPoolStart; 396 void *packetMemoryPoolEnd; 397 void *debugBuffer1Start; 398 void *debugBuffer1End; 399 void *debugBuffer2Start; 400 void *debugBuffer2End; 401 402 uint32 numTxMemBlks; /* Number of blocks that FW allocated for TX packets.*/ 403 uint32 numRxMemBlks; /* Number of blocks that FW allocated for RX packets. */ 404 405 /* the following 4 fields are valid in SLAVE mode only */ 406 uint8 *txCBufPtr; 407 uint8 *rxCBufPtr; 408 void *rxControlPtr; 409 void *txControlPtr; 410 411} MemoryMap_t; 412 413 414/****************************************************************************** 415 416 Name: ACX_AID 417 Type: Configuration 418 Access: Write Only 419 Length: 2 420 421******************************************************************************/ 422 423typedef struct 424{ 425 INFO_ELE_HDR 426 uint16 Aid; /* The Association ID to the WiLink. The WiLink uses this */ 427 /* field to determine when the STA's AID bit is set in a */ 428 /* received beacon and when a PS Poll frame should be */ 429 /* transmitted to the AP. The host configures this information */ 430 /* element after it has associated with an AP. This information */ 431 /* element does not need to be set in Ad Hoc mode.*/ 432 uint8 padding[2]; /* alignment to 32bits boundry */ 433} ACXAid_t; 434 435 436/****************************************************************************** 437 438 Name: ACX_ERROR_CNT 439 Type: Operation 440 Access: Read Only 441 Length: 12 442 443******************************************************************************/ 444typedef struct 445{ 446 INFO_ELE_HDR 447 uint32 PLCPErrorCount; /* The number of PLCP errors since the last time this */ 448 /* information element was interrogated. This field is */ 449 /* automatically cleared when it is interrogated.*/ 450 451 uint32 FCSErrorCount; /* The number of FCS errors since the last time this */ 452 /* information element was interrogated. This field is */ 453 /* automatically cleared when it is interrogated.*/ 454 455 uint32 validFrameCount; /* The number of MPDUÂs without PLCP header errors received*/ 456 /* since the last time this information element was interrogated. */ 457 /* This field is automatically cleared when it is interrogated.*/ 458 459 uint32 seqNumMissCount; /* the number of missed sequence numbers in the squentially */ 460 /* values of frames seq numbers */ 461 462} ACXErrorCounters_t; 463 464/****************************************************************************** 465 466 Name: ACX_MEDIUM_USAGE 467 Type: Configuration 468 Access: Read Only 469 Length: 8 470 471******************************************************************************/ 472 473typedef struct 474{ 475 INFO_ELE_HDR 476 uint32 mediumUsage; /* report to the host the value of medium usage registers*/ 477 uint32 period; /* report to the host the value of medium period registers*/ 478} ACXMediumUsage_t; 479 480/****************************************************************************** 481 482 Name: ACX_RX_CFG 483 Type: Filtering Configuration 484 Access: Write Only 485 Length: 8 486 487******************************************************************************/ 488/* 489 * Rx configuration (filter) information element 490 * --------------------------------------------- 491 */ 492/* 493 RX ConfigOptions Table 494 Bit Definition 495 === ========== 496 31:14 Reserved 497 13 Copy RX Status - when set, write three receive status words to top of 498 rx'd MPDU. 499 When clear, do not write three status words (added rev 1.5) 500 12 Reserved 501 11 RX Complete upon FCS error - when set, give rx complete interrupt for 502 FCS errors, after the rx filtering, e.g. unicast frames not to us with 503 FCS error will not generate an interrupt 504 10 SSID Filter Enable - When set, the WiLink discards all beacon, 505 probe request, and probe response frames with an SSID that does not 506 match the SSID specified by the host in the START/JOIN command. 507 When clear, the WiLink receives frames with any SSID. 508 9 Broadcast Filter Enable - When set, the WiLink discards all broadcast 509 frames. When clear, the WiLink receives all received broadcast frames. 510 8:6 Reserved 511 5 BSSID Filter Enable - When set, the WiLink discards any frames with a 512 BSSID that does not match the BSSID specified by the host. 513 When clear, the WiLink receives frames from any BSSID. 514 4 MAC Addr Filter - When set, the WiLink discards any frames with a 515 destination address that does not match the MAC address of the adaptor. 516 When clear, the WiLink receives frames destined to any MAC address. 517 3 Promiscuous - When set, the WiLink receives all valid frames 518 (i.e., all frames that pass the FCS check). 519 When clear, only frames that pass the other filters specified are received. 520 2 FCS - When set, the WiLink includes the FCS with the received frame. 521 When clear, the FCS is discarded. 522 1 PLCP header - When set, write all data from baseband to frame buffer 523 including PHY header. 524 0 Reserved - Always equal to 0. 525 526 RX FilterOptions Table 527 Bit Definition 528 === ========== 529 31:12 Reserved - Always equal to 0. 530 11 Association - When set, the WiLink receives all association related frames 531 (association request/response, reassocation request/response, and 532 disassociation). When clear, these frames are discarded. 533 10 Auth/De auth - When set, the WiLink receives all authentication and 534 de-authentication frames. When clear, these frames are discarded. 535 9 Beacon - When set, the WiLink receives all beacon frames. When clear, 536 these frames are discarded. 537 8 Contention Free - When set, the WiLink receives all contention free frames. 538 When clear, these frames are discarded. 539 7 Control - When set, the WiLink receives all control frames. 540 When clear, these frames are discarded. 541 6 Data - When set, the WiLink receives all data frames. 542 When clear, these frames are discarded. 543 5 FCS Error - When set, the WiLink receives frames that have FCS errors. 544 When clear, these frames are discarded. 545 4 Management - When set, the WiLink receives all management frames. 546 When clear, these frames are discarded. 547 3 Probe Request - When set, the WiLink receives all probe request frames. 548 When clear, these frames are discarded. 549 2 Probe Response - When set, the WiLink receives all probe response frames. 550 When clear, these frames are discarded. 551 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK frames. 552 When clear, these frames are discarded. 553 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames that 554 have reserved frame types and sub types as defined by the 802.11 555 specification. 556 When clear, these frames are discarded. 557*/ 558typedef struct 559{ 560 INFO_ELE_HDR 561 uint32 ConfigOptions; /* The configuration of the receiver in the WiLink. */ 562 /* "RX ConfigOptions Table" describes the format of */ 563 /* this field.*/ 564 uint32 FilterOptions; /* The types of frames that the WiLink can receive. */ 565 /* "RX FilterOptions Table" describes the format of */ 566 /* this field.*/ 567} ACXRxConfig_t; 568 569/****************************************************************************** 570 571 Name: ACX_BEACON_FILTER_OPT 572 Desc: This information element enables the host to activate beacon filtering. 573 The filter can only be activated when the STA is in PS mode. 574 When activated, either the host is not notified about beacons whose 575 unicast TIM bit is not set, or these beacons are buffered first and 576 the host is notified only after the buffer reaches a predetermined size. 577 The host should not activate the filter if it configures the firmware 578 to listen to broadcasts (see the VBM Options field in the 579 ACXPowerMgmtOptions information element). The filter only affects beacons, 580 and not other MSDUs - the firmware notifies the host immediately about 581 their arrival. 582 Type: Filtering Configuration 583 Access: Write Only 584 Length: 2 585 586******************************************************************************/ 587typedef struct 588{ 589 INFO_ELE_HDR 590 uint8 enable; /* Indicates whether the filter is enabled. */ 591 /* 1 - enabled, 0 - disabled. */ 592 uint8 maxNumOfBeaconsStored; /* The number of beacons without the unicast TIM */ 593 /* bit set that the firmware buffers before */ 594 /* signaling the host about ready frames. */ 595 /* When set to 0 and the filter is enabled, beacons */ 596 /* without the unicast TIM bit set are dropped.*/ 597 uint8 padding[2]; /* alignment to 32bits boundry */ 598} ACXBeaconFilterOptions_t; 599 600 601/****************************************************************************** 602 603 Name: ACX_BEACON_FILTER_TABLE 604 Desc: This information element configures beacon filtering handling for the 605 set of information elements. An information element in a beacon can be 606 set to be: ignored (never compared, and changes will not cause beacon 607 transfer), checked (compared, and transferred in case of a change), or 608 transferred (transferred to the host for each appearance or disappearance). 609 The table contains all information elements that are subject to monitoring 610 for host transfer. 611 All information elements that are not in the table should be ignored for 612 monitoring. 613 This functionality is only enabled when beacon filtering is enabled by 614 ACX_BEACON_FILTER_OPT. 615 Type: Filtering Configuration 616 Access: Write Only 617 Length: 101 618 Notes: the field measuring the value of received beacons for which the device 619 wakes up the host in ACX_BEACON_FILTER_OPT does not affect 620 this information element. 621 622******************************************************************************/ 623 624/* 625 ACXBeaconFilterEntry (not 221) 626 Byte Offset Size (Bytes) Definition 627 =========== ============ ========== 628 0 1 IE identifier 629 1 1 Treatment bit mask 630 631 ACXBeaconFilterEntry (221) 632 Byte Offset Size (Bytes) Definition 633 =========== ============ ========== 634 0 1 IE identifier 635 1 1 Treatment bit mask 636 2 3 OUI 637 5 1 Type 638 6 2 Version 639 640 641 Treatment bit mask - The information element handling: 642 bit 0 - The information element is compared and transferred 643 in case of change. 644 bit 1 - The information element is transferred to the host 645 with each appearance or disappearance. 646 Note that both bits can be set at the same time. 647*/ 648#define BEACON_FILTER_TABLE_MAX_IE_NUM (32) 649#define BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM (6) 650#define BEACON_FILTER_TABLE_IE_ENTRY_SIZE (2) 651#define BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE (6) 652#define BEACON_FILTER_TABLE_MAX_SIZE ((BEACON_FILTER_TABLE_MAX_IE_NUM * BEACON_FILTER_TABLE_IE_ENTRY_SIZE) + \ 653 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE)) 654 655typedef struct ACXBeaconFilterIETableStruct { 656 INFO_ELE_HDR 657 uint8 NumberOfIEs; /* The number of IE's in the table*/ 658 /* 0 - clears the table.*/ 659 660 uint8 padding[3]; /* alignment to 32bits boundry */ 661 uint8 IETable[BEACON_FILTER_TABLE_MAX_SIZE]; 662} ACXBeaconFilterIETable_t; 663 664/****************************************************************************** 665 666 Name: ACX_COEX_ACTIVITY_TABLE 667 668******************************************************************************/ 669 670typedef enum 671{ 672 COEX_IP_BT = 0, 673 COEX_IP_WLAN, 674 COEX_IP_DUAL_MODE, /* That define isn't valid value in DR&FW interface and use just in the FW */ 675 MAX_COEX_IP 676} CoexIp_enum; 677 678#ifdef HOST_COMPILE 679typedef uint8 CoexIp_e; 680#else 681typedef CoexIp_enum CoexIp_e; 682#endif 683 684typedef struct ACXCoexActivityIEStruct { 685 INFO_ELE_HDR 686 CoexIp_e coexIp; /* 0-BT, 1-WLAN (according to CoexIp_e in FW) */ 687 uint8 activityId; /* According to BT/WLAN activity numbering in FW */ 688 uint8 defaultPriority; /* 0-255, activity default priority */ 689 uint8 raisedPriority; /* 0-255, activity raised priority */ 690 uint16 minService; /* 0-65535, The minimum service requested either in 691 requests or in milliseconds depending on activity ID */ 692 uint16 maxService; /* 0-65535, The maximum service allowed either in 693 requests or in milliseconds depending on activity ID */ 694} ACXCoexActivityIE_t; 695 696/****************************************************************************** 697 698 Name: ACX_ARP_IP_FILTER 699 Type: Filtering Configuration 700 Access: Write Only 701 Length: 20 702 703******************************************************************************/ 704 705#define ARP_FILTER_DISABLED (0) 706#define ARP_FILTER_ENABLED (0x01) 707#define ARP_FILTER_AUTO_ARP_ENABLED (0x03) 708 709typedef struct 710{ 711 INFO_ELE_HDR 712 uint8 ipVersion; /* The IP version of the IP address: 4 - IPv4, 6 - IPv6.*/ 713 uint8 arpFilterEnable; /* 0x00 - No ARP features */ 714 /* 0x01 - Only ARP filtering */ 715 /* 0x03 - Both ARP filtering and Auto-ARP */ 716 /* For IPv6 it MUST be 0 */ 717 uint8 padding[2]; /* alignment to 32bits boundry */ 718 uint8 address[16]; /* The IP address used to filter ARP packets. ARP packets */ 719 /* that do not match this address are dropped. */ 720 /* When the IP Version is 4, the last 12 bytes of */ 721 /* the address are ignored.*/ 722 723} ACXConfigureIP_t; 724 725 726/****************************************************************************** 727 728 Name: ACX_IBSS_FILTER 729 Type: Filtering Configuration 730 Access: Write Only 731 Length: 1 732 733******************************************************************************/ 734typedef struct 735{ 736 INFO_ELE_HDR 737 uint8 enable; /* if set (i.e. IBSS mode), forward beacons from the same SSID*/ 738 /* (also from different BSSID), with bigger TSF then the this of */ 739 /* the current BSS.*/ 740 uint8 padding[3]; /* alignment to 32bits boundry */ 741} ACXIBSSFilterOptions_t; 742 743 744/****************************************************************************** 745 746 Name: ACX_SERVICE_PERIOD_TIMEOUT 747 Type: Configuration 748 Access: Write Only 749 Length: 1 750 751******************************************************************************/ 752typedef struct 753{ 754 INFO_ELE_HDR 755 uint16 PsPollTimeout; /* the maximum time that the device will wait to receive */ 756 /* traffic from the AP after transmission of PS-poll.*/ 757 758 uint16 UpsdTimeout; /* the maximum time that the device will wait to receive */ 759 /* traffic from the AP after transmission from UPSD enabled*/ 760 /* queue.*/ 761} ACXRxTimeout_t; 762 763/****************************************************************************** 764 765 Name: ACX_TX_QUEUE_CFG 766 Type: Configuration 767 Access: Write Only 768 Length: 8 769 770******************************************************************************/ 771typedef struct 772{ 773 INFO_ELE_HDR 774 uint8 qID; /* The TX queue ID number.*/ 775 uint8 padding[3]; /* alignment to 32bits boundry */ 776 uint16 numberOfBlockHighThreshold; /* The maximum memory blocks allowed in the */ 777 /* queue.*/ 778 uint16 numberOfBlockLowThreshold; /* The minimum memory blocks that are */ 779 /* guaranteed for this queue.*/ 780} ACXTxQueueCfg_t; 781 782 783/****************************************************************************** 784 785 Name: ACX_STATISTICS 786 Type: Statistics 787 Access: Write Only 788 Length: 789 Note: Debug API 790 791******************************************************************************/ 792typedef struct 793{ 794 uint32 debug1; 795 uint32 debug2; 796 uint32 debug3; 797 uint32 debug4; 798 uint32 debug5; 799 uint32 debug6; 800}DbgStatistics_t; 801 802typedef struct 803{ 804 uint32 numOfTxProcs; 805 uint32 numOfPreparedDescs; 806 uint32 numOfTxXfr; 807 uint32 numOfTxDma; 808 uint32 numOfTxCmplt; 809 uint32 numOfRxProcs; 810 uint32 numOfRxData; 811}RingStatistics_t; 812 813typedef struct 814{ 815 uint32 numOfTxTemplatePrepared; 816 uint32 numOfTxDataPrepared; 817 uint32 numOfTxTemplateProgrammed; 818 uint32 numOfTxDataProgrammed; 819 uint32 numOfTxBurstProgrammed; 820 uint32 numOfTxStarts; 821 uint32 numOfTxImmResp; 822 uint32 numOfTxStartTempaltes; 823 uint32 numOfTxStartIntTemplate; 824 uint32 numOfTxStartFwGen; 825 uint32 numOfTxStartData; 826 uint32 numOfTxStartNullFrame; 827 uint32 numOfTxExch; 828 uint32 numOfTxRetryTemplate; 829 uint32 numOfTxRetryData; 830 uint32 numOfTxExchPending; 831 uint32 numOfTxExchExpiry; 832 uint32 numOfTxExchMismatch; 833 uint32 numOfTxDoneTemplate; 834 uint32 numOfTxDoneData; 835 uint32 numOfTxDoneIntTemplate; 836 uint32 numOfTxPreXfr; 837 uint32 numOfTxXfr; 838 uint32 numOfTxXfrOutOfMem; 839 uint32 numOfTxDmaProgrammed; 840 uint32 numOfTxDmaDone; 841} TxStatistics_t; 842 843 844typedef struct 845{ 846 uint32 RxOutOfMem; 847 uint32 RxHdrOverflow; 848 uint32 RxHWStuck; 849 uint32 RxDroppedFrame; 850 uint32 RxCompleteDroppedFrame; 851 uint32 RxAllocFrame; 852 uint32 RxDoneQueue; 853 uint32 RxDone; 854 uint32 RxDefrag; 855 uint32 RxDefragEnd; 856 uint32 RxMic; 857 uint32 RxMicEnd; 858 uint32 RxXfr; 859 uint32 RxXfrEnd; 860 uint32 RxCmplt; 861 uint32 RxPreCmplt; 862 uint32 RxCmpltTask; 863 uint32 RxPhyHdr; 864 uint32 RxTimeout; 865} RxStatistics_t; 866 867 868typedef struct 869{ 870 uint32 RxDMAErrors; 871 uint32 TxDMAErrors; 872} DMAStatistics_t; 873 874 875typedef struct 876{ 877 uint32 IRQs; /* irqisr() */ 878} IsrStatistics_t; 879 880 881typedef struct WepStatistics_t 882{ 883 uint32 WepAddrKeyCount; /* Count of WEP address keys configured*/ 884 uint32 WepDefaultKeyCount; /* Count of default keys configured*/ 885 uint32 WepKeyNotFound; /* count of number of times that WEP key not found on lookup*/ 886 uint32 WepDecryptFail; /* count of number of times that WEP key decryption failed*/ 887 uint32 WepEncryptFail; /* count of number of times that WEP key encryption failed*/ 888 uint32 WepDecPackets; /* WEP Packets Decrypted*/ 889 uint32 WepDecInterrupt; /* WEP Decrypt Interrupts*/ 890 uint32 WepEnPackets; /* WEP Packets Encrypted*/ 891 uint32 WepEnInterrupt; /* WEP Encrypt Interrupts*/ 892} WepStatistics_t; 893 894 895#define PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD 10 896typedef struct PwrStatistics_t 897{ 898 uint32 MissingBcnsCnt; /* Count the amount of missing beacon interrupts to the host.*/ 899 uint32 RcvdBeaconsCnt; /* Count the number of received beacons.*/ 900 uint32 ConnectionOutOfSync; /* Count the number of times TSF Out Of Sync occures, meaning we lost more consecutive beacons that defined by the host's threshold.*/ 901 uint32 ContMissBcnsSpread[PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD]; /* Gives statistics about the spread continuous missed beacons.*/ 902 /* The 16 LSB are dedicated for the PS mode.*/ 903 /* The 16 MSB are dedicated for the PS mode.*/ 904 /* ContMissBcnsSpread[0] - single missed beacon.*/ 905 /* ContMissBcnsSpread[1] - two continuous missed beacons.*/ 906 /* ContMissBcnsSpread[2] - three continuous missed beacons.*/ 907 /* ...*/ 908 /* ContMissBcnsSpread[9] - ten and more continuous missed beacons.*/ 909 uint32 RcvdAwakeBeaconsCnt; /* Count the number of beacons in awake mode.*/ 910} PwrStatistics_t; 911 912 913typedef struct MicStatistics_t 914{ 915 uint32 MicRxPkts; 916 uint32 MicCalcFailure; 917} MicStatistics_t; 918 919 920typedef struct AesStatisticsStruct 921{ 922 uint32 AesEncryptFail; 923 uint32 AesDecryptFail; 924 uint32 AesEncryptPackets; 925 uint32 AesDecryptPackets; 926 uint32 AesEncryptInterrupt; 927 uint32 AesDecryptInterrupt; 928} AesStatistics_t; 929 930typedef struct GemStatisticsStruct 931{ 932 uint32 GemEncryptFail; 933 uint32 GemDecryptFail; 934 uint32 GemEncryptPackets; 935 uint32 GemDecryptPackets; 936 uint32 GemEncryptInterrupt; 937 uint32 GemDecryptInterrupt; 938} GemStatistics_t; 939 940typedef struct EventStatistics_t 941{ 942 uint32 calibration; 943 uint32 rxMismatch; 944 uint32 rxMemEmpty; 945} EventStatistics_t; 946 947 948typedef struct PsPollUpsdStatistics_t 949{ 950 uint32 psPollTimeOuts; 951 uint32 upsdTimeOuts; 952 uint32 upsdMaxAPturn; 953 uint32 psPollMaxAPturn; 954 uint32 psPollUtilization; 955 uint32 upsdUtilization; 956} PsPollUpsdStatistics_t; 957 958typedef struct RxFilterStatistics_t 959{ 960 uint32 beaconFilter; 961 uint32 arpFilter; 962 uint32 MCFilter; 963 uint32 dupFilter; 964 uint32 dataFilter; 965 uint32 ibssFilter; 966} RxFilterStatistics_t; 967 968typedef struct ClaibrationFailStatistics_t 969{ 970 uint32 initCalTotal; 971 uint32 initRadioBandsFail; 972 uint32 initSetParams; 973 uint32 initTxClpcFail; 974 uint32 initRxIqMmFail; 975 uint32 tuneCalTotal; 976 uint32 tuneDrpwRTrimFail; 977 uint32 tuneDrpwPdBufFail; 978 uint32 tuneDrpwTxMixFreqFail; 979 uint32 tuneDrpwTaCal; 980 uint32 tuneDrpwRxIf2Gain; 981 uint32 tuneDrpwRxDac; 982 uint32 tuneDrpwChanTune; 983 uint32 tuneDrpwRxTxLpf; 984 uint32 tuneDrpwLnaTank; 985 uint32 tuneTxLOLeakFail; 986 uint32 tuneTxIqMmFail; 987 uint32 tuneTxPdetFail; 988 uint32 tuneTxPPAFail; 989 uint32 tuneTxClpcFail; 990 uint32 tuneRxAnaDcFail; 991 uint32 tuneRxIqMmFail; 992 uint32 calStateFail; 993}ClaibrationFailStatistics_t; 994 995typedef struct ACXStatisticsStruct 996{ 997 INFO_ELE_HDR 998 RingStatistics_t ringStat; 999 DbgStatistics_t debug; 1000 TxStatistics_t tx; 1001 RxStatistics_t rx; 1002 DMAStatistics_t dma; 1003 IsrStatistics_t isr; 1004 WepStatistics_t wep; 1005 PwrStatistics_t pwr; 1006 AesStatistics_t aes; 1007 MicStatistics_t mic; 1008 EventStatistics_t event; 1009 PsPollUpsdStatistics_t ps; 1010 RxFilterStatistics_t rxFilter; 1011 ClaibrationFailStatistics_t radioCal; 1012 GemStatistics_t gem; 1013} ACXStatistics_t; 1014 1015/****************************************************************************** 1016 1017 Name: ACX_ROAMING_STATISTICS_TBL 1018 Desc: This information element reads the current roaming triggers 1019 counters/metrics. 1020 Type: Statistics 1021 Access: Read Only 1022 Length: 6 1023 1024******************************************************************************/ 1025typedef struct 1026{ 1027 INFO_ELE_HDR 1028 uint32 MissedBeacons; /* The current number of consecutive lost beacons*/ 1029 uint8 snrData; /* The current average SNR in db - For Data Packets*/ 1030 uint8 snrBeacon; /* The current average SNR in db - For Beacon Packets*/ 1031 int8 rssiData; /* The current average RSSI - For Data Packets*/ 1032 int8 rssiBeacon; /* The current average RSSI - For Beacon Packets*/ 1033}ACXRoamingStatisticsTable_t; 1034 1035 1036/****************************************************************************** 1037 1038 Name: ACX_FEATURE_CFG 1039 Desc: Provides expandability for future features 1040 Type: Configuration 1041 Access: Write Only 1042 Length: 8 1043 1044******************************************************************************/ 1045 1046/* bit defines for Option: */ 1047#define FEAT_PCI_CLK_RUN_ENABLE 0x00000002 /* Enable CLK_RUN on PCI bus */ 1048 1049/* bit defines for dataflowOptions: */ 1050#define DF_ENCRYPTION_DISABLE 0x00000001 /* When set, enable encription in FW.*/ 1051 /* when clear, disable encription. */ 1052#define DF_SNIFF_MODE_ENABLE 0x00000080 /* When set, enable decryption in FW.*/ 1053 /* when clear, disable decription. */ 1054typedef struct 1055{ 1056 INFO_ELE_HDR 1057 uint32 Options; /* Data flow options - refer to above definitions*/ 1058 uint32 dataflowOptions; /* Data flow options - refer to above definitions*/ 1059} ACXFeatureConfig_t; 1060 1061 1062 1063/****************************************************************************** 1064 1065 Name: ACX_TID_CFG 1066 Type: Configuration 1067 Access: Write Only 1068 Length: 16 1069 1070******************************************************************************/ 1071typedef enum 1072{ 1073 CHANNEL_TYPE_DCF = 0, /* DC/LEGACY*/ 1074 CHANNEL_TYPE_EDCF = 1, /* EDCA*/ 1075 CHANNEL_TYPE_HCCA = 2, /* HCCA*/ 1076 MAX_CHANNEL_TYPE = CHANNEL_TYPE_HCCA 1077} ChannelType_enum; 1078 1079typedef enum 1080{ 1081 PS_SCHEME_LEGACY = 0, /* Regular PS: simple sending of packets*/ 1082 PS_SCHEME_UPSD_TRIGGER = 1, /* UPSD: sending a packet triggers a UPSD downstream*/ 1083 PS_SCHEME_LEGACY_PSPOLL = 2, /* Legacy PSPOLL: a PSPOLL packet will be sent before */ 1084 /* every data packet transmission in this queue.*/ 1085 PS_SCHEME_SAPSD = 3, /* Scheduled APSD mode.*/ 1086 MAX_PS_SCHEME = PS_SCHEME_SAPSD 1087} PSScheme_enum; 1088 1089typedef enum 1090{ 1091 ACK_POLICY_LEGACY = 0, /* ACK immediate policy*/ 1092 ACK_POLICY_NO_ACK = 1, /* no ACK policy*/ 1093 ACK_POLICY_BLOCK = 2, /* block ack policy*/ 1094 MAX_ACK_POLICY = ACK_POLICY_BLOCK 1095} AckPolicy_enum; 1096 1097 1098#ifdef HOST_COMPILE 1099typedef uint8 ChannelType_e; 1100typedef uint8 PSScheme_e; 1101typedef uint8 AckPolicy_e; 1102#else 1103typedef ChannelType_enum ChannelType_e; 1104typedef PSScheme_enum PSScheme_e; 1105typedef AckPolicy_enum AckPolicy_e; 1106#endif 1107 1108 1109 1110/* Michal recommendation: 1111 in the ACXTIDConfig_t structure we need only the fields psScheme, and one other field for AC id (queue? tsid?). 1112 the rest are obsolete. see IEPsDeliveryTriggerType_t in CE2.0. 1113 */ 1114 1115typedef struct 1116{ 1117 INFO_ELE_HDR 1118 uint8 queueID; /* The TX queue ID number (0-7).*/ 1119 uint8 channelType; /* Channel access type for the queue.*/ 1120 /* Refer to ChannelType_enum.*/ 1121 uint8 tsid; /* for EDCA - the AC Index (0-3, refer to*/ 1122 /* AccessCategory_enum).*/ 1123 /* For HCCA - HCCA Traffic Stream ID (TSID) of */ 1124 /* the queue (8-15).*/ 1125 PSScheme_e psScheme; /* The power save scheme of the specified queue.*/ 1126 /* Refer to PSScheme_enum.*/ 1127 AckPolicy_e ackPolicy; /* The TX queue ACK policy. */ 1128 uint8 padding[3]; /* alignment to 32bits boundry */ 1129 uint32 APSDConf[2]; /* Not supported in this version !!!*/ 1130}ACXTIDConfig_t; 1131 1132 1133 1134/****************************************************************************** 1135 1136 Name: ACX_PS_RX_STREAMING 1137 Type: Configuration 1138 Access: Write Only 1139 Length: 32 1140 1141******************************************************************************/ 1142typedef struct 1143{ 1144 INFO_ELE_HDR 1145 uint8 TID; /* The TID index*/ 1146 Bool_e rxPSDEnabled; /* indicates if this traffic stream requires */ 1147 /* employing an RX Streaming delivery mechanism for the TID*/ 1148 1149 uint8 streamPeriod; /* the time period for which a trigger needs to be transmitted*/ 1150 /* in case no data TX triggers are sent by host*/ 1151 uint8 txTimeout; /* the timeout from last TX trigger after which FW*/ 1152 /* starts generating triggers by itself*/ 1153}ACXPsRxStreaming_t; 1154 1155/************************************************************ 1156* MULTIPLE RSSI AND SNR * 1157*************************************************************/ 1158 1159typedef enum 1160{ 1161 RX_QUALITY_EVENT_LEVEL = 0, /* The event is a "Level" indication which keeps */ 1162 /* triggering as long as the average RSSI is below*/ 1163 /* the threshold.*/ 1164 1165 RX_QUALITY_EVENT_EDGE = 1 /* The event is an "Edge" indication which triggers*/ 1166 /* only when the RSSI threshold is crossed from above.*/ 1167}rxQualityEventType_enum; 1168 1169/* The direction in which the trigger is active */ 1170typedef enum 1171{ 1172 RSSI_EVENT_DIR_LOW = 0, 1173 RSSI_EVENT_DIR_HIGH = 1, 1174 RSSI_EVENT_DIR_BIDIR = 2 1175}RssiEventDir_e; 1176 1177/****************************************************************************** 1178 1179 RSSI/SNR trigger configuration: 1180 1181 ACX_RSSI_SNR_TRIGGER 1182 ACX_RSSI_SNR_WIGHTS 1183 1184******************************************************************************/ 1185#define NUM_OF_RSSI_SNR_TRIGGERS 8 1186typedef struct 1187{ 1188 int16 threshold; 1189 uint16 pacing; /* Minimum delay between consecutive triggers in milliseconds (0 - 60000) */ 1190 uint8 metric; /* RSSI Beacon, RSSI Packet, SNR Beacon, SNR Packet */ 1191 uint8 type; /* Level / Edge */ 1192 uint8 direction; /* Low, High, Bidirectional */ 1193 uint8 hystersis; /* Hysteresis range in dB around the threshold value (0 - 255) */ 1194 uint8 index; /* Index of Event. Values 0 - 7 */ 1195 uint8 enable; /* 1 - Configured, 2 - Not Configured; (for recovery using) */ 1196 uint8 padding[2]; 1197}RssiSnrTriggerCfg_t; 1198 1199typedef struct 1200{ 1201 INFO_ELE_HDR 1202 RssiSnrTriggerCfg_t param; 1203}ACXRssiSnrTriggerCfg_t; 1204 1205/* Filter Weight for every one of 4 RSSI /SNR Trigger Metrics */ 1206typedef struct 1207{ 1208 uint8 rssiBeaconAverageWeight; 1209 uint8 rssiPacketAverageWeight; 1210 uint8 snrBeaconAverageWeight; 1211 uint8 snrPacketAverageWeight; 1212}RssiSnrAverageWeights_t; 1213 1214typedef struct 1215{ 1216 INFO_ELE_HDR 1217 RssiSnrAverageWeights_t param; 1218}ACXRssiSnrAverageWeights_t; 1219 1220typedef enum 1221{ 1222 METRIC_EVENT_RSSI_BEACON = 0, 1223 METRIC_EVENT_RSSI_DATA = 1, 1224 METRIC_EVENT_SNR_BEACON = 2, 1225 METRIC_EVENT_SNR_DATA = 3, 1226 METRIC_EVENT_TRIGGER_SIZE = 4 1227}MetricEvent_e; 1228 1229/****************************************************************************** 1230 1231 Name: ACX_NOISE_HIST 1232 Desc: Noise Histogram activation is done by special command from host which 1233 is responsible to read the results using this IE. 1234 Type: Configuration 1235 Access: Read Only 1236 Length: 48 (NOISE_HIST_LEN=8) 1237 1238******************************************************************************/ 1239 1240typedef struct 1241{ 1242 INFO_ELE_HDR 1243 uint32 counters[NOISE_HIST_LEN]; /* This array of eight 32 bit counters describes */ 1244 /* the histogram created by the FW noise */ 1245 /* histogram engine.*/ 1246 1247 uint32 numOfLostCycles; /* This field indicates the number of measurement */ 1248 /* cycles with failure because Tx was active.*/ 1249 1250 uint32 numOfTxHwGenLostCycles; /* This field indicates the number of measurement */ 1251 /* cycles with failure because Tx (FW Generated)*/ 1252 /* was active.*/ 1253 1254 uint32 numOfRxLostCycles; /* This field indicates the number of measurement */ 1255 /* cycles because the Rx CCA was active. */ 1256} NoiseHistResult_t; 1257 1258/****************************************************************************** 1259 1260 Name: ACX_PD_THRESHOLD 1261 Type: Configuration 1262 Access: Write Only 1263 Length: 4 1264 1265******************************************************************************/ 1266 1267typedef struct 1268{ 1269 INFO_ELE_HDR 1270 uint32 pdThreshold; /* The packet detection threshold in the PHY.*/ 1271} ACXPacketDetection_t; 1272 1273 1274/****************************************************************************** 1275 1276 Name: ACX_RATE_POLICY 1277 Type: Configuration 1278 Access: Write Only 1279 Length: 132 1280 1281******************************************************************************/ 1282 1283#define HOST_MAX_RATE_POLICIES (8) 1284 1285 1286typedef struct 1287{ 1288 INFO_ELE_HDR 1289 uint32 numOfClasses; /* The number of transmission rate */ 1290 /* fallback policy classes.*/ 1291 1292 txAttrClass_t rateClasses[HOST_MAX_RATE_POLICIES]; /* Rate Policies table*/ 1293}ACXTxAttrClasses_t; 1294 1295 1296 1297/****************************************************************************** 1298 1299 Name: ACX_CTS_PROTECTION 1300 Type: Configuration 1301 Access: Write Only 1302 Length: 1 1303 1304******************************************************************************/ 1305 1306typedef struct 1307{ 1308 INFO_ELE_HDR 1309 uint8 ctsProtectMode; /* This field is a flag enabling or disabling the*/ 1310 /* CTS-to-self protection mechanism:*/ 1311 /* 0 - disable, 1 - enable*/ 1312 uint8 padding[3]; /* alignment to 32bits boundry */ 1313}ACXCtsProtection_t; 1314 1315/****************************************************************************** 1316 1317 ACX_FRAG_CFG 1318 1319******************************************************************************/ 1320 1321typedef struct 1322{ 1323 INFO_ELE_HDR 1324 uint16 fragThreshold; 1325 uint8 padding[2]; /* alignment toIE_RTS_CTS_CFG 32bits boundry */ 1326 1327} ACXFRAGThreshold_t; 1328 1329 1330/****************************************************************************** 1331 1332 ACX_RX_CONFIG_OPT 1333 1334******************************************************************************/ 1335typedef enum 1336{ 1337 RX_QUEUE_TYPE_RX_LOW_PRIORITY, /* All except the high priority */ 1338 RX_QUEUE_TYPE_RX_HIGH_PRIORITY, /* Management and voice packets */ 1339 RX_QUEUE_TYPE_NUM, 1340 RX_QUEUE_TYPE_MAX = MAX_POSITIVE8 1341} RxQueueType_enum; 1342 1343 1344#ifdef HOST_COMPILE 1345 typedef uint8 RxQueueType_e; 1346#else 1347 typedef RxQueueType_enum RxQueueType_e; 1348#endif 1349 1350 1351typedef struct 1352{ 1353 INFO_ELE_HDR 1354 uint16 rxMblkThreshold; /* Occupied Rx mem-blocks number which requires interrupting the host (0 = no buffering) */ 1355 uint16 rxPktThreshold; /* Rx packets number which requires interrupting the host (0 = no buffering) */ 1356 uint16 rxCompleteTimeout; /* Max time in msec the FW may delay Rx-Complete interrupt */ 1357 RxQueueType_e rxQueueType; /* see above */ 1358 uint8 reserved; 1359} ACXRxBufferingConfig_t; 1360 1361 1362/****************************************************************************** 1363 1364 Name: ACX_SLEEP_AUTH 1365 Desc: configuration of sleep authorization level 1366 Type: System Configuration 1367 Access: Write Only 1368 Length: 1 1369 1370******************************************************************************/ 1371 1372typedef struct 1373{ 1374 INFO_ELE_HDR 1375 uint8 sleepAuth; /* The sleep level authorization of the device. */ 1376 /* 0 - Always active*/ 1377 /* 1 - Power down mode: light / fast sleep*/ 1378 /* 2 - ELP mode: Deep / Max sleep*/ 1379 1380 uint8 padding[3]; /* alignment to 32bits boundry */ 1381}ACXSleepAuth_t; 1382 1383/****************************************************************************** 1384 1385 Name: ACX_PM_CONFIG 1386 Desc: configuration of power management 1387 Type: System Configuration 1388 Access: Write Only 1389 Length: 1 1390 1391******************************************************************************/ 1392 1393typedef struct 1394{ 1395 INFO_ELE_HDR 1396 uint32 hostClkSettlingTime; /* Host CLK settling time (in uSec units) */ 1397 uint8 hostFastWakeupSupport; /* 0 - not supported */ 1398 /* 1 - supported */ 1399 uint8 padding[3]; /* alignment to 32bits boundry */ 1400}ACXPMConfig_t; 1401 1402/****************************************************************************** 1403 1404 Name: ACX_PREAMBLE_TYPE 1405 Type: Configuration 1406 Access: Write Only 1407 Length: 1 1408 1409******************************************************************************/ 1410 1411typedef enum 1412{ 1413 LONG_PREAMBLE = 0, 1414 SHORT_PREAMBLE = 1, 1415 OFDM_PREAMBLE = 4, 1416 N_MIXED_MODE_PREAMBLE = 6, 1417 GREENFIELD_PREAMBLE = 7, 1418 PREAMBLE_INVALID = 0xFF 1419} Preamble_enum; 1420 1421 1422#ifdef HOST_COMPILE 1423typedef uint8 Preamble_e; 1424#else 1425typedef Preamble_enum Preamble_e; 1426#endif 1427 1428 1429typedef struct 1430{ 1431 INFO_ELE_HDR 1432 Preamble_e preamble; /* When set, the WiLink transmits beacon, probe response, */ 1433 /* RTS and PS Poll frames with a short preamble. */ 1434 /* When clear, the WiLink transmits the frame with a long */ 1435 /* preamble.*/ 1436 uint8 padding[3]; /* alignment to 32bits boundry */ 1437} ACXPreamble_t; 1438 1439 1440/****************************************************************************** 1441 1442 Name: ACX_CCA_THRESHOLD 1443 Type: Configuration 1444 Access: Write Only 1445 Length: 2 1446 1447******************************************************************************/ 1448 1449typedef struct 1450{ 1451 INFO_ELE_HDR 1452 uint16 rxCCAThreshold; /* The Rx Clear Channel Assessment threshold in the PHY*/ 1453 /* (the energy threshold).*/ 1454 Bool_e txEnergyDetection; /* The Tx ED value for TELEC Enable/Disable*/ 1455 uint8 padding; 1456} ACXEnergyDetection_t; 1457 1458 1459/****************************************************************************** 1460 1461 Name: ACX_EVENT_MBOX_MASK 1462 Type: Operation 1463 Access: Write Only 1464 Length: 8 1465 1466******************************************************************************/ 1467 1468typedef struct 1469{ 1470 INFO_ELE_HDR 1471 uint32 lowEventMask; /* Indicates which events are masked and which are not*/ 1472 /* Refer to EventMBoxId_enum in public_event_mbox.h.*/ 1473 1474 uint32 highEventMask; /* Not in use (should always be set to 0xFFFFFFFF).*/ 1475} ACXEventMboxMask_t; 1476 1477 1478/****************************************************************************** 1479 1480 Name: ACX_CONN_MONIT_PARAMS 1481 Desc: This information element configures the SYNCHRONIZATION_TIMEOUT 1482 interrupt indicator. It configures the number of missed Beacons 1483 before issuing the SYNCHRONIZATION_TIMEOUT event. 1484 Type: Configuration 1485 Access: Write Only 1486 Length: 8 1487 1488******************************************************************************/ 1489 1490typedef struct 1491{ 1492 INFO_ELE_HDR 1493 uint32 TSFMissedThreshold; /* The number of consecutive beacons that can be */ 1494 /* lost before the WiLink raises the */ 1495 /* SYNCHRONIZATION_TIMEOUT event.*/ 1496 1497 uint32 BSSLossTimeout; /* The delay (in time units) between the time at */ 1498 /* which the device issues the SYNCHRONIZATION_TIMEOUT*/ 1499 /* event until, if no probe response or beacon is */ 1500 /* received a BSS_LOSS event is issued.*/ 1501} AcxConnectionMonitorOptions; 1502 1503/****************************************************************************** 1504 1505 Name: ACX_CONS_TX_FAILURE 1506 Desc: This information element configures the number of frames transmission 1507 failures before issuing the "Max Tx Retry" event. The counter is 1508 incremented only for unicast frames or frames that require Ack 1509 Type: Configuration 1510 Access: Write Only 1511 Length: 1 1512 1513******************************************************************************/ 1514 1515typedef struct 1516{ 1517 INFO_ELE_HDR 1518 uint8 maxTxRetry; /* the number of frames transmission failures before */ 1519 /* issuing the "Max Tx Retry" event*/ 1520 uint8 padding[3]; /* alignment to 32bits boundry */ 1521} ACXConsTxFailureTriggerParameters_t; 1522 1523 1524/****************************************************************************** 1525 1526 Name: ACX_BCN_DTIM_OPTIONS 1527 Type: Configuration 1528 Access: Write Only 1529 Length: 5 1530 1531******************************************************************************/ 1532 1533typedef struct 1534{ 1535 INFO_ELE_HDR 1536 uint16 beaconRxTimeOut; 1537 uint16 broadcastTimeOut; 1538 uint8 rxBroadcastInPS; /* if set, enables receive of broadcast packets */ 1539 /* in Power-Save mode.*/ 1540 uint8 consecutivePsPollDeliveryFailureThr; /* Consecutive PS Poll Fail before updating the Driver */ 1541 uint8 padding[2]; /* alignment to 32bits boundry */ 1542} ACXBeaconAndBroadcastOptions_t; 1543 1544 1545/****************************************************************************** 1546 1547 Name: ACX_SG_ENABLE 1548 Desc: This command instructs the WiLink to set the Soft Gemini (BT co-existence) 1549 state to either enable/disable or sense mode. 1550 Type: Configuration 1551 Access: Write Only 1552 Length: 1 1553 1554******************************************************************************/ 1555typedef struct 1556{ 1557 INFO_ELE_HDR 1558 uint8 coexOperationMode; /* 0- Co-ex operation is Disabled 1559 1- Co-ex operation is configured to Protective mode 1560 2- Co-ex operation is configured to Opportunistic mode 1561 1562 Default Value: 0- Co-ex operation is Disabled 1563 */ 1564 1565 uint8 padding[3]; /* alignment to 32bits boundry */ 1566 1567} ACXBluetoothWlanCoEnableStruct; 1568 1569 1570 1571/** \struct TSoftGeminiParams 1572 * \brief Soft Gemini Parameters 1573 * 1574 * \par Description 1575 * Used for Setting/Printing Soft Gemini Parameters 1576 * 1577 * \sa 1578 */ 1579 1580typedef enum 1581{ 1582 SOFT_GEMINI_BT_PER_THRESHOLD = 0, 1583 SOFT_GEMINI_HV3_MAX_OVERRIDE, 1584 SOFT_GEMINI_BT_NFS_SAMPLE_INTERVAL, 1585 SOFT_GEMINI_BT_LOAD_RATIO, 1586 SOFT_GEMINI_AUTO_PS_MODE, 1587 SOFT_GEMINI_AUTO_SCAN_PROBE_REQ, 1588 SOFT_GEMINI_ACTIVE_SCAN_DURATION_FACTOR_HV3, 1589 SOFT_GEMINI_ANTENNA_CONFIGURATION, 1590 SOFT_GEMINI_BEACON_MISS_PERCENT, 1591 SOFT_GEMINI_RATE_ADAPT_THRESH, 1592 SOFT_GEMINI_RATE_ADAPT_SNR, 1593 SOFT_GEMINI_WLAN_PS_BT_ACL_MASTER_MIN_BR, 1594 SOFT_GEMINI_WLAN_PS_BT_ACL_MASTER_MAX_BR, 1595 SOFT_GEMINI_WLAN_PS_MAX_BT_ACL_MASTER_BR, 1596 SOFT_GEMINI_WLAN_PS_BT_ACL_SLAVE_MIN_BR, 1597 SOFT_GEMINI_WLAN_PS_BT_ACL_SLAVE_MAX_BR, 1598 SOFT_GEMINI_WLAN_PS_MAX_BT_ACL_SLAVE_BR, 1599 SOFT_GEMINI_WLAN_PS_BT_ACL_MASTER_MIN_EDR, 1600 SOFT_GEMINI_WLAN_PS_BT_ACL_MASTER_MAX_EDR, 1601 SOFT_GEMINI_WLAN_PS_MAX_BT_ACL_MASTER_EDR, 1602 SOFT_GEMINI_WLAN_PS_BT_ACL_SLAVE_MIN_EDR, 1603 SOFT_GEMINI_WLAN_PS_BT_ACL_SLAVE_MAX_EDR, 1604 SOFT_GEMINI_WLAN_PS_MAX_BT_ACL_SLAVE_EDR, 1605 SOFT_GEMINI_RXT, 1606 SOFT_GEMINI_TXT, 1607 SOFT_GEMINI_ADAPTIVE_RXT_TXT, 1608 SOFT_GEMINI_PS_POLL_TIMEOUT, 1609 SOFT_GEMINI_UPSD_TIMEOUT, 1610 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_MASTER_MIN_EDR, 1611 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_MASTER_MAX_EDR, 1612 SOFT_GEMINI_WLAN_ACTIVE_MAX_BT_ACL_MASTER_EDR, 1613 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_SLAVE_MIN_EDR, 1614 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_SLAVE_MAX_EDR, 1615 SOFT_GEMINI_WLAN_ACTIVE_MAX_BT_ACL_SLAVE_EDR, 1616 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_MIN_BR, 1617 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_MAX_BR, 1618 SOFT_GEMINI_WLAN_ACTIVE_MAX_BT_ACL_BR, 1619 SOFT_GEMINI_PASSIVE_SCAN_DURATION_FACTOR_HV3, 1620 SOFT_GEMINI_PASSIVE_SCAN_DURATION_FACTOR_A2DP, 1621 SOFT_GEMINI_PASSIVE_SCAN_A2DP_BT_TIME, 1622 SOFT_GEMINI_PASSIVE_SCAN_A2DP_WLAN_TIME, 1623 SOFT_GEMINI_HV3_MAX_SERVED, 1624 SOFT_GEMINI_DHCP_TIME, 1625 SOFT_GEMINI_ACTIVE_SCAN_DURATION_FACTOR_A2DP, 1626 SOFT_GEMINI_TEMP_PARAM_1, 1627 SOFT_GEMINI_TEMP_PARAM_2, 1628 SOFT_GEMINI_TEMP_PARAM_3, 1629 SOFT_GEMINI_TEMP_PARAM_4, 1630 SOFT_GEMINI_TEMP_PARAM_5, 1631 SOFT_GEMINI_PARAMS_MAX 1632} softGeminiParams; 1633 1634typedef struct 1635{ 1636 uint32 coexParams[SOFT_GEMINI_PARAMS_MAX]; 1637 uint8 paramIdx; /* the param index which the FW should update, if it equals to 0xFF - update all */ 1638 uint8 padding[3]; 1639} TSoftGeminiParams; 1640 1641 1642/****************************************************************************** 1643 1644 Name: ACX_SG_CFG 1645 Desc: This command instructs the WiLink to set the Soft Gemini (BT co-existence) 1646 parameters to the desired values. 1647 Type: Configuration 1648 Access: Write (Read For GWSI - disable for now) 1649 Length: 1 1650 1651******************************************************************************/ 1652typedef struct 1653 1654{ 1655 INFO_ELE_HDR 1656 1657 TSoftGeminiParams softGeminiParams; 1658} ACXBluetoothWlanCoParamsStruct; 1659 1660/****************************************************************************** 1661 1662 Name: ACX_FM_COEX_CFG 1663 Desc: This command instructs the WiLink to set the FM co-existence 1664 parameters to the desired values. 1665 Type: Configuration 1666 Access: Write 1667 Length: 1668 1669******************************************************************************/ 1670typedef struct 1671 1672{ 1673 INFO_ELE_HDR 1674 1675 uint8 enable; /* enable(1) / disable(0) the FM Coex feature */ 1676 1677 uint8 swallowPeriod; /* Swallow period used in COEX PLL swallowing mechanism, 1678 Range: 0-0xFF, 0xFF = use FW default 1679 */ 1680 1681 uint8 nDividerFrefSet1; /* The N divider used in COEX PLL swallowing mechanism for Fref of 38.4/19.2 Mhz. 1682 Range: 0-0xFF, 0xFF = use FW default 1683 */ 1684 1685 uint8 nDividerFrefSet2; /* The N divider used in COEX PLL swallowing mechanism for Fref of 26/52 Mhz. 1686 Range: 0-0xFF, 0xFF = use FW default 1687 */ 1688 1689 uint16 mDividerFrefSet1; /* The M divider used in COEX PLL swallowing mechanism for Fref of 38.4/19.2 Mhz. 1690 Range: 0-0x1FF, 0xFFFF = use FW default 1691 */ 1692 1693 uint16 mDividerFrefSet2; /* The M divider used in COEX PLL swallowing mechanism for Fref of 26/52 Mhz. 1694 Range: 0-0x1FF, 0xFFFF = use FW default 1695 */ 1696 1697 uint32 coexPllStabilizationTime; /* The time duration in uSec required for COEX PLL to stabilize. 1698 0xFFFFFFFF = use FW default 1699 */ 1700 1701 uint16 ldoStabilizationTime; /* The time duration in uSec required for LDO to stabilize. 1702 0xFFFFFFFF = use FW default 1703 */ 1704 1705 uint8 fmDisturbedBandMargin; /* The disturbed frequency band margin around the disturbed 1706 frequency center (single sided). 1707 For example, if 2 is configured, the following channels 1708 will be considered disturbed channel: 1709 80 +- 0.1 MHz, 91 +- 0.1 MHz, 98 +- 0.1 MHz, 102 +- 0.1 MHz 1710 0xFF = use FW default 1711 */ 1712 1713 uint8 swallowClkDif; /* The swallow clock difference of the swallowing mechanism. 1714 0xFF = use FW default 1715 */ 1716 1717} ACXWlanFmCoexStruct; 1718 1719 1720 1721/****************************************************************************** 1722 1723 Name: ACX_TSF_INFO 1724 Type: Operation 1725 Access: Read Only 1726 Length: 20 1727 1728******************************************************************************/ 1729typedef struct ACX_fwTSFInformation 1730{ 1731 INFO_ELE_HDR 1732 uint32 CurrentTSFHigh; 1733 uint32 CurrentTSFLow; 1734 uint32 lastTBTTHigh; 1735 uint32 lastTBTTLow; 1736 uint8 LastDTIMCount; 1737 uint8 padding[3]; /* alignment to 32bits boundry */ 1738}ACX_fwTSFInformation_t; 1739 1740 1741/****************************************************************************** 1742 1743Name: ACX_BET_ENABLE 1744Desc: Enable or Disable the Beacon Early Termination module. In addition initialized the 1745 Max Dropped beacons parameter 1746Type: Configuration 1747Access: Write 1748Length: 6 1749Note: 1750******************************************************************************/ 1751typedef struct 1752 1753{ 1754 INFO_ELE_HDR 1755 uint8 Enable; /* specifies if beacon early termination procedure is enabled or disabled: 0 disabled, 1 enabled */ 1756 uint8 MaximumConsecutiveET; /* specifies the maximum number of consecutive beacons that may be early terminated. After this number is reached 1757 at least one full beacon must be correctly received in FW before beacon ET resumes. Legal range: 0 255 */ 1758 uint8 padding[2]; 1759}ACXBet_Enable_t; 1760 1761 1762/****************************************************************************** 1763 1764 Name: DOT11_RX_MSDU_LIFE_TIME 1765 Type: Operation 1766 Access: Write Only 1767 Length: 4 1768 1769******************************************************************************/ 1770 1771typedef struct 1772{ 1773 INFO_ELE_HDR 1774 uint32 RxMsduLifeTime; /* The maximum amount of time, in TU, that the WiLink */ 1775 /* should attempt to collect fragments of an MSDU before */ 1776 /* discarding them. */ 1777 /* The default value for this field is 512.*/ 1778} dot11RxMsduLifeTime_t; 1779 1780 1781/****************************************************************************** 1782 1783 Name: DOT11_CUR_TX_PWR 1784 Desc: This IE indicates the maximum TxPower in Dbm/10 currently being used to transmit data. 1785 Type: Operation 1786 Access: Write Only 1787 Length: 1 1788 1789******************************************************************************/ 1790 1791typedef struct 1792{ 1793 INFO_ELE_HDR 1794 uint8 dot11CurrentTxPower; /* the max Power in Dbm/10 to be used to transmit data.*/ 1795 uint8 padding[3]; /* alignment to 32bits boundry */ 1796} dot11CurrentTxPowerStruct ; 1797 1798 1799/****************************************************************************** 1800 1801 Name: DOT11_RX_DOT11_MODE 1802 Desc: This IE indicates the current Rx Mode used by DSSS PHY. 1803 Type: Configuration 1804 Access: Write Only 1805 Length: 4 1806 1807******************************************************************************/ 1808/* 1809Possible values for Rx DOT11 Mode are the following: 1810Value Description 1811===== =========== 18123 11g - processing of both a and b packet formats is enabled 18132 11b - processing of b packet format is enabled 18141 11a - processing of a packet format is enabled 18150 undefined 1816*/ 1817 1818typedef struct 1819{ 1820 INFO_ELE_HDR 1821 uint32 dot11RxDot11Mode; /* refer to above table*/ 1822} dot11RxDot11ModeStruct; 1823 1824 1825/****************************************************************************** 1826 1827 Name: DOT11_RTS_THRESHOLD 1828 Type: Configuration 1829 Access: Write Only 1830 Length: 2 1831 1832******************************************************************************/ 1833 1834typedef struct 1835{ 1836 INFO_ELE_HDR 1837 uint16 RTSThreshold; /* The number of octets in an MPDU, below which an */ 1838 /* RTS/CTS handshake is not performed.*/ 1839 1840 uint8 padding[2]; /* alignment to 32bits boundry */ 1841}dot11RTSThreshold_t; 1842 1843 1844/****************************************************************************** 1845 1846 Name: DOT11_GROUP_ADDRESS_TBL 1847 Desc: The variable lengths of MAC addresses that are define as listening for 1848 multicast. The field Number of groups identifies how many MAC Addresses 1849 are relevant in that information element. 1850 Type: Configuration 1851 Access: Write Only 1852 Length: up to 50 bytes 1853 1854******************************************************************************/ 1855#define ADDRESS_GROUP_MAX (8) 1856#define ADDRESS_GROUP_MAX_LEN (6 * ADDRESS_GROUP_MAX) 1857typedef struct 1858{ 1859 INFO_ELE_HDR 1860 uint8 fltrState; /* 1 - multicast filtering is enabled. */ 1861 /* 0 - multicast filtering is disabled.*/ 1862 1863 uint8 numOfGroups; /* number of relevant multicast */ 1864 /* addresses.*/ 1865 1866 uint8 padding[2]; /* alignment to 32bits boundary */ 1867 uint8 dataLocation[ADDRESS_GROUP_MAX_LEN]; /* table of MAC addresses.*/ 1868}dot11MulticastGroupAddrStart_t; 1869 1870/****************************************************************************** 1871 1872 ACX_CONFIG_PS_WMM (Patch for Wi-Fi Bug) 1873 1874******************************************************************************/ 1875 1876typedef struct 1877{ 1878 INFO_ELE_HDR 1879 uint32 ConfigPsOnWmmMode; /* TRUE - Configure PS to work on WMM mode - do not send the NULL/PS_POLL 1880 packets even if TIM is set. 1881 FALSE - Configure PS to work on Non-WMM mode - work according to the 1882 standard. */ 1883} ACXConfigPsWmm_t; 1884 1885/****************************************************************************** 1886 1887 1888 Name: ACX_SET_RX_DATA_FILTER 1889 Desc: This IE configure one filter in the data filter module. can be used 1890 for add / remove / modify filter. 1891 Type: Filtering Configuration 1892 Access: Write Only 1893 Length: 4 + size of the fields of the filter (can vary between filters) 1894 1895******************************************************************************/ 1896/* data filter action */ 1897 1898#ifdef HOST_COMPILE 1899 1900#define FILTER_DROP 0 /* Packet will be dropped by the FW and wont be delivered to the driver. */ 1901#define FILTER_SIGNAL 1 /* Packet will be delivered to the driver. */ 1902#define FILTER_FW_HANDLE 2 /* Packet will be handled by the FW and wont be delivered to the driver. */ 1903 1904#else 1905 1906typedef enum { 1907 FILTER_DROP = 0, 1908 FILTER_SIGNAL , 1909 FILTER_FW_HANDLE, 1910 FILTER_MAX = 0xFF 1911}filter_enum; 1912 1913#endif 1914 1915#ifdef HOST_COMPILE 1916typedef uint8 filter_e; 1917#else 1918typedef filter_enum filter_e; 1919#endif 1920 1921/* data filter command */ 1922#define REMOVE_FILTER 0 /* Remove filter */ 1923#define ADD_FILTER 1 /* Add filter */ 1924 1925/* limitation */ 1926#define MAX_DATA_FILTERS 4 1927#define MAX_DATA_FILTER_SIZE 98 1928 1929typedef struct 1930{ 1931 INFO_ELE_HDR 1932 uint8 command; /* 0-remove, 1-add */ 1933 uint8 index; /* range 0-MAX_DATA_FILTERS */ 1934 filter_e action; /* action: FILTER_DROP, FILTER_SIGNAL, FILTER_FW_HANDLE */ 1935 uint8 numOfFields; /* number of field in specific filter */ 1936 uint8 FPTable; /* filter fields starts here. variable size. */ 1937} DataFilterConfig_t; 1938 1939/****************************************************************************** 1940 1941 Name: ACX_ENABLE_RX_DATA_FILTER 1942 Desc: This IE disable / enable the data filtering feature. in case the 1943 featue is enabled - default action should be set as well. 1944 Type: Filtering Configuration 1945 Access: Write Only 1946 Length: 2 1947 1948******************************************************************************/ 1949 1950typedef struct 1951{ 1952 INFO_ELE_HDR 1953 uint8 enable; /* 1 - enable, 0 - disable the data data filtering feature */ 1954 filter_e action; /* default action that should be implemented for packets that wont 1955 match any of the filters, or in case no filter is configured */ 1956 uint8 padding[2]; /* alignment to 32bits boundary */ 1957} DataFilterDefault_t; 1958 1959 1960/****************************************************************************** 1961 1962 Name: ACX_GET_DATA_FILTER_STATISTICS 1963 Desc: get statistics of the data filtering module. 1964 Type: Statistics 1965 Access: Read Only 1966 Length: 20 1967 1968******************************************************************************/ 1969 1970typedef struct 1971{ 1972 INFO_ELE_HDR 1973 uint32 unmatchedPacketsCount; /* number of packets didn't match any filter (when the feature was enabled). */ 1974 uint32 matchedPacketsCount[MAX_DATA_FILTERS]; /* number of packets matching each of the filters */ 1975} ACXDataFilteringStatistics_t; 1976 1977 1978#ifdef RADIO_SCOPE 1979/****************************************************************************** 1980 1981****************************************************************************** 1982 1983 Name: ACX_RS_ENABLE 1984 Desc: This command instructs the WiLink to set the Radio Scope functionality 1985 state to either enable/disable. 1986 Type: Configuration 1987 Access: Write Only 1988 Length: 1 1989 1990******************************************************************************/ 1991typedef struct 1992{ 1993 INFO_ELE_HDR 1994 uint8 Enable; /* RadioScope feature will be enabled (1) or disabled(0) */ 1995 uint8 padding[3]; /* alignment to 32 bits */ 1996} ACXRadioScopeEnableStruct; 1997 1998/****************************************************************************** 1999 2000 Name: ACX_RS_RX 2001 Desc: This command instructs the WiLink to set the Radio Scope 2002 parameters to the desired values. 2003 Type: Configuration 2004 Access: Read/Write 2005 Length: 1 2006 2007 We have the following available memory area: 2008 2009 Information Element ID - 2 bytes 2010 Information Element Length - 2 bytes 2011 2012 Now the rest is MAX_CMD_PARAMS 2013 but 4 bytes must be subtracted 2014 because of the IE in Buffer. 2015 2016 2017******************************************************************************/ 2018typedef struct 2019{ 2020 uint16 service; 2021 uint16 length; 2022 uint8 channel; 2023 uint8 band; 2024 uint8 status; 2025 uint8 padding[1]; /*32 bit padding */ 2026}RxPacketStruct; 2027 2028typedef struct 2029{ 2030 /* We have the following available memory area: */ 2031 /* */ 2032 /* Information Element ID - 2 bytes */ 2033 /* Information Element Length - 2 bytes */ 2034 /* Number Of Packets in Buffer - 2 bytes */ 2035 /* */ 2036 /* Now the rest is MAX_CMD_PARAMS */ 2037 /* but 2 bytes must be subtracted */ 2038 /* because of the Number Of Packets in Buffer. */ 2039 RxPacketStruct packet[(MAX_CMD_PARAMS-2)/sizeof(RxPacketStruct)]; 2040}RxCyclicBufferStruct; 2041 2042typedef struct 2043 2044{ 2045 INFO_ELE_HDR 2046 /*uint8 padding[MAX_CMD_PARAMS-4]; */ 2047 RxCyclicBufferStruct buf; 2048} ACXRadioScopeRxParamsStruct; 2049 2050#endif /* RADIO_SCOPE */ 2051/****************************************************************************** 2052 Name: ACX_KEEP_ALIVE_MODE 2053 Desc: Set/Get the Keep Alive feature mode. 2054 Type: Configuration 2055 Access: Write 2056 Length: 4 - 1 for the mode + 3 for padding. 2057 2058******************************************************************************/ 2059 2060typedef struct 2061{ 2062INFO_ELE_HDR 2063 Bool_e modeEnabled; 2064 uint8 padding [3]; 2065}AcxKeepAliveMode; 2066 2067 2068/****************************************************************************** 2069 2070 Name: ACX_SET_KEEP_ALIVE_CONFIG 2071 Desc: Configure a KLV template parameters. 2072 Type: Configuration 2073 Access: Write Only 2074 Length: 8 2075 2076******************************************************************************/ 2077 2078typedef enum 2079{ 2080 NO_TX = 0, 2081 PERIOD_ONLY 2082} KeepAliveTrigger_enum; 2083 2084#ifdef HOST_COMPILE 2085typedef uint8 KeepAliveTrigger_e; 2086#else 2087typedef KeepAliveTrigger_enum KeepAliveTrigger_e; 2088#endif 2089 2090typedef enum 2091{ 2092 KLV_TEMPLATE_INVALID = 0, 2093 KLV_TEMPLATE_VALID, 2094 KLV_TEMPLATE_PENDING /* this option is FW internal only. host can only configure VALID or INVALID*/ 2095} KeepAliveTemplateValidation_enum; 2096 2097#ifdef HOST_COMPILE 2098typedef uint8 KeepAliveTemplateValidation_e; 2099#else 2100typedef KeepAliveTemplateValidation_enum KeepAliveTemplateValidation_e; 2101#endif 2102 2103typedef struct 2104{ 2105 INFO_ELE_HDR 2106 uint32 period; /*at range 1000-3600000 (msec). (To allow better range for debugging)*/ 2107 uint8 index; 2108 KeepAliveTemplateValidation_e valid; 2109 KeepAliveTrigger_e trigger; 2110 uint8 padding; 2111} AcxSetKeepAliveConfig_t; 2112 2113/* 2114 * BA sessen interface structure 2115 */ 2116typedef struct 2117{ 2118 INFO_ELE_HDR 2119 uint8 aMacAddress[6]; /* Mac address of: SA as receiver / RA as initiator */ 2120 uint8 uTid; /* TID */ 2121 uint8 uPolicy; /* Enable / Disable */ 2122 uint16 uWinSize; /* windows size in num of packet */ 2123 uint16 uInactivityTimeout; /* as initiator inactivity timeout in time units(TU) of 1024us / 2124 as receiver reserved */ 2125} TAxcBaSessionInitiatorResponderPolicy; 2126 2127/****************************************************************************** 2128 2129 Name: ACX_PEER_HT_CAP 2130 Desc: Configure HT capabilities - declare the capabilities of the peer 2131 we are connected to. 2132 Type: Configuration 2133 Access: Write Only 2134 Length: 2135 2136******************************************************************************/ 2137 2138typedef struct 2139{ 2140 INFO_ELE_HDR 2141 uint32 uHtCapabilites; /* 2142 * bit 0 Allow HT Operation 2143 * bit 1 - Allow Greenfield format in TX 2144 * bit 2 Allow Short GI in TX 2145 * bit 3 Allow L-SIG TXOP Protection in TX 2146 * bit 4 Allow HT Control fields in TX. 2147 * Note, driver will still leave space for HT control in packets regardless 2148 * of the value of this field. FW will be responsible to drop the HT field 2149 * from any frame when this Bit is set to 0. 2150 * bit 5 - Allow RD initiation in TXOP. FW is allowed to initate RD. Exact policy 2151 * setting for this feature is TBD. 2152 * Note, this bit can only be set to 1 if bit 3 is set to 1. 2153 */ 2154 2155 uint8 aMacAddress[6]; /* 2156 * Indicates to which peer these capabilities are relevant. 2157 * Note, currently this value will be set to FFFFFFFFFFFF to indicate it is 2158 * relevant for all peers since we only support HT in infrastructure mode. 2159 * Later on this field will be relevant to IBSS/DLS operation 2160 */ 2161 2162 uint8 uAmpduMaxLength; /* 2163 * This the maximum a-mpdu length supported by the AP. The FW may not 2164 * exceed this length when sending A-MPDUs 2165 */ 2166 2167 uint8 uAmpduMinSpacing; /* This is the minimal spacing required when sending A-MPDUs to the AP. */ 2168 2169} TAxcHtCapabilitiesIeFwInterface; 2170 2171/* EHtCapabilitesFwBitMask mapping */ 2172typedef enum 2173{ 2174 FW_CAP_BIT_MASK_HT_OPERATION = BIT_0, 2175 FW_CAP_BIT_MASK_GREENFIELD_FRAME_FORMAT = BIT_1, 2176 FW_CAP_BIT_MASK_SHORT_GI_FOR_20MHZ_PACKETS = BIT_2, 2177 FW_CAP_BIT_MASK_LSIG_TXOP_PROTECTION = BIT_3, 2178 FW_CAP_BIT_MASK_HT_CONTROL_FIELDS = BIT_4, 2179 FW_CAP_BIT_MASK_RD_INITIATION = BIT_5 2180} EHtCapabilitesFwBitMask; 2181 2182 2183/****************************************************************************** 2184 2185 Name: ACX_HT_BSS_OPERATION 2186 Desc: Configure HT capabilities - AP rules for behavior in the BSS. 2187 Type: Configuration 2188 Access: Write Only 2189 Length: 2190 2191******************************************************************************/ 2192 2193typedef struct 2194{ 2195 INFO_ELE_HDR 2196 uint8 uRifsMode; /* Values: 0 RIFS not allowed, 1 RIFS allowed */ 2197 uint8 uHtProtection; /* Values: 0 3 like in spec */ 2198 uint8 uGfProtection; /* Values: 0 - GF protection not required, 1 GF protection required */ 2199 uint8 uHtTxBurstLimit; /* Values: 0 TX Burst limit not required, 1 TX Burst Limit required */ 2200 uint8 uDualCtsProtection; /* 2201 * Values: 0 Dual CTS protection not required, 1 Dual CTS Protection required 2202 * Note: When this value is set to 1 FW will protect all TXOP with RTS 2203 * frame and will not use CTS-to-self regardless of the value of the 2204 * ACX_CTS_PROTECTION information element 2205 */ 2206 uint8 padding[3]; 2207 2208} TAxcHtInformationIeFwInterface; 2209 2210/****************************************************************************** 2211 FwStaticData_t - information stored in command mailbox area after the Init 2212 process is complete 2213 2214 Note: This structure is passed to the host via the mailbox at Init-Complete 2215 without host request!! 2216 The host reads this structure before sending any configuration to the FW. 2217******************************************************************************/ 2218 2219typedef struct 2220{ 2221 /* dot11StationIDStruct */ 2222 uint8 dot11StationID[6]; /* The MAC address for the STA.*/ 2223 uint8 padding[2]; /* alignment to 32bits boundry */ 2224 /* ACXRevision_t */ 2225 char FWVersion[20]; /* The WiLink firmware version, an ASCII string x.x.x.x.x */ 2226 /* that uniquely identifies the current firmware. */ 2227 /* The left most digit is incremented each time a */ 2228 /* significant change is made to the firmware, such as */ 2229 /* WLAN new project.*/ 2230 /* The second and third digit is incremented when major enhancements*/ 2231 /* are added or major fixes are made.*/ 2232 /* The fourth digit is incremented for each SP release */ 2233 /* and it indicants the costumer private branch */ 2234 /* The fifth digit is incremented for each build.*/ 2235 2236 uint32 HardWareVersion; /* This 4 byte field specifies the WiLink hardware version. */ 2237 /* bits 0 - 15: Reserved.*/ 2238 /* bits 16 - 23: Version ID - The WiLink version ID */ 2239 /* (1 = first spin, 2 = second spin, and so on).*/ 2240 /* bits 24 - 31: Chip ID - The WiLink chip ID. */ 2241 uint8 txPowerTable[NUMBER_OF_SUB_BANDS_E][NUM_OF_POWER_LEVEL]; /* Maximun Dbm in Dbm/10 units */ 2242} FwStaticData_t; 2243 2244/****************************************************************************** 2245 2246 2247 2248 ACX_TX_CONFIG_OPT 2249 2250 2251 2252******************************************************************************/ 2253 2254typedef struct 2255{ 2256 INFO_ELE_HDR 2257 uint16 txCompleteTimeout; /* Max time in msec the FW may delay frame Tx-Complete interrupt */ 2258 uint16 txCompleteThreshold; /* Tx-Complete packets number which requires interrupting the host (0 = no buffering) */ 2259} ACXTxConfigOptions_t; 2260 2261 2262/****************************************************************************** 2263 2264Name: ACX_PWR_CONSUMPTION_STATISTICS 2265Desc: Retrieve time statistics of the different power states. 2266Type: Configuration 2267Access: Read Only 2268Length: 20 2269 2270******************************************************************************/ 2271 2272// Power Statistics 2273typedef struct 2274{ 2275 INFO_ELE_HDR 2276 uint32 awakeTimeCnt_Low; 2277 uint32 awakeTimeCnt_Hi; 2278 uint32 powerDownTimeCnt_Low; 2279 uint32 powerDownTimeCnt_Hi; 2280 uint32 elpTimeCnt_Low; 2281 uint32 elpTimeCnt_Hi; 2282 uint32 ListenMode11BTimeCnt_Low; 2283 uint32 ListenMode11BTimeCnt_Hi; 2284 uint32 ListenModeOFDMTimeCnt_Low; 2285 uint32 ListenModeOFDMTimeCnt_Hi; 2286}ACXPowerConsumptionTimeStat_t; 2287 2288 2289/****************************************************************************** 2290 Name: ACX_BURST_MODE 2291 Desc: enable/disable burst mode in case TxOp limit != 0. 2292 Type: Configuration 2293 Access: Write 2294 Length: 1 - 2 for the mode + 3 for padding. 2295 2296******************************************************************************/ 2297 2298typedef struct 2299{ 2300INFO_ELE_HDR 2301 Bool_e enable; 2302 uint8 padding [3]; 2303}AcxBurstMode; 2304 2305 2306/****************************************************************************** 2307 Name: ACX_SET_RATE_MAMAGEMENT_PARAMS 2308 Desc: configure one of the configurable parameters in rate management module. 2309 Type: Configuration 2310 Access: Write 2311 Length: 8 bytes 2312 2313******************************************************************************/ 2314typedef enum 2315{ 2316 RATE_MGMT_RETRY_SCORE_PARAM, 2317 RATE_MGMT_PER_ADD_PARAM, 2318 RATE_MGMT_PER_TH1_PARAM, 2319 RATE_MGMT_PER_TH2_PARAM, 2320 RATE_MGMT_MAX_PER_PARAM, 2321 RATE_MGMT_INVERSE_CURIOSITY_FACTOR_PARAM, 2322 RATE_MGMT_TX_FAIL_LOW_TH_PARAM, 2323 RATE_MGMT_TX_FAIL_HIGH_TH_PARAM, 2324 RATE_MGMT_PER_ALPHA_SHIFT_PARAM, 2325 RATE_MGMT_PER_ADD_SHIFT_PARAM, 2326 RATE_MGMT_PER_BETA1_SHIFT_PARAM, 2327 RATE_MGMT_PER_BETA2_SHIFT_PARAM, 2328 RATE_MGMT_RATE_CHECK_UP_PARAM, 2329 RATE_MGMT_RATE_CHECK_DOWN_PARAM, 2330 RATE_MGMT_RATE_RETRY_POLICY_PARAM, 2331 RATE_MGMT_ALL_PARAMS = 0xff 2332} rateAdaptParam_enum; 2333 2334#ifdef HOST_COMPILE 2335typedef uint8 rateAdaptParam_e; 2336#else 2337typedef rateAdaptParam_enum rateAdaptParam_e; 2338#endif 2339 2340typedef struct 2341{ 2342 INFO_ELE_HDR 2343 rateAdaptParam_e paramIndex; 2344 uint16 RateRetryScore; 2345 uint16 PerAdd; 2346 uint16 PerTh1; 2347 uint16 PerTh2; 2348 uint16 MaxPer; 2349 uint8 InverseCuriosityFactor; 2350 uint8 TxFailLowTh; 2351 uint8 TxFailHighTh; 2352 uint8 PerAlphaShift; 2353 uint8 PerAddShift; 2354 uint8 PerBeta1Shift; 2355 uint8 PerBeta2Shift; 2356 uint8 RateCheckUp; 2357 uint8 RateCheckDown; 2358 uint8 RateRetryPolicy[13]; 2359}AcxRateMangeParams; 2360 2361/****************************************************************************** 2362 Name: ACX_GET_RATE_MAMAGEMENT_PARAMS 2363 Desc: read the configurable parameters of rate management module. 2364 Type: 2365 Access: read 2366 Length: 8 bytes 2367 2368******************************************************************************/ 2369typedef struct 2370{ 2371 INFO_ELE_HDR 2372 int32 SNRCorrectionHighLimit; 2373 int32 SNRCorrectionLowLimit; 2374 int32 PERErrorTH; 2375 int32 attemptEvaluateTH; 2376 int32 goodAttemptTH; 2377 int32 curveCorrectionStep; 2378}AcxRateMangeReadParams; 2379 2380 2381/****************************************************************************** 2382 2383 Name: ACX_SET_DCO_ITRIM_PARAMS 2384 Desc: Configure DCO Itrim operational parameters: 2385 1. Enable/disable of the entire feature. 2386 2. Moderation timeout (usec) - how much time to wait from last TX 2387 until DCO Itrim can be set low. 2388 Type: Configuration 2389 Access: Write Only 2390 Length: 2391 2392******************************************************************************/ 2393 2394typedef struct 2395{ 2396 INFO_ELE_HDR 2397 Bool_e enable; 2398 uint32 moderation_timeout_usec; 2399}ACXDCOItrimParams_t ; 2400 2401#endif /* PUBLIC_INFOELE_H */ 2402 2403