Cross Reference: /external/llvm/lib/Target/X86/X86MCInstLower.cpp

Lines Matching defs:OutMI
223 static void LowerSubReg32_Op0(MCInst &OutMI, unsigned NewOpc) {
224   OutMI.setOpcode(NewOpc);
225   lower_subreg32(&OutMI, 0);
228 static void LowerUnaryToTwoAddr(MCInst &OutMI, unsigned NewOpc) {
229   OutMI.setOpcode(NewOpc);
230   OutMI.addOperand(OutMI.getOperand(0));
231   OutMI.addOperand(OutMI.getOperand(0));
307 void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
308   OutMI.setOpcode(MI->getOpcode());
349     OutMI.addOperand(MCOp);
354   switch (OutMI.getOpcode()) {
356     lower_lea64_32mem(&OutMI, 1);
362     assert(OutMI.getNumOperands() == 1+X86::AddrNumOperands &&
364     assert(OutMI.getOperand(1+X86::AddrSegmentReg).getReg() == 0 &&
367   case X86::MOVZX64rr32:  LowerSubReg32_Op0(OutMI, X86::MOV32rr); break;
368   case X86::MOVZX64rm32:  LowerSubReg32_Op0(OutMI, X86::MOV32rm); break;
369   case X86::MOV64ri64i32: LowerSubReg32_Op0(OutMI, X86::MOV32ri); break;
370   case X86::MOVZX64rr8:   LowerSubReg32_Op0(OutMI, X86::MOVZX32rr8); break;
371   case X86::MOVZX64rm8:   LowerSubReg32_Op0(OutMI, X86::MOVZX32rm8); break;
372   case X86::MOVZX64rr16:  LowerSubReg32_Op0(OutMI, X86::MOVZX32rr16); break;
373   case X86::MOVZX64rm16:  LowerSubReg32_Op0(OutMI, X86::MOVZX32rm16); break;
374   case X86::SETB_C8r:     LowerUnaryToTwoAddr(OutMI, X86::SBB8rr); break;
375   case X86::SETB_C16r:    LowerUnaryToTwoAddr(OutMI, X86::SBB16rr); break;
376   case X86::SETB_C32r:    LowerUnaryToTwoAddr(OutMI, X86::SBB32rr); break;
377   case X86::SETB_C64r:    LowerUnaryToTwoAddr(OutMI, X86::SBB64rr); break;
378   case X86::MOV8r0:       LowerUnaryToTwoAddr(OutMI, X86::XOR8rr); break;
379   case X86::MOV32r0:      LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); break;
382     LowerSubReg32_Op0(OutMI, X86::MOV32r0);   // MOV16r0 -> MOV32r0
383     LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
386     LowerSubReg32_Op0(OutMI, X86::MOV32r0);   // MOV64r0 -> MOV32r0
387     LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
396     unsigned Opcode = OutMI.getOpcode();
397     MCOperand Saved = OutMI.getOperand(0);
398     OutMI = MCInst();
399     OutMI.setOpcode(Opcode);
400     OutMI.addOperand(Saved);
406     OutMI = MCInst();
407     OutMI.setOpcode(X86::RET);
416     switch (OutMI.getOpcode()) {
423     MCOperand Saved = OutMI.getOperand(0);
424     OutMI = MCInst();
425     OutMI.setOpcode(Opcode);
426     OutMI.addOperand(Saved);
433   case X86::ADD16rr_DB:   OutMI.setOpcode(X86::OR16rr); goto ReSimplify;
434   case X86::ADD32rr_DB:   OutMI.setOpcode(X86::OR32rr); goto ReSimplify;
435   case X86::ADD64rr_DB:   OutMI.setOpcode(X86::OR64rr); goto ReSimplify;
436   case X86::ADD16ri_DB:   OutMI.setOpcode(X86::OR16ri); goto ReSimplify;
437   case X86::ADD32ri_DB:   OutMI.setOpcode(X86::OR32ri); goto ReSimplify;
438   case X86::ADD64ri32_DB: OutMI.setOpcode(X86::OR64ri32); goto ReSimplify;
439   case X86::ADD16ri8_DB:  OutMI.setOpcode(X86::OR16ri8); goto ReSimplify;
440   case X86::ADD32ri8_DB:  OutMI.setOpcode(X86::OR32ri8); goto ReSimplify;
441   case X86::ADD64ri8_DB:  OutMI.setOpcode(X86::OR64ri8); goto ReSimplify;
447   case X86::JMP_4: OutMI.setOpcode(X86::JMP_1); break;
448   case X86::JO_4:  OutMI.setOpcode(X86::JO_1); break;
449   case X86::JNO_4: OutMI.setOpcode(X86::JNO_1); break;
450   case X86::JB_4:  OutMI.setOpcode(X86::JB_1); break;
451   case X86::JAE_4: OutMI.setOpcode(X86::JAE_1); break;
452   case X86::JE_4:  OutMI.setOpcode(X86::JE_1); break;
453   case X86::JNE_4: OutMI.setOpcode(X86::JNE_1); break;
454   case X86::JBE_4: OutMI.setOpcode(X86::JBE_1); break;
455   case X86::JA_4:  OutMI.setOpcode(X86::JA_1); break;
456   case X86::JS_4:  OutMI.setOpcode(X86::JS_1); break;
457   case X86::JNS_4: OutMI.setOpcode(X86::JNS_1); break;
458   case X86::JP_4:  OutMI.setOpcode(X86::JP_1); break;
459   case X86::JNP_4: OutMI.setOpcode(X86::JNP_1); break;
460   case X86::JL_4:  OutMI.setOpcode(X86::JL_1); break;
461   case X86::JGE_4: OutMI.setOpcode(X86::JGE_1); break;
462   case X86::JLE_4: OutMI.setOpcode(X86::JLE_1); break;
463   case X86::JG_4:  OutMI.setOpcode(X86::JG_1); break;
468   case X86::ACQUIRE_MOV8rm:  OutMI.setOpcode(X86::MOV8rm); goto ReSimplify;
469   case X86::ACQUIRE_MOV16rm: OutMI.setOpcode(X86::MOV16rm); goto ReSimplify;
470   case X86::ACQUIRE_MOV32rm: OutMI.setOpcode(X86::MOV32rm); goto ReSimplify;
471   case X86::ACQUIRE_MOV64rm: OutMI.setOpcode(X86::MOV64rm); goto ReSimplify;
472   case X86::RELEASE_MOV8mr:  OutMI.setOpcode(X86::MOV8mr); goto ReSimplify;
473   case X86::RELEASE_MOV16mr: OutMI.setOpcode(X86::MOV16mr); goto ReSimplify;
474   case X86::RELEASE_MOV32mr: OutMI.setOpcode(X86::MOV32mr); goto ReSimplify;
475   case X86::RELEASE_MOV64mr: OutMI.setOpcode(X86::MOV64mr); goto ReSimplify;
485   case X86::MOV8mr:     SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV8ao8); break;
487   case X86::MOV8rm:     SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV8o8a); break;
488   case X86::MOV16mr:    SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV16ao16); break;
489   case X86::MOV16rm:    SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV16o16a); break;
490   case X86::MOV32mr:    SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV32ao32); break;
491   case X86::MOV32rm:    SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV32o32a); break;
493   case X86::ADC8ri:     SimplifyShortImmForm(OutMI, X86::ADC8i8);    break;
494   case X86::ADC16ri:    SimplifyShortImmForm(OutMI, X86::ADC16i16);  break;
495   case X86::ADC32ri:    SimplifyShortImmForm(OutMI, X86::ADC32i32);  break;
496   case X86::ADC64ri32:  SimplifyShortImmForm(OutMI, X86::ADC64i32);  break;
497   case X86::ADD8ri:     SimplifyShortImmForm(OutMI, X86::ADD8i8);    break;
498   case X86::ADD16ri:    SimplifyShortImmForm(OutMI, X86::ADD16i16);  break;
499   case X86::ADD32ri:    SimplifyShortImmForm(OutMI, X86::ADD32i32);  break;
500   case X86::ADD64ri32:  SimplifyShortImmForm(OutMI, X86::ADD64i32);  break;
501   case X86::AND8ri:     SimplifyShortImmForm(OutMI, X86::AND8i8);    break;
502   case X86::AND16ri:    SimplifyShortImmForm(OutMI, X86::AND16i16);  break;
503   case X86::AND32ri:    SimplifyShortImmForm(OutMI, X86::AND32i32);  break;
504   case X86::AND64ri32:  SimplifyShortImmForm(OutMI, X86::AND64i32);  break;
505   case X86::CMP8ri:     SimplifyShortImmForm(OutMI, X86::CMP8i8);    break;
506   case X86::CMP16ri:    SimplifyShortImmForm(OutMI, X86::CMP16i16);  break;
507   case X86::CMP32ri:    SimplifyShortImmForm(OutMI, X86::CMP32i32);  break;
508   case X86::CMP64ri32:  SimplifyShortImmForm(OutMI, X86::CMP64i32);  break;
509   case X86::OR8ri:      SimplifyShortImmForm(OutMI, X86::OR8i8);     break;
510   case X86::OR16ri:     SimplifyShortImmForm(OutMI, X86::OR16i16);   break;
511   case X86::OR32ri:     SimplifyShortImmForm(OutMI, X86::OR32i32);   break;
512   case X86::OR64ri32:   SimplifyShortImmForm(OutMI, X86::OR64i32);   break;
513   case X86::SBB8ri:     SimplifyShortImmForm(OutMI, X86::SBB8i8);    break;
514   case X86::SBB16ri:    SimplifyShortImmForm(OutMI, X86::SBB16i16);  break;
515   case X86::SBB32ri:    SimplifyShortImmForm(OutMI, X86::SBB32i32);  break;
516   case X86::SBB64ri32:  SimplifyShortImmForm(OutMI, X86::SBB64i32);  break;
517   case X86::SUB8ri:     SimplifyShortImmForm(OutMI, X86::SUB8i8);    break;
518   case X86::SUB16ri:    SimplifyShortImmForm(OutMI, X86::SUB16i16);  break;
519   case X86::SUB32ri:    SimplifyShortImmForm(OutMI, X86::SUB32i32);  break;
520   case X86::SUB64ri32:  SimplifyShortImmForm(OutMI, X86::SUB64i32);  break;
521   case X86::TEST8ri:    SimplifyShortImmForm(OutMI, X86::TEST8i8);   break;
522   case X86::TEST16ri:   SimplifyShortImmForm(OutMI, X86::TEST16i16); break;
523   case X86::TEST32ri:   SimplifyShortImmForm(OutMI, X86::TEST32i32); break;
524   case X86::TEST64ri32: SimplifyShortImmForm(OutMI, X86::TEST64i32); break;
525   case X86::XOR8ri:     SimplifyShortImmForm(OutMI, X86::XOR8i8);    break;
526   case X86::XOR16ri:    SimplifyShortImmForm(OutMI, X86::XOR16i16);  break;
527   case X86::XOR32ri:    SimplifyShortImmForm(OutMI, X86::XOR32i32);  break;
528   case X86::XOR64ri32:  SimplifyShortImmForm(OutMI, X86::XOR64i32);  break;
531     OutMI.setOpcode(X86::RET);
537     OutMI.setOpcode(X86::MOV64rr);
538     OutMI.addOperand(MCOperand::CreateReg(X86::R10));
539     OutMI.addOperand(MCOperand::CreateReg(X86::RAX));