Searched refs:EDX (Results 1 - 25 of 28) sorted by relevance

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/external/qemu/distrib/sdl-1.2.15/src/hermes/
H A DHeadMMX.h81 #pragma aux ConvertMMX "_*" modify [EAX EBX ECX EDX ESI EDI]
83 #pragma aux ClearMMX_32 "_*" modify [EAX EBX ECX EDX ESI EDI]
84 #pragma aux ClearMMX_24 "_*" modify [EAX EBX ECX EDX ESI EDI]
85 #pragma aux ClearMMX_16 "_*" modify [EAX EBX ECX EDX ESI EDI]
86 #pragma aux ClearMMX_8 "_*" modify [EAX EBX ECX EDX ESI EDI]
H A DHeadX86.h138 #pragma aux ConvertX86 "_*" modify [EAX EBX ECX EDX ESI EDI]
139 #pragma aux ClearX86_32 "_*" modify [EAX EBX ECX EDX ESI EDI]
140 #pragma aux ClearX86_24 "_*" modify [EAX EBX ECX EDX ESI EDI]
141 #pragma aux ClearX86_16 "_*" modify [EAX EBX ECX EDX ESI EDI]
142 #pragma aux ClearX86_8 "_*" modify [EAX EBX ECX EDX ESI EDI]
H A Dx86p_32.asm35 ;; EAX, EBX, EDX
/external/llvm/include/llvm/Support/
H A DSolaris.h28 #undef EDX macro
/external/llvm/lib/Target/X86/
H A DX86Subtarget.cpp178 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; local
189 X86_MC::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
191 if ((EDX >> 15) & 1) { HasCMov = true; ToggleFeature(X86::FeatureCMOV); }
192 if ((EDX >> 23) & 1) { X86SSELevel = MMX; ToggleFeature(X86::FeatureMMX); }
193 if ((EDX >> 25) & 1) { X86SSELevel = SSE1; ToggleFeature(X86::FeatureSSE1); }
194 if ((EDX >> 26) & 1) { X86SSELevel = SSE2; ToggleFeature(X86::FeatureSSE2); }
269 X86_MC::GetCpuIDAndInfo(0x80000000, &MaxExtLevel, &EBX, &ECX, &EDX);
272 X86_MC::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
273 if ((EDX >> 29) & 0x1) {
299 if (!X86_MC::GetCpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX)) {
[all...]
H A DX86RegisterInfo.cpp92 case X86::EDX: case X86::R13: return 3;
602 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
614 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
651 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
687 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
688 return X86::EDX;
739 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
H A DX86FrameLowering.cpp99 X86::EAX, X86::EDX, X86::ECX, 0
402 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
470 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
1389 return Primary ? X86::EDX : X86::EAX;
H A DX86ISelDAGToDAG.cpp2228 case MVT::i32: LoReg = X86::EAX; HiReg = X86::EDX; break;
2338 LoReg = X86::EAX; ClrReg = HiReg = X86::EDX;
2632 InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, X86::EDX,
H A DX86FloatingPoint.cpp1665 .addReg(X86::EDX, RegState::Define | RegState::Implicit)
H A DX86ISelLowering.cpp539 setExceptionSelectorRegister(X86::EDX);
2870 // only target EAX, EDX, or ECX since the tail call must be scheduled after
2884 case X86::EAX: case X86::EDX: case X86::ECX:
8154 SDValue edx = DAG.getCopyFromReg(eax.getValue(1), DL, X86::EDX,
11427 SDValue edx = DAG.getCopyFromReg(eax.getValue(1), dl, X86::EDX, MVT::i32,
11449 Regs64bit ? X86::RDX : X86::EDX,
11475 Regs64bit ? X86::RDX : X86::EDX,
11937 // mov EAX, EDX <- t1, t2
11938 // cmpxchg8b [bitinstr.addr] [EAX, EDX, EBX, ECX implicit]
11939 // mov t3, t4 <- EAX, EDX
[all...]
/external/kernel-headers/original/asm-x86/
H A Dptrace-abi.h8 #define EDX 2 macro
/external/llvm/lib/Support/
H A DHost.cpp128 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; local
129 if (GetX86CpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
136 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
137 bool Em64T = (EDX >> 29) & 0x1;
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.h46 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 enumerator in enum:llvm::N86::__anon9604
H A DX86MCTargetDesc.cpp218 case X86::RDX: case X86::EDX: case X86::DX: case X86::DL: return N86::EDX;
234 return N86::EDX;
/external/qemu/target-i386/
H A Dexec.h39 #define EDX (env->regs[R_EDX]) macro
294 EDX = env->regs[R_EDX];
322 env->regs[R_EDX] = EDX;
H A Dop_helper.c383 stl_kernel(env->tr.base + (0x28 + 2 * 4), EDX);
397 stw_kernel(env->tr.base + (0x12 + 2 * 2), EDX);
449 EDX = new_regs[2];
1427 stq_phys(sm_state + 0x7fe8, EDX);
1456 stl_phys(sm_state + 0x7fd8, EDX);
1553 EDX = ldq_phys(sm_state + 0x7fe8);
1586 EDX = ldl_phys(sm_state + 0x7fd8);
1677 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
1688 EDX = (EDX
[all...]
/external/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h127 ENTRY(EDX) \
145 ENTRY(EDX) \
/external/valgrind/main/VEX/auxprogs/
H A Dgenoffsets.c86 GENOFFSET(X86,x86,EDX);
/external/valgrind/main/coregrind/m_sigframe/
H A Dsigframe-x86-linux.c379 SC2(edx,EDX);
/external/qemu-pc-bios/bochs/
H A Dbochs.h56 #undef EDX macro
/external/strace/
H A Dsyscall.c1764 ((unsigned long long) tcp->status.PR_REG[EDX] << 32) +
2045 /* EDX = out2 */
2783 val = tcp->status.PR_REG[EDX];
/external/valgrind/main/memcheck/
H A Dmc_machine.c681 if (o == GOF(EDX) && is124) return o;
713 if (o == 1+ GOF(EDX) && szB == 1) return GOF(IDFLAG);
/external/qemu/
H A Dcpu-exec.c30 #undef EDX macro
/external/valgrind/main/VEX/test/
H A Dtest-amd64.c1354 #define REG_EDX EDX
H A Dtest-i386.c1314 #define REG_EDX EDX

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