| 918f55fe239f00651e396be841f2b3b6e242f98d |
|
15-May-2012 |
Jim Grosbach <grosbach@apple.com> |
Allow MCCodeEmitter access to the target MCRegisterInfo.
Add the MCRegisterInfo to the factories and constructors.
Patch by Tom Stellard <Tom.Stellard@amd.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156828 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| df09270ae897e7fa64a7c162de163c32ee181a03 |
|
24-Dec-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Move x86 specific bits of the COFF writer to lib/Target/X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147231 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| edae8e1e4d5bd9b59f18ecef04a248be95d8ca46 |
|
21-Dec-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Move the X86 specific bits of the ELF writer to the Target/X86 directory.
Other targets will follow shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147060 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| 4145c49aa0e0e70a51a395bdd4107a464d05e592 |
|
16-Oct-2011 |
Craig Topper <craig.topper@gmail.com> |
Add X86 feature detection support for BMI instructions. Added new cpuid function for accessing leafs with sub leafs specified in ECX. Also added code to keep track of the max cpuid level supported in both basic and extended leaves and qualified the existing cpuid calls and the new call to leaf 7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142089 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| 78c10eeaa57d1c6c4b7781d3c0bcb0cfbbc43b5c |
|
26-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| 7331ac47b9e6a8fa1624e85932ce6a20c3e8fca3 |
|
25-Jul-2011 |
Oscar Fuentes <ofv@wanadoo.es> |
Unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135949 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| a87e40f16f1c3117412e01107807e490d6fb29bc |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
More refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| 8c3fee59038d8fd98db2a01b6a309a8941a16a3f |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Refactor X86 target to separate MC code from Target code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| 0e6a052331f674dd70e28af41f654a7874405eab |
|
18-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time.
This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| c60f9b752381baa6c4b80c0739034660f1748c84 |
|
14-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| ebdeeab812beec0385b445f3d4c41a114e0d972f |
|
08-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
to generate asm matcher subtarget feature queries. e.g.
"ModeThumb,FeatureThumb2" is translated to
"(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| 18fb1d35db9e2160be3a5bd2950f7e0d206bdbb8 |
|
07-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add Mode64Bit feature and sink it down to MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134641 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|
| ed5e3552147830159a1d48d067dfbb49ac9cccfd |
|
07-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename files for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
|