Searched refs:ESP (Results 1 - 25 of 28) sorted by relevance

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/external/llvm/include/llvm/Support/
H A DSolaris.h30 #undef ESP macro
/external/libpcap/
H A Dtokdefs.h89 ESP = 315, enumerator in enum:yytokentype
193 #define ESP 315 macro
H A Dgrammar.c124 ESP = 315, enumerator in enum:yytokentype
228 #define ESP 315 macro
789 "RSH", "LEN", "IPV6", "ICMPV6", "AH", "ESP", "VLAN", "MPLS", "PPPOED",
H A Dgrammar.y181 %token IPV6 ICMPV6 AH ESP
360 | ESP { $$ = Q_ESP; }
H A Dscanner.l203 esp return ESP;
H A Dscanner.c2843 return ESP;
/external/qemu/distrib/sdl-1.2.15/src/hermes/
H A Dmmx_main.asm19 ;; [ESP+8] ConverterInfo*
H A Dx86_main.asm21 ;; [ESP+8] ConverterInfo*
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.h46 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 enumerator in enum:llvm::N86::__anon9604
H A DX86MCTargetDesc.cpp220 case X86::RSP: case X86::ESP: case X86::SP: case X86::SPL: case X86::AH:
221 return N86::ESP;
238 return N86::ESP;
396 MachineLocation Src(is64Bit ? X86::RSP : X86::ESP, stackGrowth);
400 MachineLocation CSDst(is64Bit ? X86::RSP : X86::ESP, stackGrowth);
H A DX86MCCodeEmitter.cpp343 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
346 BaseRegNo != N86::ESP &&
357 // If the base is not EBP/ESP and there is no displacement, use simple
381 assert(IndexReg.getReg() != X86::ESP &&
382 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
420 else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
428 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
/external/qemu/target-i386/
H A Dexec.h41 #define ESP (env->regs[R_ESP]) macro
300 ESP = env->regs[R_ESP];
328 env->regs[R_ESP] = ESP;
H A Dop_helper.c385 stl_kernel(env->tr.base + (0x28 + 4 * 4), ESP);
399 stw_kernel(env->tr.base + (0x12 + 4 * 2), ESP);
451 ESP = new_regs[4];
617 ESP = (ESP & ~0xffff) | ((val) & 0xffff);\
619 ESP = (uint32_t)(val);\
621 ESP = (val);\
624 #define SET_ESP(val, sp_mask) ESP = (ESP & ~(sp_mask)) | ((val) & (sp_mask))
699 esp = (ESP
[all...]
/external/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp77 StackPtr = X86::ESP;
460 // adjcallstackup instruction into a 'sub ESP, <amt>' and the
461 // adjcallstackdown instruction into 'add ESP, <amt>'
626 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
663 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
699 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
700 return X86::ESP;
730 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
751 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
H A DX86AsmPrinter.cpp339 assert(IndexReg.getReg() != X86::ESP &&
340 "X86 doesn't allow scaling by ESP");
H A DX86CodeEmitter.cpp508 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
511 BaseRegNo != N86::ESP &&
522 // If the base is not EBP/ESP and there is no displacement, use simple
545 assert(IndexReg.getReg() != X86::ESP &&
546 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
581 else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
590 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
H A DX86FrameLowering.cpp603 // Encode the offset to the nnnnnn value in the 'subl $nnnnnn, ESP'
841 // If there is an SUB32ri of ESP immediately before this instruction, merge
846 // If there is an ADD32ri or SUB32ri of ESP immediately after this
850 // Adjust stack pointer: ESP -= numbytes.
1056 // If there is an ADD32ri or SUB32ri of ESP immediately before this
1077 // Adjust stack pointer back: ESP += numbytes.
1491 ScratchReg = X86::ESP;
1493 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
/external/oprofile/events/i386/nehalem/
H A Dunit_masks312 0x04 esp_folding Counts number of stack pointer (ESP) instructions decoded: push , pop , call , ret, etc
313 0x08 esp_sync Counts number of stack pointer (ESP) sync operations where an ESP instruction is corrected by adding the ESP offset register to the current value of the ESP register
/external/valgrind/main/VEX/auxprogs/
H A Dgenoffsets.c90 GENOFFSET(X86,x86,ESP);
/external/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h147 ENTRY(ESP) \
/external/valgrind/main/coregrind/m_sigframe/
H A Dsigframe-x86-linux.c377 SC2(esp,ESP);
602 /* tst->m_esp = esp; also notify the tool we've updated ESP */
612 VG_(printf)("pushed signal frame; %%ESP now = %#lx, "
/external/qemu-pc-bios/bochs/
H A Dbochs.h58 #undef ESP macro
/external/qemu/
H A Dcpu-exec.c32 #undef ESP macro
/external/valgrind/main/VEX/test/
H A Dtest-amd64.c1358 #define REG_ESP ESP
H A Dtest-i386.c1318 #define REG_ESP ESP

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