| /external/kernel-headers/original/asm-x86/ |
| H A D | ptrace-abi.h | 28 #define R15 0 macro
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| /external/llvm/test/MC/X86/ |
| H A D | intel-syntax.s | 67 vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8
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| /external/llvm/lib/Target/MBlaze/ |
| H A D | MBlazeRegisterInfo.cpp | 46 : MBlazeGenRegisterInfo(MBlaze::R15), Subtarget(ST), TII(tii) {}
78 Reserved.set(MBlaze::R15);
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| H A D | MBlazeISelDAGToDAG.cpp | 235 SDValue GPReg = CurDAG->getRegister(MBlaze::R15, MVT::i32);
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| H A D | MBlazeFrameLowering.cpp | 369 // swi R15, R1, stack_loc
372 .addReg(MBlaze::R15).addReg(MBlaze::R1).addImm(RAOffset);
413 // lwi R15, R1, stack_loc
415 BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R15)
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| H A D | MBlazeISelLowering.cpp | 1058 : MBlaze::R15;
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| /external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
| H A D | MBlazeMCTargetDesc.cpp | 45 InitMBlazeMCRegisterInfo(X, MBlaze::R15);
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| H A D | MBlazeBaseInfo.h | 120 case MBlaze::R15 : return 15;
184 case 15 : return MBlaze::R15;
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCBaseInfo.h | 46 case R15: case X15: case F15: case V15: case CR3UN: return 15;
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.h | 170 {PPC::R15, -68},
249 {PPC::R15, -132},
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| /external/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 94 case X86::ESI: case X86::R15: return 5;
118 case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B:
346 X86::R12, X86::R13, X86::R14, X86::R15
642 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15:
679 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15:
715 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15:
767 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15:
768 return X86::R15;
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| H A D | X86FrameLowering.cpp | 405 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0
473 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0
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| /external/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 176 ENTRY(R15)
194 ENTRY(R15)
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| /external/valgrind/main/VEX/auxprogs/ |
| H A D | genoffsets.c | 115 GENOFFSET(AMD64,amd64,R15);
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 243 case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B:
315 case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B:
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| H A D | X86BaseInfo.h | 598 case X86::R12: case X86::R13: case X86::R14: case X86::R15:
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| /external/llvm/lib/Target/CellSPU/ |
| H A D | SPURegisterInfo.cpp | 69 case SPU::R15: return 15;
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| H A D | SPUISelLowering.cpp | 1213 SPU::R10, SPU::R11, SPU::R12, SPU::R13, SPU::R14, SPU::R15, SPU::R16,
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| /external/valgrind/main/coregrind/m_sigframe/ |
| H A D | sigframe-amd64-linux.c | 352 SC2(r15,R15);
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| /external/v8/src/ |
| H A D | platform-linux.cc | 962 enum ArmRegisters {R15 = 15, R13 = 13, R11 = 11}; enumerator in enum:v8::internal::ArmRegisters
1063 sample->pc = reinterpret_cast<Address>(mcontext.gregs[R15]);
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| /external/qemu/ |
| H A D | cpu-exec.c | 1148 pc = uc->uc_mcontext.gregs[R15];
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| /external/strace/ |
| H A D | process.c | 2674 { 8*R15, "8*R15" },
2804 { 144, "R15(L)" },
2805 { 148, "R15(U)" },
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| /external/valgrind/main/memcheck/ |
| H A D | mc_machine.c | 572 if (o == GOF(R15) && is1248) return o;
|